From dbc02872c1a3b827da8c85af9439792f51f6f1a9 Mon Sep 17 00:00:00 2001 From: Sasha Levin Date: Wed, 21 Jun 2023 12:39:43 -0400 Subject: [PATCH] Fixes for 5.15 Signed-off-by: Sasha Levin --- ...fix-the-system-hang-while-disable-ps.patch | 60 +++++++++++++++++++ queue-5.15/series | 1 + 2 files changed, 61 insertions(+) create mode 100644 queue-5.15/drm-amd-display-fix-the-system-hang-while-disable-ps.patch create mode 100644 queue-5.15/series diff --git a/queue-5.15/drm-amd-display-fix-the-system-hang-while-disable-ps.patch b/queue-5.15/drm-amd-display-fix-the-system-hang-while-disable-ps.patch new file mode 100644 index 00000000000..bec122ade61 --- /dev/null +++ b/queue-5.15/drm-amd-display-fix-the-system-hang-while-disable-ps.patch @@ -0,0 +1,60 @@ +From 8b7ed941bcf7ec262fe08f976e92137765f30547 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 29 May 2023 18:00:09 +0800 +Subject: drm/amd/display: fix the system hang while disable PSR + +From: Tom Chung + +[ Upstream commit ea2062dd1f0384ae1b136d333ee4ced15bedae38 ] + +[Why] +When the PSR enabled. If you try to adjust the timing parameters, +it may cause system hang. Because the timing mismatch with the +DMCUB settings. + +[How] +Disable the PSR before adjusting timing parameters. + +Cc: Mario Limonciello +Cc: Alex Deucher +Cc: stable@vger.kernel.org +Acked-by: Stylon Wang +Signed-off-by: Tom Chung +Reviewed-by: Wayne Lin +Tested-by: Daniel Wheeler +Signed-off-by: Alex Deucher +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 9 ++++++--- + 1 file changed, 6 insertions(+), 3 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +index 938aa11acb2d4..5acd088f34f3d 100644 +--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +@@ -9218,6 +9218,12 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state, + if (acrtc_state->abm_level != dm_old_crtc_state->abm_level) + bundle->stream_update.abm_level = &acrtc_state->abm_level; + ++ mutex_lock(&dm->dc_lock); ++ if ((acrtc_state->update_type > UPDATE_TYPE_FAST) && ++ acrtc_state->stream->link->psr_settings.psr_allow_active) ++ amdgpu_dm_psr_disable(acrtc_state->stream); ++ mutex_unlock(&dm->dc_lock); ++ + /* + * If FreeSync state on the stream has changed then we need to + * re-adjust the min/max bounds now that DC doesn't handle this +@@ -9231,9 +9237,6 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state, + spin_unlock_irqrestore(&pcrtc->dev->event_lock, flags); + } + mutex_lock(&dm->dc_lock); +- if ((acrtc_state->update_type > UPDATE_TYPE_FAST) && +- acrtc_state->stream->link->psr_settings.psr_allow_active) +- amdgpu_dm_psr_disable(acrtc_state->stream); + + dc_commit_updates_for_stream(dm->dc, + bundle->surface_updates, +-- +2.39.2 + diff --git a/queue-5.15/series b/queue-5.15/series new file mode 100644 index 00000000000..53c1ae3f4a5 --- /dev/null +++ b/queue-5.15/series @@ -0,0 +1 @@ +drm-amd-display-fix-the-system-hang-while-disable-ps.patch -- 2.47.3