From e17bd13154f55c2d0fb3f0c36ba13acabe8750ba Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Fri, 4 Jul 2025 11:42:16 +0200 Subject: [PATCH] drop drm-dp-change-aux-dpcd-probe-address-from-dpcd_rev-to-lane0_1_status.patch --- ...ress-from-dpcd_rev-to-lane0_1_status.patch | 50 ------------------- queue-6.1/series | 1 - ...ress-from-dpcd_rev-to-lane0_1_status.patch | 50 ------------------- queue-6.12/series | 1 - ...ress-from-dpcd_rev-to-lane0_1_status.patch | 50 ------------------- queue-6.15/series | 1 - ...ress-from-dpcd_rev-to-lane0_1_status.patch | 50 ------------------- queue-6.6/series | 1 - 8 files changed, 204 deletions(-) delete mode 100644 queue-6.1/drm-dp-change-aux-dpcd-probe-address-from-dpcd_rev-to-lane0_1_status.patch delete mode 100644 queue-6.12/drm-dp-change-aux-dpcd-probe-address-from-dpcd_rev-to-lane0_1_status.patch delete mode 100644 queue-6.15/drm-dp-change-aux-dpcd-probe-address-from-dpcd_rev-to-lane0_1_status.patch delete mode 100644 queue-6.6/drm-dp-change-aux-dpcd-probe-address-from-dpcd_rev-to-lane0_1_status.patch diff --git a/queue-6.1/drm-dp-change-aux-dpcd-probe-address-from-dpcd_rev-to-lane0_1_status.patch b/queue-6.1/drm-dp-change-aux-dpcd-probe-address-from-dpcd_rev-to-lane0_1_status.patch deleted file mode 100644 index 9e4b1d2f38..0000000000 --- a/queue-6.1/drm-dp-change-aux-dpcd-probe-address-from-dpcd_rev-to-lane0_1_status.patch +++ /dev/null @@ -1,50 +0,0 @@ -From a3ef3c2da675a8a564c8bea1a511cdd0a2a9aa49 Mon Sep 17 00:00:00 2001 -From: Imre Deak -Date: Thu, 5 Jun 2025 11:28:46 +0300 -Subject: drm/dp: Change AUX DPCD probe address from DPCD_REV to LANE0_1_STATUS -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -From: Imre Deak - -commit a3ef3c2da675a8a564c8bea1a511cdd0a2a9aa49 upstream. - -Reading DPCD registers has side-effects in general. In particular -accessing registers outside of the link training register range -(0x102-0x106, 0x202-0x207, 0x200c-0x200f, 0x2216) is explicitly -forbidden by the DP v2.1 Standard, see - -3.6.5.1 DPTX AUX Transaction Handling Mandates -3.6.7.4 128b/132b DP Link Layer LTTPR Link Training Mandates - -Based on my tests, accessing the DPCD_REV register during the link -training of an UHBR TBT DP tunnel sink leads to link training failures. - -Solve the above by using the DP_LANE0_1_STATUS (0x202) register for the -DPCD register access quirk. - -Cc: -Cc: Ville Syrjälä -Cc: Jani Nikula -Acked-by: Jani Nikula -Signed-off-by: Imre Deak -Link: https://lore.kernel.org/r/20250605082850.65136-2-imre.deak@intel.com -(cherry picked from commit a40c5d727b8111b5db424a1e43e14a1dcce1e77f) -Signed-off-by: Joonas Lahtinen -Signed-off-by: Greg Kroah-Hartman ---- - drivers/gpu/drm/display/drm_dp_helper.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/gpu/drm/display/drm_dp_helper.c -+++ b/drivers/gpu/drm/display/drm_dp_helper.c -@@ -663,7 +663,7 @@ ssize_t drm_dp_dpcd_read(struct drm_dp_a - * monitor doesn't power down exactly after the throw away read. - */ - if (!aux->is_remote) { -- ret = drm_dp_dpcd_probe(aux, DP_DPCD_REV); -+ ret = drm_dp_dpcd_probe(aux, DP_LANE0_1_STATUS); - if (ret < 0) - return ret; - } diff --git a/queue-6.1/series b/queue-6.1/series index 7f3e70402a..ff6ba8d4fb 100644 --- a/queue-6.1/series +++ b/queue-6.1/series @@ -71,7 +71,6 @@ i2c-tiny-usb-disable-zero-length-read-messages.patch i2c-robotfuzz-osif-disable-zero-length-read-messages.patch asoc-amd-yc-add-dmi-quirk-for-lenovo-ideapad-slim-5-15.patch s390-pkey-prevent-overflow-in-size-calculation-for-memdup_user.patch -drm-dp-change-aux-dpcd-probe-address-from-dpcd_rev-to-lane0_1_status.patch atm-clip-prevent-null-deref-in-clip_push.patch alsa-usb-audio-fix-out-of-bounds-read-in-snd_usb_get.patch attach_recursive_mnt-do-not-lock-the-covering-tree-w.patch diff --git a/queue-6.12/drm-dp-change-aux-dpcd-probe-address-from-dpcd_rev-to-lane0_1_status.patch b/queue-6.12/drm-dp-change-aux-dpcd-probe-address-from-dpcd_rev-to-lane0_1_status.patch deleted file mode 100644 index 040579470d..0000000000 --- a/queue-6.12/drm-dp-change-aux-dpcd-probe-address-from-dpcd_rev-to-lane0_1_status.patch +++ /dev/null @@ -1,50 +0,0 @@ -From a3ef3c2da675a8a564c8bea1a511cdd0a2a9aa49 Mon Sep 17 00:00:00 2001 -From: Imre Deak -Date: Thu, 5 Jun 2025 11:28:46 +0300 -Subject: drm/dp: Change AUX DPCD probe address from DPCD_REV to LANE0_1_STATUS -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -From: Imre Deak - -commit a3ef3c2da675a8a564c8bea1a511cdd0a2a9aa49 upstream. - -Reading DPCD registers has side-effects in general. In particular -accessing registers outside of the link training register range -(0x102-0x106, 0x202-0x207, 0x200c-0x200f, 0x2216) is explicitly -forbidden by the DP v2.1 Standard, see - -3.6.5.1 DPTX AUX Transaction Handling Mandates -3.6.7.4 128b/132b DP Link Layer LTTPR Link Training Mandates - -Based on my tests, accessing the DPCD_REV register during the link -training of an UHBR TBT DP tunnel sink leads to link training failures. - -Solve the above by using the DP_LANE0_1_STATUS (0x202) register for the -DPCD register access quirk. - -Cc: -Cc: Ville Syrjälä -Cc: Jani Nikula -Acked-by: Jani Nikula -Signed-off-by: Imre Deak -Link: https://lore.kernel.org/r/20250605082850.65136-2-imre.deak@intel.com -(cherry picked from commit a40c5d727b8111b5db424a1e43e14a1dcce1e77f) -Signed-off-by: Joonas Lahtinen -Signed-off-by: Greg Kroah-Hartman ---- - drivers/gpu/drm/display/drm_dp_helper.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/gpu/drm/display/drm_dp_helper.c -+++ b/drivers/gpu/drm/display/drm_dp_helper.c -@@ -664,7 +664,7 @@ ssize_t drm_dp_dpcd_read(struct drm_dp_a - * monitor doesn't power down exactly after the throw away read. - */ - if (!aux->is_remote) { -- ret = drm_dp_dpcd_probe(aux, DP_DPCD_REV); -+ ret = drm_dp_dpcd_probe(aux, DP_LANE0_1_STATUS); - if (ret < 0) - return ret; - } diff --git a/queue-6.12/series b/queue-6.12/series index 2d11a45298..5cf5c02974 100644 --- a/queue-6.12/series +++ b/queue-6.12/series @@ -84,7 +84,6 @@ fs-proc-task_mmu-fix-page_is_pfnzero-detection-for-the-huge-zero-folio.patch lib-group_cpus-fix-null-pointer-dereference-from-group_cpus_evenly.patch revert-riscv-define-task_size_max-for-__access_ok.patch revert-riscv-misaligned-fix-sleeping-function-called-during-misaligned-access-handling.patch -drm-dp-change-aux-dpcd-probe-address-from-dpcd_rev-to-lane0_1_status.patch drm-xe-display-add-check-for-alloc_ordered_workqueue.patch hid-wacom-fix-crash-in-wacom_aes_battery_handler.patch atm-clip-prevent-null-deref-in-clip_push.patch diff --git a/queue-6.15/drm-dp-change-aux-dpcd-probe-address-from-dpcd_rev-to-lane0_1_status.patch b/queue-6.15/drm-dp-change-aux-dpcd-probe-address-from-dpcd_rev-to-lane0_1_status.patch deleted file mode 100644 index 8163475e68..0000000000 --- a/queue-6.15/drm-dp-change-aux-dpcd-probe-address-from-dpcd_rev-to-lane0_1_status.patch +++ /dev/null @@ -1,50 +0,0 @@ -From a3ef3c2da675a8a564c8bea1a511cdd0a2a9aa49 Mon Sep 17 00:00:00 2001 -From: Imre Deak -Date: Thu, 5 Jun 2025 11:28:46 +0300 -Subject: drm/dp: Change AUX DPCD probe address from DPCD_REV to LANE0_1_STATUS -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -From: Imre Deak - -commit a3ef3c2da675a8a564c8bea1a511cdd0a2a9aa49 upstream. - -Reading DPCD registers has side-effects in general. In particular -accessing registers outside of the link training register range -(0x102-0x106, 0x202-0x207, 0x200c-0x200f, 0x2216) is explicitly -forbidden by the DP v2.1 Standard, see - -3.6.5.1 DPTX AUX Transaction Handling Mandates -3.6.7.4 128b/132b DP Link Layer LTTPR Link Training Mandates - -Based on my tests, accessing the DPCD_REV register during the link -training of an UHBR TBT DP tunnel sink leads to link training failures. - -Solve the above by using the DP_LANE0_1_STATUS (0x202) register for the -DPCD register access quirk. - -Cc: -Cc: Ville Syrjälä -Cc: Jani Nikula -Acked-by: Jani Nikula -Signed-off-by: Imre Deak -Link: https://lore.kernel.org/r/20250605082850.65136-2-imre.deak@intel.com -(cherry picked from commit a40c5d727b8111b5db424a1e43e14a1dcce1e77f) -Signed-off-by: Joonas Lahtinen -Signed-off-by: Greg Kroah-Hartman ---- - drivers/gpu/drm/display/drm_dp_helper.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/gpu/drm/display/drm_dp_helper.c -+++ b/drivers/gpu/drm/display/drm_dp_helper.c -@@ -723,7 +723,7 @@ ssize_t drm_dp_dpcd_read(struct drm_dp_a - * monitor doesn't power down exactly after the throw away read. - */ - if (!aux->is_remote) { -- ret = drm_dp_dpcd_probe(aux, DP_DPCD_REV); -+ ret = drm_dp_dpcd_probe(aux, DP_LANE0_1_STATUS); - if (ret < 0) - return ret; - } diff --git a/queue-6.15/series b/queue-6.15/series index 933aac67ea..1f420626e8 100644 --- a/queue-6.15/series +++ b/queue-6.15/series @@ -120,7 +120,6 @@ fs-proc-task_mmu-fix-page_is_pfnzero-detection-for-the-huge-zero-folio.patch lib-group_cpus-fix-null-pointer-dereference-from-group_cpus_evenly.patch revert-riscv-define-task_size_max-for-__access_ok.patch revert-riscv-misaligned-fix-sleeping-function-called-during-misaligned-access-handling.patch -drm-dp-change-aux-dpcd-probe-address-from-dpcd_rev-to-lane0_1_status.patch drm-amd-display-add-sanity-checks-for-drm_edid_raw.patch drm-amdgpu-mes-add-compatibility-checks-for-set_hw_resource_1.patch drm-xe-display-add-check-for-alloc_ordered_workqueue.patch diff --git a/queue-6.6/drm-dp-change-aux-dpcd-probe-address-from-dpcd_rev-to-lane0_1_status.patch b/queue-6.6/drm-dp-change-aux-dpcd-probe-address-from-dpcd_rev-to-lane0_1_status.patch deleted file mode 100644 index 9e4b1d2f38..0000000000 --- a/queue-6.6/drm-dp-change-aux-dpcd-probe-address-from-dpcd_rev-to-lane0_1_status.patch +++ /dev/null @@ -1,50 +0,0 @@ -From a3ef3c2da675a8a564c8bea1a511cdd0a2a9aa49 Mon Sep 17 00:00:00 2001 -From: Imre Deak -Date: Thu, 5 Jun 2025 11:28:46 +0300 -Subject: drm/dp: Change AUX DPCD probe address from DPCD_REV to LANE0_1_STATUS -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -From: Imre Deak - -commit a3ef3c2da675a8a564c8bea1a511cdd0a2a9aa49 upstream. - -Reading DPCD registers has side-effects in general. In particular -accessing registers outside of the link training register range -(0x102-0x106, 0x202-0x207, 0x200c-0x200f, 0x2216) is explicitly -forbidden by the DP v2.1 Standard, see - -3.6.5.1 DPTX AUX Transaction Handling Mandates -3.6.7.4 128b/132b DP Link Layer LTTPR Link Training Mandates - -Based on my tests, accessing the DPCD_REV register during the link -training of an UHBR TBT DP tunnel sink leads to link training failures. - -Solve the above by using the DP_LANE0_1_STATUS (0x202) register for the -DPCD register access quirk. - -Cc: -Cc: Ville Syrjälä -Cc: Jani Nikula -Acked-by: Jani Nikula -Signed-off-by: Imre Deak -Link: https://lore.kernel.org/r/20250605082850.65136-2-imre.deak@intel.com -(cherry picked from commit a40c5d727b8111b5db424a1e43e14a1dcce1e77f) -Signed-off-by: Joonas Lahtinen -Signed-off-by: Greg Kroah-Hartman ---- - drivers/gpu/drm/display/drm_dp_helper.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/gpu/drm/display/drm_dp_helper.c -+++ b/drivers/gpu/drm/display/drm_dp_helper.c -@@ -663,7 +663,7 @@ ssize_t drm_dp_dpcd_read(struct drm_dp_a - * monitor doesn't power down exactly after the throw away read. - */ - if (!aux->is_remote) { -- ret = drm_dp_dpcd_probe(aux, DP_DPCD_REV); -+ ret = drm_dp_dpcd_probe(aux, DP_LANE0_1_STATUS); - if (ret < 0) - return ret; - } diff --git a/queue-6.6/series b/queue-6.6/series index 17aacf1d67..8b3aa73f13 100644 --- a/queue-6.6/series +++ b/queue-6.6/series @@ -73,7 +73,6 @@ mm-damon-sysfs-schemes-free-old-damon_sysfs_scheme_filter-memcg_path-on-write.pa asoc-amd-yc-add-dmi-quirk-for-lenovo-ideapad-slim-5-15.patch s390-pkey-prevent-overflow-in-size-calculation-for-memdup_user.patch lib-group_cpus-fix-null-pointer-dereference-from-group_cpus_evenly.patch -drm-dp-change-aux-dpcd-probe-address-from-dpcd_rev-to-lane0_1_status.patch atm-clip-prevent-null-deref-in-clip_push.patch alsa-usb-audio-fix-out-of-bounds-read-in-snd_usb_get.patch attach_recursive_mnt-do-not-lock-the-covering-tree-w.patch -- 2.47.2