From e206221e523cc348424051dbf38d6caa9f4e8c1e Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Thu, 4 Feb 2021 15:58:07 +0100 Subject: [PATCH] 5.10-stable patches added patches: mlxsw-spectrum_span-do-not-overwrite-policer-configuration.patch net-dsa-microchip-adjust-reset-release-timing-to-match-reference-reset-circuit.patch net-fec-put-child-node-on-error-path.patch net-octeontx2-make-sure-the-buffer-is-128-byte-aligned.patch net-stmmac-dwmac-intel-plat-remove-config-data-on-error.patch stmmac-intel-configure-ehl-pse0-gbe-and-pse1-gbe-to-32-bits-dma-addressing.patch --- ...-not-overwrite-policer-configuration.patch | 86 +++++++++++++++++ ...ing-to-match-reference-reset-circuit.patch | 52 ++++++++++ ...net-fec-put-child-node-on-error-path.patch | 46 +++++++++ ...-sure-the-buffer-is-128-byte-aligned.patch | 41 ++++++++ ...tel-plat-remove-config-data-on-error.patch | 45 +++++++++ queue-5.10/series | 6 ++ ...d-pse1-gbe-to-32-bits-dma-addressing.patch | 95 +++++++++++++++++++ 7 files changed, 371 insertions(+) create mode 100644 queue-5.10/mlxsw-spectrum_span-do-not-overwrite-policer-configuration.patch create mode 100644 queue-5.10/net-dsa-microchip-adjust-reset-release-timing-to-match-reference-reset-circuit.patch create mode 100644 queue-5.10/net-fec-put-child-node-on-error-path.patch create mode 100644 queue-5.10/net-octeontx2-make-sure-the-buffer-is-128-byte-aligned.patch create mode 100644 queue-5.10/net-stmmac-dwmac-intel-plat-remove-config-data-on-error.patch create mode 100644 queue-5.10/series create mode 100644 queue-5.10/stmmac-intel-configure-ehl-pse0-gbe-and-pse1-gbe-to-32-bits-dma-addressing.patch diff --git a/queue-5.10/mlxsw-spectrum_span-do-not-overwrite-policer-configuration.patch b/queue-5.10/mlxsw-spectrum_span-do-not-overwrite-policer-configuration.patch new file mode 100644 index 00000000000..3b813242fed --- /dev/null +++ b/queue-5.10/mlxsw-spectrum_span-do-not-overwrite-policer-configuration.patch @@ -0,0 +1,86 @@ +From b6f6881aaf2344bf35a4221810737abe5fd210af Mon Sep 17 00:00:00 2001 +From: Ido Schimmel +Date: Thu, 28 Jan 2021 16:48:20 +0200 +Subject: mlxsw: spectrum_span: Do not overwrite policer configuration + +From: Ido Schimmel + +commit b6f6881aaf2344bf35a4221810737abe5fd210af upstream. + +The purpose of the delayed work in the SPAN module is to potentially +update the destination port and various encapsulation parameters of SPAN +agents that point to a VLAN device or a GRE tap. The destination port +can change following the insertion of a new route, for example. + +SPAN agents that point to a physical port or the CPU port are static and +never change throughout the lifetime of the SPAN agent. Therefore, skip +over them in the delayed work. + +This fixes an issue where the delayed work overwrites the policer +that was set on a SPAN agent pointing to the CPU. Modifying the delayed +work to inherit the original policer configuration is error-prone, as +the same will be needed for any new parameter. + +Fixes: 4039504e6a0c ("mlxsw: spectrum_span: Allow setting policer on a SPAN agent") +Reviewed-by: Petr Machata +Signed-off-by: Ido Schimmel +Signed-off-by: Jakub Kicinski +Signed-off-by: Greg Kroah-Hartman +--- + drivers/net/ethernet/mellanox/mlxsw/spectrum_span.c | 6 ++++++ + drivers/net/ethernet/mellanox/mlxsw/spectrum_span.h | 1 + + 2 files changed, 7 insertions(+) + +diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_span.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_span.c +index c6c5826aba41..1892cea05ee7 100644 +--- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_span.c ++++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_span.c +@@ -157,6 +157,7 @@ mlxsw_sp1_span_entry_cpu_deconfigure(struct mlxsw_sp_span_entry *span_entry) + + static const + struct mlxsw_sp_span_entry_ops mlxsw_sp1_span_entry_ops_cpu = { ++ .is_static = true, + .can_handle = mlxsw_sp1_span_cpu_can_handle, + .parms_set = mlxsw_sp1_span_entry_cpu_parms, + .configure = mlxsw_sp1_span_entry_cpu_configure, +@@ -214,6 +215,7 @@ mlxsw_sp_span_entry_phys_deconfigure(struct mlxsw_sp_span_entry *span_entry) + + static const + struct mlxsw_sp_span_entry_ops mlxsw_sp_span_entry_ops_phys = { ++ .is_static = true, + .can_handle = mlxsw_sp_port_dev_check, + .parms_set = mlxsw_sp_span_entry_phys_parms, + .configure = mlxsw_sp_span_entry_phys_configure, +@@ -721,6 +723,7 @@ mlxsw_sp2_span_entry_cpu_deconfigure(struct mlxsw_sp_span_entry *span_entry) + + static const + struct mlxsw_sp_span_entry_ops mlxsw_sp2_span_entry_ops_cpu = { ++ .is_static = true, + .can_handle = mlxsw_sp2_span_cpu_can_handle, + .parms_set = mlxsw_sp2_span_entry_cpu_parms, + .configure = mlxsw_sp2_span_entry_cpu_configure, +@@ -1036,6 +1039,9 @@ static void mlxsw_sp_span_respin_work(struct work_struct *work) + if (!refcount_read(&curr->ref_count)) + continue; + ++ if (curr->ops->is_static) ++ continue; ++ + err = curr->ops->parms_set(mlxsw_sp, curr->to_dev, &sparms); + if (err) + continue; +diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_span.h b/drivers/net/ethernet/mellanox/mlxsw/spectrum_span.h +index d907718bc8c5..aa1cd409c0e2 100644 +--- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_span.h ++++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_span.h +@@ -60,6 +60,7 @@ struct mlxsw_sp_span_entry { + }; + + struct mlxsw_sp_span_entry_ops { ++ bool is_static; + bool (*can_handle)(const struct net_device *to_dev); + int (*parms_set)(struct mlxsw_sp *mlxsw_sp, + const struct net_device *to_dev, +-- +2.30.0 + diff --git a/queue-5.10/net-dsa-microchip-adjust-reset-release-timing-to-match-reference-reset-circuit.patch b/queue-5.10/net-dsa-microchip-adjust-reset-release-timing-to-match-reference-reset-circuit.patch new file mode 100644 index 00000000000..459578954dd --- /dev/null +++ b/queue-5.10/net-dsa-microchip-adjust-reset-release-timing-to-match-reference-reset-circuit.patch @@ -0,0 +1,52 @@ +From 1c45ba93d34cd6af75228f34d0675200c81738b5 Mon Sep 17 00:00:00 2001 +From: Marek Vasut +Date: Wed, 20 Jan 2021 04:05:02 +0100 +Subject: net: dsa: microchip: Adjust reset release timing to match reference reset circuit + +From: Marek Vasut + +commit 1c45ba93d34cd6af75228f34d0675200c81738b5 upstream. + +KSZ8794CNX datasheet section 8.0 RESET CIRCUIT describes recommended +circuit for interfacing with CPU/FPGA reset consisting of 10k pullup +resistor and 10uF capacitor to ground. This circuit takes ~100 ms to +rise enough to release the reset. + +For maximum supply voltage VDDIO=3.3V VIH=2.0V R=10kR C=10uF that is + VDDIO - VIH + t = R * C * -ln( ------------- ) = 10000*0.00001*-(-0.93)=0.093 s + VDDIO +so we need ~95 ms for the reset to really de-assert, and then the +original 100us for the switch itself to come out of reset. Simply +msleep() for 100 ms which fits the constraint with a bit of extra +space. + +Fixes: 5b797980908a ("net: dsa: microchip: Implement recommended reset timing") +Reviewed-by: Florian Fainelli +Signed-off-by: Marek Vasut +Cc: Michael Grzeschik +Reviewed-by: Paul Barker +Reviewed-by: Andrew Lunn +Link: https://lore.kernel.org/r/20210120030502.617185-1-marex@denx.de +Signed-off-by: Jakub Kicinski +Signed-off-by: Greg Kroah-Hartman +--- + drivers/net/dsa/microchip/ksz_common.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/microchip/ksz_common.c +index 489963664443..389abfd27770 100644 +--- a/drivers/net/dsa/microchip/ksz_common.c ++++ b/drivers/net/dsa/microchip/ksz_common.c +@@ -400,7 +400,7 @@ int ksz_switch_register(struct ksz_device *dev, + gpiod_set_value_cansleep(dev->reset_gpio, 1); + usleep_range(10000, 12000); + gpiod_set_value_cansleep(dev->reset_gpio, 0); +- usleep_range(100, 1000); ++ msleep(100); + } + + mutex_init(&dev->dev_mutex); +-- +2.30.0 + diff --git a/queue-5.10/net-fec-put-child-node-on-error-path.patch b/queue-5.10/net-fec-put-child-node-on-error-path.patch new file mode 100644 index 00000000000..4544cc8543d --- /dev/null +++ b/queue-5.10/net-fec-put-child-node-on-error-path.patch @@ -0,0 +1,46 @@ +From 0607a2cddb60f4548b55e28ac56a8d73493a45bb Mon Sep 17 00:00:00 2001 +From: Pan Bian +Date: Wed, 20 Jan 2021 04:20:37 -0800 +Subject: net: fec: put child node on error path + +From: Pan Bian + +commit 0607a2cddb60f4548b55e28ac56a8d73493a45bb upstream. + +Also decrement the reference count of child device on error path. + +Fixes: 3e782985cb3c ("net: ethernet: fec: Allow configuration of MDIO bus speed") +Signed-off-by: Pan Bian +Link: https://lore.kernel.org/r/20210120122037.83897-1-bianpan2016@163.com +Signed-off-by: Jakub Kicinski +Signed-off-by: Greg Kroah-Hartman +--- + drivers/net/ethernet/freescale/fec_main.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/net/ethernet/freescale/fec_main.c b/drivers/net/ethernet/freescale/fec_main.c +index 04f24c66cf36..55c28fbc5f9e 100644 +--- a/drivers/net/ethernet/freescale/fec_main.c ++++ b/drivers/net/ethernet/freescale/fec_main.c +@@ -2165,9 +2165,9 @@ static int fec_enet_mii_init(struct platform_device *pdev) + fep->mii_bus->parent = &pdev->dev; + + err = of_mdiobus_register(fep->mii_bus, node); +- of_node_put(node); + if (err) + goto err_out_free_mdiobus; ++ of_node_put(node); + + mii_cnt++; + +@@ -2180,6 +2180,7 @@ static int fec_enet_mii_init(struct platform_device *pdev) + err_out_free_mdiobus: + mdiobus_free(fep->mii_bus); + err_out: ++ of_node_put(node); + return err; + } + +-- +2.30.0 + diff --git a/queue-5.10/net-octeontx2-make-sure-the-buffer-is-128-byte-aligned.patch b/queue-5.10/net-octeontx2-make-sure-the-buffer-is-128-byte-aligned.patch new file mode 100644 index 00000000000..0c0ec10945d --- /dev/null +++ b/queue-5.10/net-octeontx2-make-sure-the-buffer-is-128-byte-aligned.patch @@ -0,0 +1,41 @@ +From db2805150a0f27c00ad286a29109397a7723adad Mon Sep 17 00:00:00 2001 +From: Kevin Hao +Date: Thu, 21 Jan 2021 15:09:06 +0800 +Subject: net: octeontx2: Make sure the buffer is 128 byte aligned + +From: Kevin Hao + +commit db2805150a0f27c00ad286a29109397a7723adad upstream. + +The octeontx2 hardware needs the buffer to be 128 byte aligned. +But in the current implementation of napi_alloc_frag(), it can't +guarantee the return address is 128 byte aligned even the request size +is a multiple of 128 bytes, so we have to request an extra 128 bytes and +use the PTR_ALIGN() to make sure that the buffer is aligned correctly. + +Fixes: 7a36e4918e30 ("octeontx2-pf: Use the napi_alloc_frag() to alloc the pool buffers") +Reported-by: Subbaraya Sundeep +Signed-off-by: Kevin Hao +Tested-by: Subbaraya Sundeep +Link: https://lore.kernel.org/r/20210121070906.25380-1-haokexin@gmail.com +Signed-off-by: Jakub Kicinski +Signed-off-by: Greg Kroah-Hartman +--- + drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c ++++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c +@@ -473,10 +473,11 @@ dma_addr_t __otx2_alloc_rbuf(struct otx2 + dma_addr_t iova; + u8 *buf; + +- buf = napi_alloc_frag(pool->rbsize); ++ buf = napi_alloc_frag(pool->rbsize + OTX2_ALIGN); + if (unlikely(!buf)) + return -ENOMEM; + ++ buf = PTR_ALIGN(buf, OTX2_ALIGN); + iova = dma_map_single_attrs(pfvf->dev, buf, pool->rbsize, + DMA_FROM_DEVICE, DMA_ATTR_SKIP_CPU_SYNC); + if (unlikely(dma_mapping_error(pfvf->dev, iova))) { diff --git a/queue-5.10/net-stmmac-dwmac-intel-plat-remove-config-data-on-error.patch b/queue-5.10/net-stmmac-dwmac-intel-plat-remove-config-data-on-error.patch new file mode 100644 index 00000000000..45bc4738268 --- /dev/null +++ b/queue-5.10/net-stmmac-dwmac-intel-plat-remove-config-data-on-error.patch @@ -0,0 +1,45 @@ +From 3765d86ffcd346913c372d69cdc05dc8d56119ac Mon Sep 17 00:00:00 2001 +From: Pan Bian +Date: Wed, 20 Jan 2021 03:07:44 -0800 +Subject: net: stmmac: dwmac-intel-plat: remove config data on error + +From: Pan Bian + +commit 3765d86ffcd346913c372d69cdc05dc8d56119ac upstream. + +Remove the config data when rate setting fails. + +Fixes: 9efc9b2b04c7 ("net: stmmac: Add dwmac-intel-plat for GBE driver") +Signed-off-by: Pan Bian +Link: https://lore.kernel.org/r/20210120110745.36412-1-bianpan2016@163.com +Signed-off-by: Jakub Kicinski +Signed-off-by: Greg Kroah-Hartman +--- + drivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c +index 82b1c7a5a7a9..ba0e4d2b256a 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c +@@ -129,7 +129,7 @@ static int intel_eth_plat_probe(struct platform_device *pdev) + if (ret) { + dev_err(&pdev->dev, + "Failed to set tx_clk\n"); +- return ret; ++ goto err_remove_config_dt; + } + } + } +@@ -143,7 +143,7 @@ static int intel_eth_plat_probe(struct platform_device *pdev) + if (ret) { + dev_err(&pdev->dev, + "Failed to set clk_ptp_ref\n"); +- return ret; ++ goto err_remove_config_dt; + } + } + } +-- +2.30.0 + diff --git a/queue-5.10/series b/queue-5.10/series new file mode 100644 index 00000000000..600682851b7 --- /dev/null +++ b/queue-5.10/series @@ -0,0 +1,6 @@ +net-dsa-microchip-adjust-reset-release-timing-to-match-reference-reset-circuit.patch +net-stmmac-dwmac-intel-plat-remove-config-data-on-error.patch +net-fec-put-child-node-on-error-path.patch +net-octeontx2-make-sure-the-buffer-is-128-byte-aligned.patch +stmmac-intel-configure-ehl-pse0-gbe-and-pse1-gbe-to-32-bits-dma-addressing.patch +mlxsw-spectrum_span-do-not-overwrite-policer-configuration.patch diff --git a/queue-5.10/stmmac-intel-configure-ehl-pse0-gbe-and-pse1-gbe-to-32-bits-dma-addressing.patch b/queue-5.10/stmmac-intel-configure-ehl-pse0-gbe-and-pse1-gbe-to-32-bits-dma-addressing.patch new file mode 100644 index 00000000000..77a9d11560d --- /dev/null +++ b/queue-5.10/stmmac-intel-configure-ehl-pse0-gbe-and-pse1-gbe-to-32-bits-dma-addressing.patch @@ -0,0 +1,95 @@ +From 7cfc4486e7ea25bd405df162d9c131ee5d4c6c93 Mon Sep 17 00:00:00 2001 +From: Voon Weifeng +Date: Tue, 26 Jan 2021 18:08:44 +0800 +Subject: stmmac: intel: Configure EHL PSE0 GbE and PSE1 GbE to 32 bits DMA addressing + +From: Voon Weifeng + +commit 7cfc4486e7ea25bd405df162d9c131ee5d4c6c93 upstream. + +Fix an issue where dump stack is printed and Reset Adapter occurs when +PSE0 GbE or/and PSE1 GbE is/are enabled. EHL PSE0 GbE and PSE1 GbE use +32 bits DMA addressing whereas EHL PCH GbE uses 64 bits DMA addressing. + +[ 25.535095] ------------[ cut here ]------------ +[ 25.540276] NETDEV WATCHDOG: enp0s29f2 (intel-eth-pci): transmit queue 2 timed out +[ 25.548749] WARNING: CPU: 2 PID: 0 at net/sched/sch_generic.c:443 dev_watchdog+0x259/0x260 +[ 25.558004] Modules linked in: 8021q bnep bluetooth ecryptfs snd_hda_codec_hdmi intel_gpy marvell intel_ishtp_loader intel_ishtp_hid iTCO_wdt mei_hdcp iTCO_vendor_support x86_pkg_temp_thermal kvm_intel dwmac_intel stmmac kvm igb pcs_xpcs irqbypass phylink snd_hda_intel intel_rapl_msr pcspkr dca snd_hda_codec i915 i2c_i801 i2c_smbus libphy intel_ish_ipc snd_hda_core mei_me intel_ishtp mei spi_dw_pci 8250_lpss spi_dw thermal dw_dmac_core parport_pc tpm_crb tpm_tis parport tpm_tis_core tpm intel_pmc_core sch_fq_codel uhid fuse configfs snd_sof_pci snd_sof_intel_byt snd_sof_intel_ipc snd_sof_intel_hda_common snd_sof_xtensa_dsp snd_sof snd_soc_acpi_intel_match snd_soc_acpi snd_intel_dspcfg ledtrig_audio snd_soc_core snd_compress ac97_bus snd_pcm snd_timer snd soundcore +[ 25.633795] CPU: 2 PID: 0 Comm: swapper/2 Tainted: G U 5.11.0-rc4-intel-lts-MISMAIL5+ #5 +[ 25.644306] Hardware name: Intel Corporation Elkhart Lake Embedded Platform/ElkhartLake LPDDR4x T4 RVP1, BIOS EHLSFWI1.R00.2434.A00.2010231402 10/23/2020 +[ 25.659674] RIP: 0010:dev_watchdog+0x259/0x260 +[ 25.664650] Code: e8 3b 6b 60 ff eb 98 4c 89 ef c6 05 ec e7 bf 00 01 e8 fb e5 fa ff 89 d9 4c 89 ee 48 c7 c7 78 31 d2 9e 48 89 c2 e8 79 1b 18 00 <0f> 0b e9 77 ff ff ff 0f 1f 44 00 00 48 c7 47 08 00 00 00 00 48 c7 +[ 25.685647] RSP: 0018:ffffb7ca80160eb8 EFLAGS: 00010286 +[ 25.691498] RAX: 0000000000000000 RBX: 0000000000000002 RCX: 0000000000000103 +[ 25.699483] RDX: 0000000080000103 RSI: 00000000000000f6 RDI: 00000000ffffffff +[ 25.707465] RBP: ffff985709ce0440 R08: 0000000000000000 R09: c0000000ffffefff +[ 25.715455] R10: ffffb7ca80160cf0 R11: ffffb7ca80160ce8 R12: ffff985709ce039c +[ 25.723438] R13: ffff985709ce0000 R14: 0000000000000008 R15: ffff9857068af940 +[ 25.731425] FS: 0000000000000000(0000) GS:ffff985864300000(0000) knlGS:0000000000000000 +[ 25.740481] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 +[ 25.746913] CR2: 00005567f8bb76b8 CR3: 00000001f8e0a000 CR4: 0000000000350ee0 +[ 25.754900] Call Trace: +[ 25.757631] +[ 25.759891] ? qdisc_put_unlocked+0x30/0x30 +[ 25.764565] ? qdisc_put_unlocked+0x30/0x30 +[ 25.769245] call_timer_fn+0x2e/0x140 +[ 25.773346] run_timer_softirq+0x1f3/0x430 +[ 25.777932] ? __hrtimer_run_queues+0x12c/0x2c0 +[ 25.783005] ? ktime_get+0x3e/0xa0 +[ 25.786812] __do_softirq+0xa6/0x2ef +[ 25.790816] asm_call_irq_on_stack+0xf/0x20 +[ 25.795501] +[ 25.797852] do_softirq_own_stack+0x5d/0x80 +[ 25.802538] irq_exit_rcu+0x94/0xb0 +[ 25.806475] sysvec_apic_timer_interrupt+0x42/0xc0 +[ 25.811836] asm_sysvec_apic_timer_interrupt+0x12/0x20 +[ 25.817586] RIP: 0010:cpuidle_enter_state+0xd9/0x370 +[ 25.823142] Code: 85 c0 0f 8f 0a 02 00 00 31 ff e8 22 d5 7e ff 45 84 ff 74 12 9c 58 f6 c4 02 0f 85 47 02 00 00 31 ff e8 7b a0 84 ff fb 45 85 f6 <0f> 88 ab 00 00 00 49 63 ce 48 2b 2c 24 48 89 c8 48 6b d1 68 48 c1 +[ 25.844140] RSP: 0018:ffffb7ca800f7e80 EFLAGS: 00000206 +[ 25.849996] RAX: ffff985864300000 RBX: 0000000000000003 RCX: 000000000000001f +[ 25.857975] RDX: 00000005f2028ea8 RSI: ffffffff9ec5907f RDI: ffffffff9ec62a5d +[ 25.865961] RBP: 00000005f2028ea8 R08: 0000000000000000 R09: 0000000000029d00 +[ 25.873947] R10: 000000137b0e0508 R11: ffff9858643294e4 R12: ffff9858643336d0 +[ 25.881935] R13: ffffffff9ef74b00 R14: 0000000000000003 R15: 0000000000000000 +[ 25.889918] cpuidle_enter+0x29/0x40 +[ 25.893922] do_idle+0x24a/0x290 +[ 25.897536] cpu_startup_entry+0x19/0x20 +[ 25.901930] start_secondary+0x128/0x160 +[ 25.906326] secondary_startup_64_no_verify+0xb0/0xbb +[ 25.911983] ---[ end trace b4c0c8195d0ba61f ]--- +[ 25.917193] intel-eth-pci 0000:00:1d.2 enp0s29f2: Reset adapter. + +Fixes: 67c08ac4140a ("net: stmmac: add EHL PSE0 & PSE1 1Gbps PCI info and PCI ID") +Signed-off-by: Voon Weifeng +Co-developed-by: Mohammad Athari Bin Ismail +Signed-off-by: Mohammad Athari Bin Ismail +Link: https://lore.kernel.org/r/20210126100844.30326-1-mohammad.athari.ismail@intel.com +Signed-off-by: Jakub Kicinski +Signed-off-by: Greg Kroah-Hartman +--- + drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c +index 9a6a519426a0..103d2448e9e0 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c +@@ -375,6 +375,7 @@ static int ehl_pse0_common_data(struct pci_dev *pdev, + struct plat_stmmacenet_data *plat) + { + plat->bus_id = 2; ++ plat->addr64 = 32; + return ehl_common_data(pdev, plat); + } + +@@ -406,6 +407,7 @@ static int ehl_pse1_common_data(struct pci_dev *pdev, + struct plat_stmmacenet_data *plat) + { + plat->bus_id = 3; ++ plat->addr64 = 32; + return ehl_common_data(pdev, plat); + } + +-- +2.30.0 + -- 2.47.3