From e306fff7f83285a385c29927833b1633e51d431b Mon Sep 17 00:00:00 2001 From: Daniel Henrique Barboza Date: Wed, 18 Dec 2024 08:40:22 -0300 Subject: [PATCH] target/riscv: add shtvala shtvala is described in RVA22 as: "htval must be written with the faulting guest physical address in all circumstances permitted by the ISA." This is the case since commit 3067553993, so claim support for shtvala. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Message-ID: <20241218114026.1652352-6-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis --- target/riscv/cpu.c | 1 + tests/data/acpi/riscv64/virt/RHCT | Bin 356 -> 364 bytes 2 files changed, 1 insertion(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 4f76efc298..fe5f7b572f 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -184,6 +184,7 @@ const RISCVIsaExtData isa_edata_arr[] = { ISA_EXT_DATA_ENTRY(zhinx, PRIV_VERSION_1_12_0, ext_zhinx), ISA_EXT_DATA_ENTRY(zhinxmin, PRIV_VERSION_1_12_0, ext_zhinxmin), ISA_EXT_DATA_ENTRY(shcounterenw, PRIV_VERSION_1_12_0, has_priv_1_12), + ISA_EXT_DATA_ENTRY(shtvala, PRIV_VERSION_1_12_0, has_priv_1_12), ISA_EXT_DATA_ENTRY(shvstvala, PRIV_VERSION_1_12_0, has_priv_1_12), ISA_EXT_DATA_ENTRY(smaia, PRIV_VERSION_1_12_0, ext_smaia), ISA_EXT_DATA_ENTRY(smcntrpmf, PRIV_VERSION_1_12_0, ext_smcntrpmf), diff --git a/tests/data/acpi/riscv64/virt/RHCT b/tests/data/acpi/riscv64/virt/RHCT index 15b82b5bb1cf24cf501e74cb82682742e0041ea6..065f894010272e7f27834b2c8d5d5fb0c21066a1 100644 GIT binary patch delta 46 zc-niy^oEHm$iq1#hmnDSF=ir{0UH-1BLgGjM2GFHC1r^@i4(tMa5w=aeSjDM5FiTU delta 40 tc-niz^n{5k$iq1#g^_`Q@%ltA12!f`MuwjZ6CJis{GZBU1r&AxVgTjp3LpRg -- 2.39.5