From ec2c62dacc186893a6ce63089f96b1906dd68804 Mon Sep 17 00:00:00 2001 From: Alistair Francis Date: Wed, 8 Jun 2022 16:20:15 +1000 Subject: [PATCH] hw/riscv: boot: Reduce FDT address alignment constraints We previously stored the device tree at a 16MB alignment from the end of memory (or 3GB). This means we need at least 16MB of memory to be able to do this. We don't actually need the FDT to be 16MB aligned, so let's drop it down to 2MB so that we can support systems with less memory, while also allowing FDT size expansion. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/992 Signed-off-by: Alistair Francis Reviewed-by: Atish Patra Reviewed-by: Bin Meng Tested-by: Bin Meng Message-Id: <20220608062015.317894-1-alistair.francis@opensource.wdc.com> Signed-off-by: Alistair Francis --- hw/riscv/boot.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c index 2d80f40b316..06b4fc5ac30 100644 --- a/hw/riscv/boot.c +++ b/hw/riscv/boot.c @@ -227,11 +227,11 @@ uint64_t riscv_load_fdt(hwaddr dram_base, uint64_t mem_size, void *fdt) /* * We should put fdt as far as possible to avoid kernel/initrd overwriting * its content. But it should be addressable by 32 bit system as well. - * Thus, put it at an 16MB aligned address that less than fdt size from the + * Thus, put it at an 2MB aligned address that less than fdt size from the * end of dram or 3GB whichever is lesser. */ temp = (dram_base < 3072 * MiB) ? MIN(dram_end, 3072 * MiB) : dram_end; - fdt_addr = QEMU_ALIGN_DOWN(temp - fdtsize, 16 * MiB); + fdt_addr = QEMU_ALIGN_DOWN(temp - fdtsize, 2 * MiB); ret = fdt_pack(fdt); /* Should only fail if we've built a corrupted tree */ -- 2.39.5