From edfddc63c0f7822964a166ab7a367a81993ef5f2 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Sun, 1 Jul 2018 13:38:43 +0200 Subject: [PATCH] 4.17-stable patches added patches: auxdisplay-fix-broken-menu.patch btrfs-fix-return-value-on-rename-exchange-failure.patch cpufreq-intel_pstate-fix-scaling-max-min-limits-with-turbo-3.0.patch iio-adc-ad7791-remove-sample-freq-sysfs-attributes.patch iio-sca3000-fix-an-error-handling-path-in-sca3000_probe.patch irqchip-gic-v3-its-don-t-bind-lpi-to-unavailable-numa-node.patch locking-rwsem-fix-up_read_non_owner-warning-with-debug_rwsems.patch mips-io-add-barrier-after-register-read-in-inx.patch mips-pb44-fix-i2c-gpio-gpio-descriptor-table.patch pinctrl-armada-37xx-fix-spurious-irq-management.patch pinctrl-devicetree-fix-pctldev-pointer-overwrite.patch pinctrl-samsung-correct-eintg-banks-order.patch time-make-sure-jiffies_to_msecs-preserves-non-zero-time-periods.patch x.509-unpack-rsa-signaturevalue-field-from-bit-string.patch --- queue-4.17/auxdisplay-fix-broken-menu.patch | 67 +++++++++++ ...urn-value-on-rename-exchange-failure.patch | 51 ++++++++ ...caling-max-min-limits-with-turbo-3.0.patch | 112 ++++++++++++++++++ ...-remove-sample-freq-sysfs-attributes.patch | 93 +++++++++++++++ ...error-handling-path-in-sca3000_probe.patch | 57 +++++++++ ...-t-bind-lpi-to-unavailable-numa-node.patch | 49 ++++++++ ..._non_owner-warning-with-debug_rwsems.patch | 45 +++++++ ...d-barrier-after-register-read-in-inx.patch | 45 +++++++ ...4-fix-i2c-gpio-gpio-descriptor-table.patch | 47 ++++++++ ...ada-37xx-fix-spurious-irq-management.patch | 43 +++++++ ...cetree-fix-pctldev-pointer-overwrite.patch | 79 ++++++++++++ ...rl-samsung-correct-eintg-banks-order.patch | 64 ++++++++++ queue-4.17/series | 14 +++ ...secs-preserves-non-zero-time-periods.patch | 68 +++++++++++ ...signaturevalue-field-from-bit-string.patch | 51 ++++++++ 15 files changed, 885 insertions(+) create mode 100644 queue-4.17/auxdisplay-fix-broken-menu.patch create mode 100644 queue-4.17/btrfs-fix-return-value-on-rename-exchange-failure.patch create mode 100644 queue-4.17/cpufreq-intel_pstate-fix-scaling-max-min-limits-with-turbo-3.0.patch create mode 100644 queue-4.17/iio-adc-ad7791-remove-sample-freq-sysfs-attributes.patch create mode 100644 queue-4.17/iio-sca3000-fix-an-error-handling-path-in-sca3000_probe.patch create mode 100644 queue-4.17/irqchip-gic-v3-its-don-t-bind-lpi-to-unavailable-numa-node.patch create mode 100644 queue-4.17/locking-rwsem-fix-up_read_non_owner-warning-with-debug_rwsems.patch create mode 100644 queue-4.17/mips-io-add-barrier-after-register-read-in-inx.patch create mode 100644 queue-4.17/mips-pb44-fix-i2c-gpio-gpio-descriptor-table.patch create mode 100644 queue-4.17/pinctrl-armada-37xx-fix-spurious-irq-management.patch create mode 100644 queue-4.17/pinctrl-devicetree-fix-pctldev-pointer-overwrite.patch create mode 100644 queue-4.17/pinctrl-samsung-correct-eintg-banks-order.patch create mode 100644 queue-4.17/time-make-sure-jiffies_to_msecs-preserves-non-zero-time-periods.patch create mode 100644 queue-4.17/x.509-unpack-rsa-signaturevalue-field-from-bit-string.patch diff --git a/queue-4.17/auxdisplay-fix-broken-menu.patch b/queue-4.17/auxdisplay-fix-broken-menu.patch new file mode 100644 index 00000000000..258ef08758a --- /dev/null +++ b/queue-4.17/auxdisplay-fix-broken-menu.patch @@ -0,0 +1,67 @@ +From b5b903fba96a4d1771422efd5c713ebb73f7dc82 Mon Sep 17 00:00:00 2001 +From: Randy Dunlap +Date: Wed, 28 Feb 2018 18:33:03 -0800 +Subject: auxdisplay: fix broken menu + +From: Randy Dunlap + +commit b5b903fba96a4d1771422efd5c713ebb73f7dc82 upstream. + +Having the CHARLCD Kconfig symbol between "menuconfig AUXDISPLAY" +and "if AUXDISPLAY" breaks the AUXDISPLAY submenus, so move the +CHARLCD Kconfig symbol near the end of the file so that the menu +display is continuous. + +Also include ARM_CHARLCD inside of the if AUXDISPLAY/endif block. +Geert says that it should be there. + +Fixes: 39f8ea46724e ("auxdisplay: charlcd: Extract character LCD core from misc/panel") + +Cc: stable@vger.kernel.org # v4.12 +Cc: Geert Uytterhoeven +Reviewed-by: Andy Shevchenko +Signed-off-by: Randy Dunlap +Signed-off-by: Miguel Ojeda +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/auxdisplay/Kconfig | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +--- a/drivers/auxdisplay/Kconfig ++++ b/drivers/auxdisplay/Kconfig +@@ -14,9 +14,6 @@ menuconfig AUXDISPLAY + + If you say N, all options in this submenu will be skipped and disabled. + +-config CHARLCD +- tristate "Character LCD core support" if COMPILE_TEST +- + if AUXDISPLAY + + config HD44780 +@@ -157,8 +154,6 @@ config HT16K33 + Say yes here to add support for Holtek HT16K33, RAM mapping 16*8 + LED controller driver with keyscan. + +-endif # AUXDISPLAY +- + config ARM_CHARLCD + bool "ARM Ltd. Character LCD Driver" + depends on PLAT_VERSATILE +@@ -169,6 +164,8 @@ config ARM_CHARLCD + line and the Linux version on the second line, but that's + still useful. + ++endif # AUXDISPLAY ++ + config PANEL + tristate "Parallel port LCD/Keypad Panel support" + depends on PARPORT +@@ -448,3 +445,6 @@ config PANEL_BOOT_MESSAGE + printf()-formatted message is valid with newline and escape codes. + + endif # PANEL ++ ++config CHARLCD ++ tristate "Character LCD core support" if COMPILE_TEST diff --git a/queue-4.17/btrfs-fix-return-value-on-rename-exchange-failure.patch b/queue-4.17/btrfs-fix-return-value-on-rename-exchange-failure.patch new file mode 100644 index 00000000000..efcd9a11204 --- /dev/null +++ b/queue-4.17/btrfs-fix-return-value-on-rename-exchange-failure.patch @@ -0,0 +1,51 @@ +From c5b4a50b74018b3677098151ec5f4fce07d5e6a0 Mon Sep 17 00:00:00 2001 +From: Filipe Manana +Date: Mon, 11 Jun 2018 19:24:16 +0100 +Subject: Btrfs: fix return value on rename exchange failure + +From: Filipe Manana + +commit c5b4a50b74018b3677098151ec5f4fce07d5e6a0 upstream. + +If we failed during a rename exchange operation after starting/joining a +transaction, we would end up replacing the return value, stored in the +local 'ret' variable, with the return value from btrfs_end_transaction(). +So this could end up returning 0 (success) to user space despite the +operation having failed and aborted the transaction, because if there are +multiple tasks having a reference on the transaction at the time +btrfs_end_transaction() is called by the rename exchange, that function +returns 0 (otherwise it returns -EIO and not the original error value). +So fix this by not overwriting the return value on error after getting +a transaction handle. + +Fixes: cdd1fedf8261 ("btrfs: add support for RENAME_EXCHANGE and RENAME_WHITEOUT") +CC: stable@vger.kernel.org # 4.9+ +Signed-off-by: Filipe Manana +Reviewed-by: David Sterba +Signed-off-by: David Sterba +Signed-off-by: Greg Kroah-Hartman + +--- + fs/btrfs/inode.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +--- a/fs/btrfs/inode.c ++++ b/fs/btrfs/inode.c +@@ -9475,6 +9475,7 @@ static int btrfs_rename_exchange(struct + u64 new_idx = 0; + u64 root_objectid; + int ret; ++ int ret2; + bool root_log_pinned = false; + bool dest_log_pinned = false; + +@@ -9671,7 +9672,8 @@ out_fail: + dest_log_pinned = false; + } + } +- ret = btrfs_end_transaction(trans); ++ ret2 = btrfs_end_transaction(trans); ++ ret = ret ? ret : ret2; + out_notrans: + if (new_ino == BTRFS_FIRST_FREE_OBJECTID) + up_read(&fs_info->subvol_sem); diff --git a/queue-4.17/cpufreq-intel_pstate-fix-scaling-max-min-limits-with-turbo-3.0.patch b/queue-4.17/cpufreq-intel_pstate-fix-scaling-max-min-limits-with-turbo-3.0.patch new file mode 100644 index 00000000000..6878446cf75 --- /dev/null +++ b/queue-4.17/cpufreq-intel_pstate-fix-scaling-max-min-limits-with-turbo-3.0.patch @@ -0,0 +1,112 @@ +From ff7c9917143b3a6cf2fa61212a32d67cf259bf9c Mon Sep 17 00:00:00 2001 +From: Srinivas Pandruvada +Date: Mon, 18 Jun 2018 12:47:45 -0700 +Subject: cpufreq: intel_pstate: Fix scaling max/min limits with Turbo 3.0 + +From: Srinivas Pandruvada + +commit ff7c9917143b3a6cf2fa61212a32d67cf259bf9c upstream. + +When scaling max/min settings are changed, internally they are converted +to a ratio using the max turbo 1 core turbo frequency. This works fine +when 1 core max is same irrespective of the core. But under Turbo 3.0, +this will not be the case. For example: +Core 0: max turbo pstate: 43 (4.3GHz) +Core 1: max turbo pstate: 45 (4.5GHz) +In this case 1 core turbo ratio will be maximum of all, so it will be +45 (4.5GHz). Suppose scaling max is set to 4GHz (ratio 40) for all cores +,then on core one it will be + = max_state * policy->max / max_freq; + = 43 * (4000000/4500000) = 38 (3.8GHz) + = 38 +which is 200MHz less than the desired. +On core2, it will be correctly set to ratio 40 (4GHz). Same holds true +for scaling min frequency limit. So this requires usage of correct turbo +max frequency for core one, which in this case is 4.3GHz. So we need to +adjust per CPU cpu->pstate.turbo_freq using the maximum HWP ratio of that +core. + +This change uses the HWP capability of a core to adjust max turbo +frequency. But since Broadwell HWP doesn't use ratios in the HWP +capabilities, we have to use legacy max 1 core turbo ratio. This is not +a problem as the HWP capabilities don't differ among cores in Broadwell. +We need to check for non Broadwell CPU model for applying this change, +though. + +Signed-off-by: Srinivas Pandruvada +Cc: 4.6+ # 4.6+ +Signed-off-by: Rafael J. Wysocki +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/cpufreq/intel_pstate.c | 27 ++++++++++++++++++++++----- + 1 file changed, 22 insertions(+), 5 deletions(-) + +--- a/drivers/cpufreq/intel_pstate.c ++++ b/drivers/cpufreq/intel_pstate.c +@@ -284,6 +284,7 @@ struct pstate_funcs { + static struct pstate_funcs pstate_funcs __read_mostly; + + static int hwp_active __read_mostly; ++static int hwp_mode_bdw __read_mostly; + static bool per_cpu_limits __read_mostly; + + static struct cpufreq_driver *intel_pstate_driver __read_mostly; +@@ -1370,7 +1371,15 @@ static void intel_pstate_get_cpu_pstates + cpu->pstate.turbo_pstate = pstate_funcs.get_turbo(); + cpu->pstate.scaling = pstate_funcs.get_scaling(); + cpu->pstate.max_freq = cpu->pstate.max_pstate * cpu->pstate.scaling; +- cpu->pstate.turbo_freq = cpu->pstate.turbo_pstate * cpu->pstate.scaling; ++ ++ if (hwp_active && !hwp_mode_bdw) { ++ unsigned int phy_max, current_max; ++ ++ intel_pstate_get_hwp_max(cpu->cpu, &phy_max, ¤t_max); ++ cpu->pstate.turbo_freq = phy_max * cpu->pstate.scaling; ++ } else { ++ cpu->pstate.turbo_freq = cpu->pstate.turbo_pstate * cpu->pstate.scaling; ++ } + + if (pstate_funcs.get_aperf_mperf_shift) + cpu->aperf_mperf_shift = pstate_funcs.get_aperf_mperf_shift(); +@@ -2252,28 +2261,36 @@ static inline bool intel_pstate_has_acpi + static inline void intel_pstate_request_control_from_smm(void) {} + #endif /* CONFIG_ACPI */ + ++#define INTEL_PSTATE_HWP_BROADWELL 0x01 ++ ++#define ICPU_HWP(model, hwp_mode) \ ++ { X86_VENDOR_INTEL, 6, model, X86_FEATURE_HWP, hwp_mode } ++ + static const struct x86_cpu_id hwp_support_ids[] __initconst = { +- { X86_VENDOR_INTEL, 6, X86_MODEL_ANY, X86_FEATURE_HWP }, ++ ICPU_HWP(INTEL_FAM6_BROADWELL_X, INTEL_PSTATE_HWP_BROADWELL), ++ ICPU_HWP(INTEL_FAM6_BROADWELL_XEON_D, INTEL_PSTATE_HWP_BROADWELL), ++ ICPU_HWP(X86_MODEL_ANY, 0), + {} + }; + + static int __init intel_pstate_init(void) + { ++ const struct x86_cpu_id *id; + int rc; + + if (no_load) + return -ENODEV; + +- if (x86_match_cpu(hwp_support_ids)) { ++ id = x86_match_cpu(hwp_support_ids); ++ if (id) { + copy_cpu_funcs(&core_funcs); + if (!no_hwp) { + hwp_active++; ++ hwp_mode_bdw = id->driver_data; + intel_pstate.attr = hwp_cpufreq_attrs; + goto hwp_cpu_matched; + } + } else { +- const struct x86_cpu_id *id; +- + id = x86_match_cpu(intel_pstate_cpu_ids); + if (!id) + return -ENODEV; diff --git a/queue-4.17/iio-adc-ad7791-remove-sample-freq-sysfs-attributes.patch b/queue-4.17/iio-adc-ad7791-remove-sample-freq-sysfs-attributes.patch new file mode 100644 index 00000000000..5fa0e4b409b --- /dev/null +++ b/queue-4.17/iio-adc-ad7791-remove-sample-freq-sysfs-attributes.patch @@ -0,0 +1,93 @@ +From 7eb6b35d93c356f1afebbfb808bc296d6351e708 Mon Sep 17 00:00:00 2001 +From: Alexandru Ardelean +Date: Mon, 12 Mar 2018 14:06:53 +0200 +Subject: iio: adc: ad7791: remove sample freq sysfs attributes + +From: Alexandru Ardelean + +commit 7eb6b35d93c356f1afebbfb808bc296d6351e708 upstream. + +In the current state, these attributes are broken, because they are +registered already, and the kernel throws a warning. +The first registration happens via the `IIO_CHAN_INFO_SAMP_FREQ` flag from +the `ad_sigma_delta` driver. + +In this commit these attrs are removed, and in the following the +IIO_CHAN_INFO_SAMP_FREQ behavior will be implemented, which replaces these +hooks. + +This is done to make things a bit easier to review as there is a bit of +overlap in the patch if it's done all at once. + +Fixes: a13e831fcaa7 ("staging: iio: ad7192: implement IIO_CHAN_INFO_SAMP_FREQ") + +Signed-off-by: Alexandru Ardelean +Cc: +Signed-off-by: Jonathan Cameron +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/iio/adc/ad7791.c | 49 ----------------------------------------------- + 1 file changed, 49 deletions(-) + +--- a/drivers/iio/adc/ad7791.c ++++ b/drivers/iio/adc/ad7791.c +@@ -244,58 +244,9 @@ static int ad7791_read_raw(struct iio_de + return -EINVAL; + } + +-static const char * const ad7791_sample_freq_avail[] = { +- [AD7791_FILTER_RATE_120] = "120", +- [AD7791_FILTER_RATE_100] = "100", +- [AD7791_FILTER_RATE_33_3] = "33.3", +- [AD7791_FILTER_RATE_20] = "20", +- [AD7791_FILTER_RATE_16_6] = "16.6", +- [AD7791_FILTER_RATE_16_7] = "16.7", +- [AD7791_FILTER_RATE_13_3] = "13.3", +- [AD7791_FILTER_RATE_9_5] = "9.5", +-}; +- +-static ssize_t ad7791_read_frequency(struct device *dev, +- struct device_attribute *attr, char *buf) +-{ +- struct iio_dev *indio_dev = dev_to_iio_dev(dev); +- struct ad7791_state *st = iio_priv(indio_dev); +- unsigned int rate = st->filter & AD7791_FILTER_RATE_MASK; +- +- return sprintf(buf, "%s\n", ad7791_sample_freq_avail[rate]); +-} +- +-static ssize_t ad7791_write_frequency(struct device *dev, +- struct device_attribute *attr, const char *buf, size_t len) +-{ +- struct iio_dev *indio_dev = dev_to_iio_dev(dev); +- struct ad7791_state *st = iio_priv(indio_dev); +- int i, ret; +- +- i = sysfs_match_string(ad7791_sample_freq_avail, buf); +- if (i < 0) +- return i; +- +- ret = iio_device_claim_direct_mode(indio_dev); +- if (ret) +- return ret; +- st->filter &= ~AD7791_FILTER_RATE_MASK; +- st->filter |= i; +- ad_sd_write_reg(&st->sd, AD7791_REG_FILTER, sizeof(st->filter), +- st->filter); +- iio_device_release_direct_mode(indio_dev); +- +- return len; +-} +- +-static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO, +- ad7791_read_frequency, +- ad7791_write_frequency); +- + static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("120 100 33.3 20 16.7 16.6 13.3 9.5"); + + static struct attribute *ad7791_attributes[] = { +- &iio_dev_attr_sampling_frequency.dev_attr.attr, + &iio_const_attr_sampling_frequency_available.dev_attr.attr, + NULL + }; diff --git a/queue-4.17/iio-sca3000-fix-an-error-handling-path-in-sca3000_probe.patch b/queue-4.17/iio-sca3000-fix-an-error-handling-path-in-sca3000_probe.patch new file mode 100644 index 00000000000..c66feb47747 --- /dev/null +++ b/queue-4.17/iio-sca3000-fix-an-error-handling-path-in-sca3000_probe.patch @@ -0,0 +1,57 @@ +From 4a5b45383ca371e123ba103d34d4b3b87616245c Mon Sep 17 00:00:00 2001 +From: Christophe JAILLET +Date: Sun, 8 Apr 2018 21:44:01 +0200 +Subject: iio: sca3000: Fix an error handling path in 'sca3000_probe()' + +From: Christophe JAILLET + +commit 4a5b45383ca371e123ba103d34d4b3b87616245c upstream. + +Use 'devm_iio_kfifo_allocate()' instead of 'iio_kfifo_allocate()' in order +to simplify code and avoid a memory leak in an error path in +'sca3000_probe()'. A call to 'sca3000_unconfigure_ring()' was missing. + +Sent via the next merge window as unimportant bug and there are +other patches dependent on it. + +Signed-off-by: Christophe JAILLET +Cc: +Signed-off-by: Jonathan Cameron +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/iio/accel/sca3000.c | 9 +-------- + 1 file changed, 1 insertion(+), 8 deletions(-) + +--- a/drivers/iio/accel/sca3000.c ++++ b/drivers/iio/accel/sca3000.c +@@ -1277,7 +1277,7 @@ static int sca3000_configure_ring(struct + { + struct iio_buffer *buffer; + +- buffer = iio_kfifo_allocate(); ++ buffer = devm_iio_kfifo_allocate(&indio_dev->dev); + if (!buffer) + return -ENOMEM; + +@@ -1287,11 +1287,6 @@ static int sca3000_configure_ring(struct + return 0; + } + +-static void sca3000_unconfigure_ring(struct iio_dev *indio_dev) +-{ +- iio_kfifo_free(indio_dev->buffer); +-} +- + static inline + int __sca3000_hw_ring_state_set(struct iio_dev *indio_dev, bool state) + { +@@ -1546,8 +1541,6 @@ static int sca3000_remove(struct spi_dev + if (spi->irq) + free_irq(spi->irq, indio_dev); + +- sca3000_unconfigure_ring(indio_dev); +- + return 0; + } + diff --git a/queue-4.17/irqchip-gic-v3-its-don-t-bind-lpi-to-unavailable-numa-node.patch b/queue-4.17/irqchip-gic-v3-its-don-t-bind-lpi-to-unavailable-numa-node.patch new file mode 100644 index 00000000000..c062c47df6f --- /dev/null +++ b/queue-4.17/irqchip-gic-v3-its-don-t-bind-lpi-to-unavailable-numa-node.patch @@ -0,0 +1,49 @@ +From c1797b11a09c8323c92b074fd48b89a936c991d0 Mon Sep 17 00:00:00 2001 +From: Yang Yingliang +Date: Fri, 22 Jun 2018 10:52:51 +0100 +Subject: irqchip/gic-v3-its: Don't bind LPI to unavailable NUMA node + +From: Yang Yingliang + +commit c1797b11a09c8323c92b074fd48b89a936c991d0 upstream. + +On a NUMA system, if an ITS is local to an offline node, the ITS driver may +pick an offline CPU to bind the LPI. In this case, pick an online CPU (and +the first one will do). + +But on some systems, binding an LPI to non-local node CPU may cause +deadlock (see Cavium erratum 23144). In this case, just fail the activate +and return an error code. + +Signed-off-by: Yang Yingliang +Signed-off-by: Marc Zyngier +Signed-off-by: Thomas Gleixner +Cc: Jason Cooper +Cc: Alexandre Belloni +Cc: Sumit Garg +Cc: stable@vger.kernel.org +Link: https://lkml.kernel.org/r/20180622095254.5906-5-marc.zyngier@arm.com +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/irqchip/irq-gic-v3-its.c | 9 ++++++++- + 1 file changed, 8 insertions(+), 1 deletion(-) + +--- a/drivers/irqchip/irq-gic-v3-its.c ++++ b/drivers/irqchip/irq-gic-v3-its.c +@@ -2309,7 +2309,14 @@ static int its_irq_domain_activate(struc + cpu_mask = cpumask_of_node(its_dev->its->numa_node); + + /* Bind the LPI to the first possible CPU */ +- cpu = cpumask_first(cpu_mask); ++ cpu = cpumask_first_and(cpu_mask, cpu_online_mask); ++ if (cpu >= nr_cpu_ids) { ++ if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) ++ return -EINVAL; ++ ++ cpu = cpumask_first(cpu_online_mask); ++ } ++ + its_dev->event_map.col_map[event] = cpu; + irq_data_update_effective_affinity(d, cpumask_of(cpu)); + diff --git a/queue-4.17/locking-rwsem-fix-up_read_non_owner-warning-with-debug_rwsems.patch b/queue-4.17/locking-rwsem-fix-up_read_non_owner-warning-with-debug_rwsems.patch new file mode 100644 index 00000000000..7d84fc76b42 --- /dev/null +++ b/queue-4.17/locking-rwsem-fix-up_read_non_owner-warning-with-debug_rwsems.patch @@ -0,0 +1,45 @@ +From 03eeafdd9ab06a770d42c2b264d50dff7e2f4eee Mon Sep 17 00:00:00 2001 +From: Waiman Long +Date: Thu, 24 May 2018 09:26:38 -0400 +Subject: locking/rwsem: Fix up_read_non_owner() warning with DEBUG_RWSEMS + +From: Waiman Long + +commit 03eeafdd9ab06a770d42c2b264d50dff7e2f4eee upstream. + +It was found that the use of up_read_non_owner() in NFS was causing +the following warning when DEBUG_RWSEMS was configured. + + DEBUG_LOCKS_WARN_ON(sem->owner != ((struct task_struct *)(1UL << 0))) + +Looking into the rwsem.c file, it was discovered that the corresponding +down_read_non_owner() function was not setting the owner field properly. +This is fixed now, and the warning should be gone. + +Fixes: 5149cbac4235 ("locking/rwsem: Add DEBUG_RWSEMS to look for lock/unlock mismatches") +Signed-off-by: Waiman Long +Signed-off-by: Thomas Gleixner +Acked-by: Peter Zijlstra (Intel) +Tested-by: Gavin Schenk +Cc: Davidlohr Bueso +Cc: Dan Williams +Cc: Arnd Bergmann +Cc: linux-nfs@vger.kernel.org +Cc: stable@vger.kernel.org +Link: https://lkml.kernel.org/r/1527168398-4291-1-git-send-email-longman@redhat.com +Signed-off-by: Greg Kroah-Hartman + +--- + kernel/locking/rwsem.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/kernel/locking/rwsem.c ++++ b/kernel/locking/rwsem.c +@@ -181,6 +181,7 @@ void down_read_non_owner(struct rw_semap + might_sleep(); + + __down_read(sem); ++ rwsem_set_reader_owned(sem); + } + + EXPORT_SYMBOL(down_read_non_owner); diff --git a/queue-4.17/mips-io-add-barrier-after-register-read-in-inx.patch b/queue-4.17/mips-io-add-barrier-after-register-read-in-inx.patch new file mode 100644 index 00000000000..cf7f6c2c2ff --- /dev/null +++ b/queue-4.17/mips-io-add-barrier-after-register-read-in-inx.patch @@ -0,0 +1,45 @@ +From 18f3e95b90b28318ef35910d21c39908de672331 Mon Sep 17 00:00:00 2001 +From: Huacai Chen +Date: Tue, 12 Jun 2018 17:54:42 +0800 +Subject: MIPS: io: Add barrier after register read in inX() + +From: Huacai Chen + +commit 18f3e95b90b28318ef35910d21c39908de672331 upstream. + +While a barrier is present in the outX() functions before the register +write, a similar barrier is missing in the inX() functions after the +register read. This could allow memory accesses following inX() to +observe stale data. + +This patch is very similar to commit a1cc7034e33d12dc1 ("MIPS: io: Add +barrier after register read in readX()"). Because war_io_reorder_wmb() +is both used by writeX() and outX(), if readX() need a barrier then so +does inX(). + +Cc: stable@vger.kernel.org +Signed-off-by: Huacai Chen +Patchwork: https://patchwork.linux-mips.org/patch/19516/ +Signed-off-by: Paul Burton +Cc: James Hogan +Cc: linux-mips@linux-mips.org +Cc: Fuxin Zhang +Cc: Zhangjin Wu +Cc: Huacai Chen +Signed-off-by: Greg Kroah-Hartman + +--- + arch/mips/include/asm/io.h | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/arch/mips/include/asm/io.h ++++ b/arch/mips/include/asm/io.h +@@ -414,6 +414,8 @@ static inline type pfx##in##bwlq##p(unsi + __val = *__addr; \ + slow; \ + \ ++ /* prevent prefetching of coherent DMA data prematurely */ \ ++ rmb(); \ + return pfx##ioswab##bwlq(__addr, __val); \ + } + diff --git a/queue-4.17/mips-pb44-fix-i2c-gpio-gpio-descriptor-table.patch b/queue-4.17/mips-pb44-fix-i2c-gpio-gpio-descriptor-table.patch new file mode 100644 index 00000000000..94eba3ff140 --- /dev/null +++ b/queue-4.17/mips-pb44-fix-i2c-gpio-gpio-descriptor-table.patch @@ -0,0 +1,47 @@ +From 326345f995a83e326fa2e01d54bfa9a6a307bd4d Mon Sep 17 00:00:00 2001 +From: Linus Walleij +Date: Sat, 26 May 2018 19:12:51 +0200 +Subject: MIPS: pb44: Fix i2c-gpio GPIO descriptor table + +From: Linus Walleij + +commit 326345f995a83e326fa2e01d54bfa9a6a307bd4d upstream. + +I used bad names in my clumsiness when rewriting many board +files to use GPIO descriptors instead of platform data. A few +had the platform_device ID set to -1 which would indeed give +the device name "i2c-gpio". + +But several had it set to >=0 which gives the names +"i2c-gpio.0", "i2c-gpio.1" ... + +Fix the one affected board in the MIPS tree. Sorry. + +Fixes: b2e63555592f ("i2c: gpio: Convert to use descriptors") +Reported-by: Simon Guinot +Signed-off-by: Linus Walleij +Reviewed-by: Paul Burton +Cc: Ralf Baechle +Cc: Wolfram Sang +Cc: Simon Guinot +Cc: linux-mips@linux-mips.org +Cc: # 4.15+ +Patchwork: https://patchwork.linux-mips.org/patch/19387/ +Signed-off-by: James Hogan +Signed-off-by: Greg Kroah-Hartman + +--- + arch/mips/ath79/mach-pb44.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/mips/ath79/mach-pb44.c ++++ b/arch/mips/ath79/mach-pb44.c +@@ -34,7 +34,7 @@ + #define PB44_KEYS_DEBOUNCE_INTERVAL (3 * PB44_KEYS_POLL_INTERVAL) + + static struct gpiod_lookup_table pb44_i2c_gpiod_table = { +- .dev_id = "i2c-gpio", ++ .dev_id = "i2c-gpio.0", + .table = { + GPIO_LOOKUP_IDX("ath79-gpio", PB44_GPIO_I2C_SDA, + NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN), diff --git a/queue-4.17/pinctrl-armada-37xx-fix-spurious-irq-management.patch b/queue-4.17/pinctrl-armada-37xx-fix-spurious-irq-management.patch new file mode 100644 index 00000000000..55a9063dcd0 --- /dev/null +++ b/queue-4.17/pinctrl-armada-37xx-fix-spurious-irq-management.patch @@ -0,0 +1,43 @@ +From 702d1e81feae70aa16ca364b4d2d95ccad801022 Mon Sep 17 00:00:00 2001 +From: Terry Zhou +Date: Wed, 23 May 2018 10:44:05 +0200 +Subject: pinctrl: armada-37xx: Fix spurious irq management + +From: Terry Zhou + +commit 702d1e81feae70aa16ca364b4d2d95ccad801022 upstream. + +Until now, if we found spurious irq in irq_handler, we only updated the +status in register but not the status in the code. Due to this the system +will got stuck dues to the infinite loop + +[gregory.clement@bootlin.com: update comment and add fix and stable tags] +Fixes: 30ac0d3b0702 ("pinctrl: armada-37xx: Add edge both type gpio irq support") +Cc: +Signed-off-by: Terry Zhou +Reviewed-by: Gregory CLEMENT +Signed-off-by: Gregory CLEMENT +Signed-off-by: Linus Walleij +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c ++++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +@@ -679,12 +679,13 @@ static void armada_37xx_irq_handler(stru + writel(1 << hwirq, + info->base + + IRQ_STATUS + 4 * i); +- continue; ++ goto update_status; + } + } + + generic_handle_irq(virq); + ++update_status: + /* Update status in case a new IRQ appears */ + spin_lock_irqsave(&info->irq_lock, flags); + status = readl_relaxed(info->base + diff --git a/queue-4.17/pinctrl-devicetree-fix-pctldev-pointer-overwrite.patch b/queue-4.17/pinctrl-devicetree-fix-pctldev-pointer-overwrite.patch new file mode 100644 index 00000000000..489be8102f4 --- /dev/null +++ b/queue-4.17/pinctrl-devicetree-fix-pctldev-pointer-overwrite.patch @@ -0,0 +1,79 @@ +From bc3322bc166a2905bc91f774d7b22773dc7c063a Mon Sep 17 00:00:00 2001 +From: Fabio Estevam +Date: Thu, 7 Jun 2018 13:51:33 -0300 +Subject: pinctrl: devicetree: Fix pctldev pointer overwrite +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Fabio Estevam + +commit bc3322bc166a2905bc91f774d7b22773dc7c063a upstream. + +Commit b89405b6102f ("pinctrl: devicetree: Fix dt_to_map_one_config +handling of hogs") causes the pinctrl hog pins to not get initialized +on i.MX platforms leaving them with the IOMUX settings untouched. + +This causes several regressions on i.MX such as: + +- OV5640 camera driver can not be probed anymore on imx6qdl-sabresd +because the camera clock pin is in a pinctrl_hog group and since +its pinctrl initialization is skipped, the camera clock is kept +in GPIO functionality instead of CLK_CKO function. + +- Audio stopped working on imx6qdl-wandboard and imx53-qsb for +the same reason. + +Richard Fitzgerald explains the problem: + +"I see the bug. If the hog node isn't a 1st level child of the pinctrl +parent node it will go around the for(;;) loop again but on the first +pass I overwrite pctldev with the result of +get_pinctrl_dev_from_of_node() so it doesn't point to the pinctrl driver +any more." + +Fix the issue by stashing the original pctldev so it doesn't +get overwritten. + +Fixes: b89405b6102f ("pinctrl: devicetree: Fix dt_to_map_one_config handling of hogs") +Cc: +Reported-by: Mika Penttilä +Reported-by: Steve Longerbeam +Suggested-by: Richard Fitzgerald +Signed-off-by: Fabio Estevam +Reviewed-by: Dong Aisheng +Reviewed-by: Richard Fitzgerald +Signed-off-by: Linus Walleij +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/pinctrl/devicetree.c | 7 +++++-- + 1 file changed, 5 insertions(+), 2 deletions(-) + +--- a/drivers/pinctrl/devicetree.c ++++ b/drivers/pinctrl/devicetree.c +@@ -101,10 +101,11 @@ struct pinctrl_dev *of_pinctrl_get(struc + } + + static int dt_to_map_one_config(struct pinctrl *p, +- struct pinctrl_dev *pctldev, ++ struct pinctrl_dev *hog_pctldev, + const char *statename, + struct device_node *np_config) + { ++ struct pinctrl_dev *pctldev = NULL; + struct device_node *np_pctldev; + const struct pinctrl_ops *ops; + int ret; +@@ -123,8 +124,10 @@ static int dt_to_map_one_config(struct p + return -EPROBE_DEFER; + } + /* If we're creating a hog we can use the passed pctldev */ +- if (pctldev && (np_pctldev == p->dev->of_node)) ++ if (hog_pctldev && (np_pctldev == p->dev->of_node)) { ++ pctldev = hog_pctldev; + break; ++ } + pctldev = get_pinctrl_dev_from_of_node(np_pctldev); + if (pctldev) + break; diff --git a/queue-4.17/pinctrl-samsung-correct-eintg-banks-order.patch b/queue-4.17/pinctrl-samsung-correct-eintg-banks-order.patch new file mode 100644 index 00000000000..f2b4aab3327 --- /dev/null +++ b/queue-4.17/pinctrl-samsung-correct-eintg-banks-order.patch @@ -0,0 +1,64 @@ +From 5cf9a338db94cfd570aa2607bef1b30996f188e3 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pawe=C5=82=20Chmiel?= +Date: Mon, 16 Apr 2018 17:52:45 +0200 +Subject: pinctrl: samsung: Correct EINTG banks order +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Paweł Chmiel + +commit 5cf9a338db94cfd570aa2607bef1b30996f188e3 upstream. + +All banks with GPIO interrupts should be at beginning of bank array and +without any other types of banks between them. This order is expected +by exynos_eint_gpio_irq, when doing interrupt group to bank translation. +Otherwise, kernel NULL pointer dereference would happen when trying to +handle interrupt, due to wrong bank being looked up. Observed on +s5pv210, when trying to handle gpj0 interrupt, where kernel was mapping +it to gpi bank. + +Cc: stable@vger.kernel.org +Fixes: 023e06dfa688 ("pinctrl: exynos: add exynos5410 SoC specific data") +Fixes: 608a26a7bc04 ("pinctrl: Add s5pv210 support to pinctrl-exynos) +Signed-off-by: Paweł Chmiel +Reviewed-by: Tomasz Figa +Signed-off-by: Krzysztof Kozlowski +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/pinctrl/samsung/pinctrl-exynos-arm.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/pinctrl/samsung/pinctrl-exynos-arm.c ++++ b/drivers/pinctrl/samsung/pinctrl-exynos-arm.c +@@ -105,12 +105,12 @@ static const struct samsung_pin_bank_dat + EXYNOS_PIN_BANK_EINTG(7, 0x1c0, "gpg1", 0x38), + EXYNOS_PIN_BANK_EINTG(7, 0x1e0, "gpg2", 0x3c), + EXYNOS_PIN_BANK_EINTG(7, 0x200, "gpg3", 0x40), +- EXYNOS_PIN_BANK_EINTN(7, 0x220, "gpi"), + EXYNOS_PIN_BANK_EINTG(8, 0x240, "gpj0", 0x44), + EXYNOS_PIN_BANK_EINTG(6, 0x260, "gpj1", 0x48), + EXYNOS_PIN_BANK_EINTG(8, 0x280, "gpj2", 0x4c), + EXYNOS_PIN_BANK_EINTG(8, 0x2a0, "gpj3", 0x50), + EXYNOS_PIN_BANK_EINTG(5, 0x2c0, "gpj4", 0x54), ++ EXYNOS_PIN_BANK_EINTN(7, 0x220, "gpi"), + EXYNOS_PIN_BANK_EINTN(8, 0x2e0, "mp01"), + EXYNOS_PIN_BANK_EINTN(4, 0x300, "mp02"), + EXYNOS_PIN_BANK_EINTN(8, 0x320, "mp03"), +@@ -630,7 +630,6 @@ static const struct samsung_pin_bank_dat + EXYNOS_PIN_BANK_EINTG(4, 0x100, "gpc3", 0x20), + EXYNOS_PIN_BANK_EINTG(7, 0x120, "gpc1", 0x24), + EXYNOS_PIN_BANK_EINTG(7, 0x140, "gpc2", 0x28), +- EXYNOS_PIN_BANK_EINTN(2, 0x160, "gpm5"), + EXYNOS_PIN_BANK_EINTG(8, 0x180, "gpd1", 0x2c), + EXYNOS_PIN_BANK_EINTG(8, 0x1A0, "gpe0", 0x30), + EXYNOS_PIN_BANK_EINTG(2, 0x1C0, "gpe1", 0x34), +@@ -641,6 +640,7 @@ static const struct samsung_pin_bank_dat + EXYNOS_PIN_BANK_EINTG(2, 0x260, "gpg2", 0x48), + EXYNOS_PIN_BANK_EINTG(4, 0x280, "gph0", 0x4c), + EXYNOS_PIN_BANK_EINTG(8, 0x2A0, "gph1", 0x50), ++ EXYNOS_PIN_BANK_EINTN(2, 0x160, "gpm5"), + EXYNOS_PIN_BANK_EINTN(8, 0x2C0, "gpm7"), + EXYNOS_PIN_BANK_EINTN(6, 0x2E0, "gpy0"), + EXYNOS_PIN_BANK_EINTN(4, 0x300, "gpy1"), diff --git a/queue-4.17/series b/queue-4.17/series index 2a084671bb3..d56d61e8aa8 100644 --- a/queue-4.17/series +++ b/queue-4.17/series @@ -114,3 +114,17 @@ pci-add-acs-quirk-for-intel-7th-8th-gen-mobile.patch pci-add-acs-quirk-for-intel-300-series.patch pci-pciehp-clear-presence-detect-and-data-link-layer-status-changed-on-resume.patch pci-account-for-all-bridges-on-bus-when-distributing-bus-numbers.patch +auxdisplay-fix-broken-menu.patch +pinctrl-armada-37xx-fix-spurious-irq-management.patch +pinctrl-samsung-correct-eintg-banks-order.patch +pinctrl-devicetree-fix-pctldev-pointer-overwrite.patch +cpufreq-intel_pstate-fix-scaling-max-min-limits-with-turbo-3.0.patch +mips-pb44-fix-i2c-gpio-gpio-descriptor-table.patch +mips-io-add-barrier-after-register-read-in-inx.patch +time-make-sure-jiffies_to_msecs-preserves-non-zero-time-periods.patch +irqchip-gic-v3-its-don-t-bind-lpi-to-unavailable-numa-node.patch +locking-rwsem-fix-up_read_non_owner-warning-with-debug_rwsems.patch +x.509-unpack-rsa-signaturevalue-field-from-bit-string.patch +btrfs-fix-return-value-on-rename-exchange-failure.patch +iio-adc-ad7791-remove-sample-freq-sysfs-attributes.patch +iio-sca3000-fix-an-error-handling-path-in-sca3000_probe.patch diff --git a/queue-4.17/time-make-sure-jiffies_to_msecs-preserves-non-zero-time-periods.patch b/queue-4.17/time-make-sure-jiffies_to_msecs-preserves-non-zero-time-periods.patch new file mode 100644 index 00000000000..2c163598e1a --- /dev/null +++ b/queue-4.17/time-make-sure-jiffies_to_msecs-preserves-non-zero-time-periods.patch @@ -0,0 +1,68 @@ +From abcbcb80cd09cd40f2089d912764e315459b71f7 Mon Sep 17 00:00:00 2001 +From: Geert Uytterhoeven +Date: Fri, 22 Jun 2018 16:33:57 +0200 +Subject: time: Make sure jiffies_to_msecs() preserves non-zero time periods +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Geert Uytterhoeven + +commit abcbcb80cd09cd40f2089d912764e315459b71f7 upstream. + +For the common cases where 1000 is a multiple of HZ, or HZ is a multiple of +1000, jiffies_to_msecs() never returns zero when passed a non-zero time +period. + +However, if HZ > 1000 and not an integer multiple of 1000 (e.g. 1024 or +1200, as used on alpha and DECstation), jiffies_to_msecs() may return zero +for small non-zero time periods. This may break code that relies on +receiving back a non-zero value. + +jiffies_to_usecs() does not need such a fix: one jiffy can only be less +than one µs if HZ > 1000000, and such large values of HZ are already +rejected at build time, twice: + + - include/linux/jiffies.h does #error if HZ >= 12288, + - kernel/time/time.c has BUILD_BUG_ON(HZ > USEC_PER_SEC). + +Broken since forever. + +Signed-off-by: Geert Uytterhoeven +Signed-off-by: Thomas Gleixner +Reviewed-by: Arnd Bergmann +Cc: John Stultz +Cc: Stephen Boyd +Cc: linux-alpha@vger.kernel.org +Cc: linux-mips@linux-mips.org +Cc: stable@vger.kernel.org +Link: https://lkml.kernel.org/r/20180622143357.7495-1-geert@linux-m68k.org +Signed-off-by: Greg Kroah-Hartman + +--- + kernel/time/time.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +--- a/kernel/time/time.c ++++ b/kernel/time/time.c +@@ -28,6 +28,7 @@ + */ + + #include ++#include + #include + #include + #include +@@ -314,9 +315,10 @@ unsigned int jiffies_to_msecs(const unsi + return (j + (HZ / MSEC_PER_SEC) - 1)/(HZ / MSEC_PER_SEC); + #else + # if BITS_PER_LONG == 32 +- return (HZ_TO_MSEC_MUL32 * j) >> HZ_TO_MSEC_SHR32; ++ return (HZ_TO_MSEC_MUL32 * j + (1ULL << HZ_TO_MSEC_SHR32) - 1) >> ++ HZ_TO_MSEC_SHR32; + # else +- return (j * HZ_TO_MSEC_NUM) / HZ_TO_MSEC_DEN; ++ return DIV_ROUND_UP(j * HZ_TO_MSEC_NUM, HZ_TO_MSEC_DEN); + # endif + #endif + } diff --git a/queue-4.17/x.509-unpack-rsa-signaturevalue-field-from-bit-string.patch b/queue-4.17/x.509-unpack-rsa-signaturevalue-field-from-bit-string.patch new file mode 100644 index 00000000000..a5ce1294538 --- /dev/null +++ b/queue-4.17/x.509-unpack-rsa-signaturevalue-field-from-bit-string.patch @@ -0,0 +1,51 @@ +From b65c32ec5a942ab3ada93a048089a938918aba7f Mon Sep 17 00:00:00 2001 +From: "Maciej S. Szmigiero" +Date: Sat, 19 May 2018 14:23:54 +0200 +Subject: X.509: unpack RSA signatureValue field from BIT STRING + +From: Maciej S. Szmigiero + +commit b65c32ec5a942ab3ada93a048089a938918aba7f upstream. + +The signatureValue field of a X.509 certificate is encoded as a BIT STRING. +For RSA signatures this BIT STRING is of so-called primitive subtype, which +contains a u8 prefix indicating a count of unused bits in the encoding. + +We have to strip this prefix from signature data, just as we already do for +key data in x509_extract_key_data() function. + +This wasn't noticed earlier because this prefix byte is zero for RSA key +sizes divisible by 8. Since BIT STRING is a big-endian encoding adding zero +prefixes has no bearing on its value. + +The signature length, however was incorrect, which is a problem for RSA +implementations that need it to be exactly correct (like AMD CCP). + +Signed-off-by: Maciej S. Szmigiero +Fixes: c26fd69fa009 ("X.509: Add a crypto key parser for binary (DER) X.509 certificates") +Cc: stable@vger.kernel.org +Signed-off-by: James Morris +Signed-off-by: Greg Kroah-Hartman + +--- + crypto/asymmetric_keys/x509_cert_parser.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +--- a/crypto/asymmetric_keys/x509_cert_parser.c ++++ b/crypto/asymmetric_keys/x509_cert_parser.c +@@ -249,6 +249,15 @@ int x509_note_signature(void *context, s + return -EINVAL; + } + ++ if (strcmp(ctx->cert->sig->pkey_algo, "rsa") == 0) { ++ /* Discard the BIT STRING metadata */ ++ if (vlen < 1 || *(const u8 *)value != 0) ++ return -EBADMSG; ++ ++ value++; ++ vlen--; ++ } ++ + ctx->cert->raw_sig = value; + ctx->cert->raw_sig_size = vlen; + return 0; -- 2.47.3