From eed3f358796791dbd065a69adf85ee4a588d3981 Mon Sep 17 00:00:00 2001 From: Brian Cain Date: Mon, 26 Aug 2024 17:26:30 -0700 Subject: [PATCH] target/hexagon: rename HEX_EXCP_*=>HEX_CAUSE_* The values previously used for "HEX_EXCP_*" were the cause code definitions and not the event numbers. So in this commit, we update the names to reflect the cause codes. In HEX_EVENT_TRAP0's case, we add a new "HEX_EVENT_*" with the correct event number. Reviewed-by: Taylor Simpson Signed-off-by: Brian Cain --- linux-user/hexagon/cpu_loop.c | 4 ++-- target/hexagon/cpu.h | 2 +- target/hexagon/cpu_bits.h | 17 +++++++++-------- target/hexagon/gen_tcg.h | 2 +- target/hexagon/translate.c | 6 +++--- 5 files changed, 16 insertions(+), 15 deletions(-) diff --git a/linux-user/hexagon/cpu_loop.c b/linux-user/hexagon/cpu_loop.c index d41159e52ad..40db596301a 100644 --- a/linux-user/hexagon/cpu_loop.c +++ b/linux-user/hexagon/cpu_loop.c @@ -42,7 +42,7 @@ void cpu_loop(CPUHexagonState *env) case EXCP_INTERRUPT: /* just indicate that signals should be handled asap */ break; - case HEX_EXCP_TRAP0: + case HEX_EVENT_TRAP0: syscallnum = env->gpr[6]; env->gpr[HEX_REG_PC] += 4; ret = do_syscall(env, @@ -60,7 +60,7 @@ void cpu_loop(CPUHexagonState *env) env->gpr[0] = ret; } break; - case HEX_EXCP_PC_NOT_ALIGNED: + case HEX_CAUSE_PC_NOT_ALIGNED: force_sig_fault(TARGET_SIGBUS, TARGET_BUS_ADRALN, env->gpr[HEX_REG_R31]); break; diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h index 25150d52145..14e6e819c22 100644 --- a/target/hexagon/cpu.h +++ b/target/hexagon/cpu.h @@ -143,7 +143,7 @@ static inline void cpu_get_tb_cpu_state(CPUHexagonState *env, vaddr *pc, } *flags = hex_flags; if (*pc & PCALIGN_MASK) { - hexagon_raise_exception_err(env, HEX_EXCP_PC_NOT_ALIGNED, 0); + hexagon_raise_exception_err(env, HEX_CAUSE_PC_NOT_ALIGNED, 0); } } diff --git a/target/hexagon/cpu_bits.h b/target/hexagon/cpu_bits.h index 4279281a710..2e60c0fafed 100644 --- a/target/hexagon/cpu_bits.h +++ b/target/hexagon/cpu_bits.h @@ -23,14 +23,15 @@ #define PCALIGN 4 #define PCALIGN_MASK (PCALIGN - 1) -#define HEX_EXCP_FETCH_NO_UPAGE 0x012 -#define HEX_EXCP_INVALID_PACKET 0x015 -#define HEX_EXCP_INVALID_OPCODE 0x015 -#define HEX_EXCP_PC_NOT_ALIGNED 0x01e -#define HEX_EXCP_PRIV_NO_UREAD 0x024 -#define HEX_EXCP_PRIV_NO_UWRITE 0x025 - -#define HEX_EXCP_TRAP0 0x172 +#define HEX_EVENT_TRAP0 0x008 + +#define HEX_CAUSE_TRAP0 0x172 +#define HEX_CAUSE_FETCH_NO_UPAGE 0x012 +#define HEX_CAUSE_INVALID_PACKET 0x015 +#define HEX_CAUSE_INVALID_OPCODE 0x015 +#define HEX_CAUSE_PC_NOT_ALIGNED 0x01e +#define HEX_CAUSE_PRIV_NO_UREAD 0x024 +#define HEX_CAUSE_PRIV_NO_UWRITE 0x025 #define PACKET_WORDS_MAX 4 diff --git a/target/hexagon/gen_tcg.h b/target/hexagon/gen_tcg.h index 3fc1f4e2812..8a3b801287c 100644 --- a/target/hexagon/gen_tcg.h +++ b/target/hexagon/gen_tcg.h @@ -1365,7 +1365,7 @@ do { \ uiV = uiV; \ tcg_gen_movi_tl(hex_gpr[HEX_REG_PC], ctx->pkt->pc); \ - TCGv excp = tcg_constant_tl(HEX_EXCP_TRAP0); \ + TCGv excp = tcg_constant_tl(HEX_EVENT_TRAP0); \ gen_helper_raise_exception(tcg_env, excp); \ } while (0) #endif diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c index bce85eaeb8f..562105705a7 100644 --- a/target/hexagon/translate.c +++ b/target/hexagon/translate.c @@ -558,7 +558,7 @@ static void gen_insn(DisasContext *ctx) ctx->insn->generate(ctx); mark_store_width(ctx); } else { - gen_exception_end_tb(ctx, HEX_EXCP_INVALID_OPCODE); + gen_exception_end_tb(ctx, HEX_CAUSE_INVALID_OPCODE); } } @@ -912,7 +912,7 @@ static void decode_and_translate_packet(CPUHexagonState *env, DisasContext *ctx) nwords = read_packet_words(env, ctx, words); if (!nwords) { - gen_exception_end_tb(ctx, HEX_EXCP_INVALID_PACKET); + gen_exception_end_tb(ctx, HEX_CAUSE_INVALID_PACKET); return; } @@ -927,7 +927,7 @@ static void decode_and_translate_packet(CPUHexagonState *env, DisasContext *ctx) gen_commit_packet(ctx); ctx->base.pc_next += pkt.encod_pkt_size_in_bytes; } else { - gen_exception_end_tb(ctx, HEX_EXCP_INVALID_PACKET); + gen_exception_end_tb(ctx, HEX_CAUSE_INVALID_PACKET); } } -- 2.39.5