From f4dc03845c5731f38d91056bc61a46bf57f20197 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Mon, 19 Dec 2022 13:21:39 +0100 Subject: [PATCH] 6.1-stable patches added patches: irqchip-ls-extirq-fix-endianness-detection.patch mips-ralink-mt7621-define-mt7621_sysc_base-with-__iomem.patch mips-ralink-mt7621-do-not-use-kzalloc-too-early.patch mips-ralink-mt7621-soc-queries-and-tests-as-functions.patch pci-mt7621-add-sentinel-to-quirks-table.patch --- ...p-ls-extirq-fix-endianness-detection.patch | 32 ++++ ...define-mt7621_sysc_base-with-__iomem.patch | 66 ++++++++ ...-mt7621-do-not-use-kzalloc-too-early.patch | 133 ++++++++++++++++ ...1-soc-queries-and-tests-as-functions.patch | 144 ++++++++++++++++++ ...-mt7621-add-sentinel-to-quirks-table.patch | 43 ++++++ queue-6.1/series | 5 + 6 files changed, 423 insertions(+) create mode 100644 queue-6.1/irqchip-ls-extirq-fix-endianness-detection.patch create mode 100644 queue-6.1/mips-ralink-mt7621-define-mt7621_sysc_base-with-__iomem.patch create mode 100644 queue-6.1/mips-ralink-mt7621-do-not-use-kzalloc-too-early.patch create mode 100644 queue-6.1/mips-ralink-mt7621-soc-queries-and-tests-as-functions.patch create mode 100644 queue-6.1/pci-mt7621-add-sentinel-to-quirks-table.patch diff --git a/queue-6.1/irqchip-ls-extirq-fix-endianness-detection.patch b/queue-6.1/irqchip-ls-extirq-fix-endianness-detection.patch new file mode 100644 index 00000000000..39db99f2ed6 --- /dev/null +++ b/queue-6.1/irqchip-ls-extirq-fix-endianness-detection.patch @@ -0,0 +1,32 @@ +From 3ae977d0e4e3a2a2ccc912ca2d20c9430508ecdd Mon Sep 17 00:00:00 2001 +From: Sean Anderson +Date: Thu, 1 Dec 2022 16:28:07 -0500 +Subject: irqchip/ls-extirq: Fix endianness detection + +From: Sean Anderson + +commit 3ae977d0e4e3a2a2ccc912ca2d20c9430508ecdd upstream. + +parent is the interrupt parent, not the parent of node. Use +node->parent. This fixes endianness detection on big-endian platforms. + +Fixes: 1b00adce8afd ("irqchip/ls-extirq: Fix invalid wait context by avoiding to use regmap") +Signed-off-by: Sean Anderson +Signed-off-by: Marc Zyngier +Link: https://lore.kernel.org/r/20221201212807.616191-1-sean.anderson@seco.com +Signed-off-by: Greg Kroah-Hartman +--- + drivers/irqchip/irq-ls-extirq.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/irqchip/irq-ls-extirq.c ++++ b/drivers/irqchip/irq-ls-extirq.c +@@ -203,7 +203,7 @@ ls_extirq_of_init(struct device_node *no + if (ret) + goto err_parse_map; + +- priv->big_endian = of_device_is_big_endian(parent); ++ priv->big_endian = of_device_is_big_endian(node->parent); + priv->is_ls1021a_or_ls1043a = of_device_is_compatible(node, "fsl,ls1021a-extirq") || + of_device_is_compatible(node, "fsl,ls1043a-extirq"); + raw_spin_lock_init(&priv->lock); diff --git a/queue-6.1/mips-ralink-mt7621-define-mt7621_sysc_base-with-__iomem.patch b/queue-6.1/mips-ralink-mt7621-define-mt7621_sysc_base-with-__iomem.patch new file mode 100644 index 00000000000..dab00f4aadf --- /dev/null +++ b/queue-6.1/mips-ralink-mt7621-define-mt7621_sysc_base-with-__iomem.patch @@ -0,0 +1,66 @@ +From a2cab953b4c077cc02878d424466d3a6eac32aaf Mon Sep 17 00:00:00 2001 +From: John Thomson +Date: Mon, 14 Nov 2022 11:56:56 +1000 +Subject: mips: ralink: mt7621: define MT7621_SYSC_BASE with __iomem + +From: John Thomson + +commit a2cab953b4c077cc02878d424466d3a6eac32aaf upstream. + +So that MT7621_SYSC_BASE can be used later in multiple functions without +needing to repeat this __iomem declaration each time + +Signed-off-by: John Thomson +Signed-off-by: Thomas Bogendoerfer +Signed-off-by: Greg Kroah-Hartman +--- + arch/mips/include/asm/mach-ralink/mt7621.h | 4 +++- + arch/mips/ralink/mt7621.c | 7 +++---- + 2 files changed, 6 insertions(+), 5 deletions(-) + +--- a/arch/mips/include/asm/mach-ralink/mt7621.h ++++ b/arch/mips/include/asm/mach-ralink/mt7621.h +@@ -7,10 +7,12 @@ + #ifndef _MT7621_REGS_H_ + #define _MT7621_REGS_H_ + ++#define IOMEM(x) ((void __iomem *)(KSEG1ADDR(x))) ++ + #define MT7621_PALMBUS_BASE 0x1C000000 + #define MT7621_PALMBUS_SIZE 0x03FFFFFF + +-#define MT7621_SYSC_BASE 0x1E000000 ++#define MT7621_SYSC_BASE IOMEM(0x1E000000) + + #define SYSC_REG_CHIP_NAME0 0x00 + #define SYSC_REG_CHIP_NAME1 0x04 +--- a/arch/mips/ralink/mt7621.c ++++ b/arch/mips/ralink/mt7621.c +@@ -126,7 +126,6 @@ static void soc_dev_init(struct ralink_s + + void __init prom_soc_init(struct ralink_soc_info *soc_info) + { +- void __iomem *sysc = (void __iomem *) KSEG1ADDR(MT7621_SYSC_BASE); + unsigned char *name = NULL; + u32 n0; + u32 n1; +@@ -154,8 +153,8 @@ void __init prom_soc_init(struct ralink_ + __sync(); + } + +- n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0); +- n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1); ++ n0 = __raw_readl(MT7621_SYSC_BASE + SYSC_REG_CHIP_NAME0); ++ n1 = __raw_readl(MT7621_SYSC_BASE + SYSC_REG_CHIP_NAME1); + + if (n0 == MT7621_CHIP_NAME0 && n1 == MT7621_CHIP_NAME1) { + name = "MT7621"; +@@ -164,7 +163,7 @@ void __init prom_soc_init(struct ralink_ + panic("mt7621: unknown SoC, n0:%08x n1:%08x\n", n0, n1); + } + ralink_soc = MT762X_SOC_MT7621AT; +- rev = __raw_readl(sysc + SYSC_REG_CHIP_REV); ++ rev = __raw_readl(MT7621_SYSC_BASE + SYSC_REG_CHIP_REV); + + snprintf(soc_info->sys_type, RAMIPS_SYS_TYPE_LEN, + "MediaTek %s ver:%u eco:%u", diff --git a/queue-6.1/mips-ralink-mt7621-do-not-use-kzalloc-too-early.patch b/queue-6.1/mips-ralink-mt7621-do-not-use-kzalloc-too-early.patch new file mode 100644 index 00000000000..da3459b298b --- /dev/null +++ b/queue-6.1/mips-ralink-mt7621-do-not-use-kzalloc-too-early.patch @@ -0,0 +1,133 @@ +From 7c18b64bba3bcad1be94b404f47b94a04b91ce79 Mon Sep 17 00:00:00 2001 +From: John Thomson +Date: Mon, 14 Nov 2022 11:56:58 +1000 +Subject: mips: ralink: mt7621: do not use kzalloc too early + +From: John Thomson + +commit 7c18b64bba3bcad1be94b404f47b94a04b91ce79 upstream. + +With CONFIG_SLUB=y, following commit 6edf2576a6cc ("mm/slub: enable +debugging memory wasting of kmalloc") mt7621 failed to boot very early, +without showing any console messages. +This exposed the pre-existing bug of mt7621.c using kzalloc before normal +memory management was available. +Prior to this slub change, there existed the unintended protection against +"kmem_cache *s" being NULL as slab_pre_alloc_hook() happened to +return NULL and bailed out of slab_alloc_node(). +This allowed mt7621 prom_soc_init to fail in the soc_dev_init kzalloc, +but continue booting without the SOC_BUS driver device registered. + +Console output from a DEBUG_ZBOOT vmlinuz kernel loading, +with mm/slub modified to warn on kmem_cache zero or null: + +zimage at: 80B842A0 810B4BC0 +Uncompressing Linux at load address 80001000 +Copy device tree to address 80B80EE0 +Now, booting the kernel... + +[ 0.000000] Linux version 6.1.0-rc3+ (john@john) +(mipsel-buildroot-linux-gnu-gcc.br_real (Buildroot +2021.11-4428-g6b6741b) 12.2.0, GNU ld (GNU Binutils) 2.39) #73 SMP Wed + Nov 2 05:10:01 AEST 2022 +[ 0.000000] ------------[ cut here ]------------ +[ 0.000000] WARNING: CPU: 0 PID: 0 at mm/slub.c:3416 +kmem_cache_alloc+0x5a4/0x5e8 +[ 0.000000] Modules linked in: +[ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 6.1.0-rc3+ #73 +[ 0.000000] Stack : 810fff78 80084d98 00000000 00000004 00000000 +00000000 80889d04 80c90000 +[ 0.000000] 80920000 807bd328 8089d368 80923bd3 00000000 +00000001 80889cb0 00000000 +[ 0.000000] 00000000 00000000 807bd328 8084bcb1 00000002 +00000002 00000001 6d6f4320 +[ 0.000000] 00000000 80c97d3d 80c97d68 fffffffc 807bd328 +00000000 00000000 00000000 +[ 0.000000] 00000000 a0000000 80910000 8110a0b4 00000000 +00000020 80010000 80010000 +[ 0.000000] ... +[ 0.000000] Call Trace: +[ 0.000000] [<80008260>] show_stack+0x28/0xf0 +[ 0.000000] [<8070c958>] dump_stack_lvl+0x60/0x80 +[ 0.000000] [<8002e184>] __warn+0xc4/0xf8 +[ 0.000000] [<8002e210>] warn_slowpath_fmt+0x58/0xa4 +[ 0.000000] [<801c0fac>] kmem_cache_alloc+0x5a4/0x5e8 +[ 0.000000] [<8092856c>] prom_soc_init+0x1fc/0x2b4 +[ 0.000000] [<80928060>] prom_init+0x44/0xf0 +[ 0.000000] [<80929214>] setup_arch+0x4c/0x6a8 +[ 0.000000] [<809257e0>] start_kernel+0x88/0x7c0 +[ 0.000000] +[ 0.000000] ---[ end trace 0000000000000000 ]--- +[ 0.000000] SoC Type: MediaTek MT7621 ver:1 eco:3 +[ 0.000000] printk: bootconsole [early0] enabled + +Allowing soc_device_register to work exposed oops in the mt7621 phy pci, +and pci controller drivers from soc_device_match_attr, due to missing +sentinels in the quirks tables. These were fixed with: +commit 819b885cd886 ("phy: ralink: mt7621-pci: add sentinel to quirks +table") +not yet applied ("PCI: mt7621: add sentinel to quirks table") + +Link: https://lore.kernel.org/linux-mm/becf2ac3-2a90-4f3a-96d9-a70f67c66e4a@app.fastmail.com/ +Fixes: 71b9b5e0130d ("MIPS: ralink: mt7621: introduce 'soc_device' initialization") +Signed-off-by: John Thomson +Signed-off-by: Thomas Bogendoerfer +Signed-off-by: Greg Kroah-Hartman +--- + arch/mips/ralink/mt7621.c | 14 +++++++++----- + 1 file changed, 9 insertions(+), 5 deletions(-) + +--- a/arch/mips/ralink/mt7621.c ++++ b/arch/mips/ralink/mt7621.c +@@ -25,6 +25,7 @@ + #define MT7621_MEM_TEST_PATTERN 0xaa5555aa + + static u32 detect_magic __initdata; ++static struct ralink_soc_info *soc_info_ptr; + + int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge) + { +@@ -147,27 +148,30 @@ static const char __init *mt7621_get_soc + return "E1"; + } + +-static void soc_dev_init(struct ralink_soc_info *soc_info) ++static int __init mt7621_soc_dev_init(void) + { + struct soc_device *soc_dev; + struct soc_device_attribute *soc_dev_attr; + + soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); + if (!soc_dev_attr) +- return; ++ return -ENOMEM; + + soc_dev_attr->soc_id = "mt7621"; + soc_dev_attr->family = "Ralink"; + soc_dev_attr->revision = mt7621_get_soc_revision(); + +- soc_dev_attr->data = soc_info; ++ soc_dev_attr->data = soc_info_ptr; + + soc_dev = soc_device_register(soc_dev_attr); + if (IS_ERR(soc_dev)) { + kfree(soc_dev_attr); +- return; ++ return PTR_ERR(soc_dev); + } ++ ++ return 0; + } ++device_initcall(mt7621_soc_dev_init); + + void __init prom_soc_init(struct ralink_soc_info *soc_info) + { +@@ -209,7 +213,7 @@ void __init prom_soc_init(struct ralink_ + + soc_info->mem_detect = mt7621_memory_detect; + +- soc_dev_init(soc_info); ++ soc_info_ptr = soc_info; + + if (!register_cps_smp_ops()) + return; diff --git a/queue-6.1/mips-ralink-mt7621-soc-queries-and-tests-as-functions.patch b/queue-6.1/mips-ralink-mt7621-soc-queries-and-tests-as-functions.patch new file mode 100644 index 00000000000..f8695fcc46d --- /dev/null +++ b/queue-6.1/mips-ralink-mt7621-soc-queries-and-tests-as-functions.patch @@ -0,0 +1,144 @@ +From b4767d4c072583dec987225b6fe3f5524a735f42 Mon Sep 17 00:00:00 2001 +From: John Thomson +Date: Mon, 14 Nov 2022 11:56:57 +1000 +Subject: mips: ralink: mt7621: soc queries and tests as functions + +From: John Thomson + +commit b4767d4c072583dec987225b6fe3f5524a735f42 upstream. + +Move the SoC register value queries and tests to specific functions, +to remove repetition of logic +No functional changes intended + +Signed-off-by: John Thomson +Signed-off-by: Thomas Bogendoerfer +Signed-off-by: Greg Kroah-Hartman +--- + arch/mips/ralink/mt7621.c | 86 ++++++++++++++++++++++++++++++++-------------- + 1 file changed, 61 insertions(+), 25 deletions(-) + +--- a/arch/mips/ralink/mt7621.c ++++ b/arch/mips/ralink/mt7621.c +@@ -97,7 +97,57 @@ void __init ralink_of_remap(void) + panic("Failed to remap core resources"); + } + +-static void soc_dev_init(struct ralink_soc_info *soc_info, u32 rev) ++static unsigned int __init mt7621_get_soc_name0(void) ++{ ++ return __raw_readl(MT7621_SYSC_BASE + SYSC_REG_CHIP_NAME0); ++} ++ ++static unsigned int __init mt7621_get_soc_name1(void) ++{ ++ return __raw_readl(MT7621_SYSC_BASE + SYSC_REG_CHIP_NAME1); ++} ++ ++static bool __init mt7621_soc_valid(void) ++{ ++ if (mt7621_get_soc_name0() == MT7621_CHIP_NAME0 && ++ mt7621_get_soc_name1() == MT7621_CHIP_NAME1) ++ return true; ++ else ++ return false; ++} ++ ++static const char __init *mt7621_get_soc_id(void) ++{ ++ if (mt7621_soc_valid()) ++ return "MT7621"; ++ else ++ return "invalid"; ++} ++ ++static unsigned int __init mt7621_get_soc_rev(void) ++{ ++ return __raw_readl(MT7621_SYSC_BASE + SYSC_REG_CHIP_REV); ++} ++ ++static unsigned int __init mt7621_get_soc_ver(void) ++{ ++ return (mt7621_get_soc_rev() >> CHIP_REV_VER_SHIFT) & CHIP_REV_VER_MASK; ++} ++ ++static unsigned int __init mt7621_get_soc_eco(void) ++{ ++ return (mt7621_get_soc_rev() & CHIP_REV_ECO_MASK); ++} ++ ++static const char __init *mt7621_get_soc_revision(void) ++{ ++ if (mt7621_get_soc_rev() == 1 && mt7621_get_soc_eco() == 1) ++ return "E2"; ++ else ++ return "E1"; ++} ++ ++static void soc_dev_init(struct ralink_soc_info *soc_info) + { + struct soc_device *soc_dev; + struct soc_device_attribute *soc_dev_attr; +@@ -108,12 +158,7 @@ static void soc_dev_init(struct ralink_s + + soc_dev_attr->soc_id = "mt7621"; + soc_dev_attr->family = "Ralink"; +- +- if (((rev >> CHIP_REV_VER_SHIFT) & CHIP_REV_VER_MASK) == 1 && +- (rev & CHIP_REV_ECO_MASK) == 1) +- soc_dev_attr->revision = "E2"; +- else +- soc_dev_attr->revision = "E1"; ++ soc_dev_attr->revision = mt7621_get_soc_revision(); + + soc_dev_attr->data = soc_info; + +@@ -126,11 +171,6 @@ static void soc_dev_init(struct ralink_s + + void __init prom_soc_init(struct ralink_soc_info *soc_info) + { +- unsigned char *name = NULL; +- u32 n0; +- u32 n1; +- u32 rev; +- + /* Early detection of CMP support */ + mips_cm_probe(); + mips_cpc_probe(); +@@ -153,27 +193,23 @@ void __init prom_soc_init(struct ralink_ + __sync(); + } + +- n0 = __raw_readl(MT7621_SYSC_BASE + SYSC_REG_CHIP_NAME0); +- n1 = __raw_readl(MT7621_SYSC_BASE + SYSC_REG_CHIP_NAME1); +- +- if (n0 == MT7621_CHIP_NAME0 && n1 == MT7621_CHIP_NAME1) { +- name = "MT7621"; ++ if (mt7621_soc_valid()) + soc_info->compatible = "mediatek,mt7621-soc"; +- } else { +- panic("mt7621: unknown SoC, n0:%08x n1:%08x\n", n0, n1); +- } ++ else ++ panic("mt7621: unknown SoC, n0:%08x n1:%08x\n", ++ mt7621_get_soc_name0(), ++ mt7621_get_soc_name1()); + ralink_soc = MT762X_SOC_MT7621AT; +- rev = __raw_readl(MT7621_SYSC_BASE + SYSC_REG_CHIP_REV); + + snprintf(soc_info->sys_type, RAMIPS_SYS_TYPE_LEN, + "MediaTek %s ver:%u eco:%u", +- name, +- (rev >> CHIP_REV_VER_SHIFT) & CHIP_REV_VER_MASK, +- (rev & CHIP_REV_ECO_MASK)); ++ mt7621_get_soc_id(), ++ mt7621_get_soc_ver(), ++ mt7621_get_soc_eco()); + + soc_info->mem_detect = mt7621_memory_detect; + +- soc_dev_init(soc_info, rev); ++ soc_dev_init(soc_info); + + if (!register_cps_smp_ops()) + return; diff --git a/queue-6.1/pci-mt7621-add-sentinel-to-quirks-table.patch b/queue-6.1/pci-mt7621-add-sentinel-to-quirks-table.patch new file mode 100644 index 00000000000..72f821d9338 --- /dev/null +++ b/queue-6.1/pci-mt7621-add-sentinel-to-quirks-table.patch @@ -0,0 +1,43 @@ +From 19098934f910b4d47cb30251dd39ffa57bef9523 Mon Sep 17 00:00:00 2001 +From: John Thomson +Date: Tue, 6 Dec 2022 06:46:45 +1000 +Subject: PCI: mt7621: Add sentinel to quirks table + +From: John Thomson + +commit 19098934f910b4d47cb30251dd39ffa57bef9523 upstream. + +Current driver is missing a sentinel in the struct soc_device_attribute +array, which causes an oops when assessed by the +soc_device_match(mt7621_pcie_quirks_match) call. + +This was only exposed once the CONFIG_SOC_MT7621 mt7621 soc_dev_attr +was fixed to register the SOC as a device, in: + +commit 7c18b64bba3b ("mips: ralink: mt7621: do not use kzalloc too early") + +Fix it by adding the required sentinel. + +Link: https://lore.kernel.org/lkml/26ebbed1-0fe9-4af9-8466-65f841d0b382@app.fastmail.com +Link: https://lore.kernel.org/r/20221205204645.301301-1-git@johnthomson.fastmail.com.au +Fixes: b483b4e4d3f6 ("staging: mt7621-pci: add quirks for 'E2' revision using 'soc_device_attribute'") +Signed-off-by: John Thomson +Signed-off-by: Lorenzo Pieralisi +Acked-by: Sergio Paracuellos +Signed-off-by: Greg Kroah-Hartman +--- + drivers/pci/controller/pcie-mt7621.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/pci/controller/pcie-mt7621.c ++++ b/drivers/pci/controller/pcie-mt7621.c +@@ -466,7 +466,8 @@ static int mt7621_pcie_register_host(str + } + + static const struct soc_device_attribute mt7621_pcie_quirks_match[] = { +- { .soc_id = "mt7621", .revision = "E2" } ++ { .soc_id = "mt7621", .revision = "E2" }, ++ { /* sentinel */ } + }; + + static int mt7621_pcie_probe(struct platform_device *pdev) diff --git a/queue-6.1/series b/queue-6.1/series index c6ed5b6c9c1..e1ec376bc05 100644 --- a/queue-6.1/series +++ b/queue-6.1/series @@ -1,2 +1,7 @@ x86-vdso-conditionally-export-__vdso_sgx_enter_enclave.patch libbpf-fix-uninitialized-warning-in-btf_dump_dump_type_data.patch +pci-mt7621-add-sentinel-to-quirks-table.patch +mips-ralink-mt7621-define-mt7621_sysc_base-with-__iomem.patch +mips-ralink-mt7621-soc-queries-and-tests-as-functions.patch +mips-ralink-mt7621-do-not-use-kzalloc-too-early.patch +irqchip-ls-extirq-fix-endianness-detection.patch -- 2.47.3