From f7ecde051dd73fad8265e83c26ea69ae0a86e1d4 Mon Sep 17 00:00:00 2001 From: BALATON Zoltan Date: Wed, 1 Nov 2023 21:45:36 +0100 Subject: [PATCH] ati-vga: Fix aperture sizes MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Apparently these should be half the memory region sizes confirmed at least by Radeon FCocde ROM while Rage 128 Pro ROMs don't seem to use these. Linux r100 DRM driver also checks for a bit in HOST_PATH_CNTL so we also add that even though the FCode ROM does not seem to set it. Signed-off-by: BALATON Zoltan Reviewed-by: Marc-André Lureau Message-ID: --- hw/display/ati.c | 7 +++++-- hw/display/ati_dbg.c | 1 + hw/display/ati_regs.h | 1 + 3 files changed, 7 insertions(+), 2 deletions(-) diff --git a/hw/display/ati.c b/hw/display/ati.c index 6e38e005022..9a9ea754bd9 100644 --- a/hw/display/ati.c +++ b/hw/display/ati.c @@ -349,14 +349,17 @@ static uint64_t ati_mm_read(void *opaque, hwaddr addr, unsigned int size) PCI_BASE_ADDRESS_0, size) & 0xfffffff0; break; case CONFIG_APER_SIZE: - val = s->vga.vram_size; + val = s->vga.vram_size / 2; break; case CONFIG_REG_1_BASE: val = pci_default_read_config(&s->dev, PCI_BASE_ADDRESS_2, size) & 0xfffffff0; break; case CONFIG_REG_APER_SIZE: - val = memory_region_size(&s->mm); + val = memory_region_size(&s->mm) / 2; + break; + case HOST_PATH_CNTL: + val = BIT(23); /* Radeon HDP_APER_CNTL */ break; case MC_STATUS: val = 5; diff --git a/hw/display/ati_dbg.c b/hw/display/ati_dbg.c index bd0ecd48c7a..4aec1c383a4 100644 --- a/hw/display/ati_dbg.c +++ b/hw/display/ati_dbg.c @@ -38,6 +38,7 @@ static struct ati_regdesc ati_reg_names[] = { {"CONFIG_APER_SIZE", 0x0108}, {"CONFIG_REG_1_BASE", 0x010c}, {"CONFIG_REG_APER_SIZE", 0x0110}, + {"HOST_PATH_CNTL", 0x0130}, {"MEM_CNTL", 0x0140}, {"MC_FB_LOCATION", 0x0148}, {"MC_AGP_LOCATION", 0x014C}, diff --git a/hw/display/ati_regs.h b/hw/display/ati_regs.h index d6282b2ef21..c697b328da5 100644 --- a/hw/display/ati_regs.h +++ b/hw/display/ati_regs.h @@ -56,6 +56,7 @@ #define CONFIG_APER_SIZE 0x0108 #define CONFIG_REG_1_BASE 0x010c #define CONFIG_REG_APER_SIZE 0x0110 +#define HOST_PATH_CNTL 0x0130 #define MEM_CNTL 0x0140 #define MC_FB_LOCATION 0x0148 #define MC_AGP_LOCATION 0x014C -- 2.39.5