From f9711fbd1bc3a303eb0a3f79bd7f66d00c7197c1 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Sat, 18 Jan 2020 16:13:34 +0100 Subject: [PATCH] 4.19-stable patches added patches: alsa-dice-fix-fallback-from-protocol-extension-into-limited-functionality.patch alsa-seq-fix-racy-access-for-queue-timer-in-proc-read.patch alsa-usb-audio-fix-sync-ep-altsetting-sanity-check.patch arm-dts-am571x-idk-fix-gpios-property-to-have-the-correct-gpio-number.patch arm-dts-imx6q-dhcom-fix-rtc-compatible.patch arm-dts-imx6q-dhcom-fix-sgtl5000-vddio-regulator-connection.patch arm-dts-meson8-fix-the-size-of-the-pmu-registers.patch arm64-dts-allwinner-a64-olinuxino-fix-sdio-supply-regulator.patch asoc-msm8916-wcd-analog-fix-mic-bias-internal1.patch asoc-msm8916-wcd-analog-fix-selected-events-for-mic-bias-external1.patch asoc-msm8916-wcd-digital-reset-rx-interpolation-path-after-use.patch block-fix-an-integer-overflow-in-logical-block-size.patch clk-don-t-try-to-enable-critical-clocks-if-prepare-failed.patch clk-qcom-gcc-sdm845-add-missing-flag-to-votable-gdscs.patch dt-bindings-reset-meson8b-fix-duplicate-reset-ids.patch fix-built-in-early-load-intel-microcode-alignment.patch --- ...extension-into-limited-functionality.patch | 40 ++++++ ...-access-for-queue-timer-in-proc-read.patch | 54 ++++++++ ...-fix-sync-ep-altsetting-sanity-check.patch | 42 +++++++ ...erty-to-have-the-correct-gpio-number.patch | 38 ++++++ ...m-dts-imx6q-dhcom-fix-rtc-compatible.patch | 32 +++++ ...-sgtl5000-vddio-regulator-connection.patch | 36 ++++++ ...n8-fix-the-size-of-the-pmu-registers.patch | 54 ++++++++ ...-olinuxino-fix-sdio-supply-regulator.patch | 37 ++++++ ...16-wcd-analog-fix-mic-bias-internal1.patch | 67 ++++++++++ ...lected-events-for-mic-bias-external1.patch | 44 +++++++ ...eset-rx-interpolation-path-after-use.patch | 52 ++++++++ ...teger-overflow-in-logical-block-size.patch | 116 ++++++++++++++++++ ...le-critical-clocks-if-prepare-failed.patch | 65 ++++++++++ ...45-add-missing-flag-to-votable-gdscs.patch | 96 +++++++++++++++ ...eset-meson8b-fix-duplicate-reset-ids.patch | 42 +++++++ ...early-load-intel-microcode-alignment.patch | 54 ++++++++ 16 files changed, 869 insertions(+) create mode 100644 queue-4.19/alsa-dice-fix-fallback-from-protocol-extension-into-limited-functionality.patch create mode 100644 queue-4.19/alsa-seq-fix-racy-access-for-queue-timer-in-proc-read.patch create mode 100644 queue-4.19/alsa-usb-audio-fix-sync-ep-altsetting-sanity-check.patch create mode 100644 queue-4.19/arm-dts-am571x-idk-fix-gpios-property-to-have-the-correct-gpio-number.patch create mode 100644 queue-4.19/arm-dts-imx6q-dhcom-fix-rtc-compatible.patch create mode 100644 queue-4.19/arm-dts-imx6q-dhcom-fix-sgtl5000-vddio-regulator-connection.patch create mode 100644 queue-4.19/arm-dts-meson8-fix-the-size-of-the-pmu-registers.patch create mode 100644 queue-4.19/arm64-dts-allwinner-a64-olinuxino-fix-sdio-supply-regulator.patch create mode 100644 queue-4.19/asoc-msm8916-wcd-analog-fix-mic-bias-internal1.patch create mode 100644 queue-4.19/asoc-msm8916-wcd-analog-fix-selected-events-for-mic-bias-external1.patch create mode 100644 queue-4.19/asoc-msm8916-wcd-digital-reset-rx-interpolation-path-after-use.patch create mode 100644 queue-4.19/block-fix-an-integer-overflow-in-logical-block-size.patch create mode 100644 queue-4.19/clk-don-t-try-to-enable-critical-clocks-if-prepare-failed.patch create mode 100644 queue-4.19/clk-qcom-gcc-sdm845-add-missing-flag-to-votable-gdscs.patch create mode 100644 queue-4.19/dt-bindings-reset-meson8b-fix-duplicate-reset-ids.patch create mode 100644 queue-4.19/fix-built-in-early-load-intel-microcode-alignment.patch diff --git a/queue-4.19/alsa-dice-fix-fallback-from-protocol-extension-into-limited-functionality.patch b/queue-4.19/alsa-dice-fix-fallback-from-protocol-extension-into-limited-functionality.patch new file mode 100644 index 00000000000..af893527a74 --- /dev/null +++ b/queue-4.19/alsa-dice-fix-fallback-from-protocol-extension-into-limited-functionality.patch @@ -0,0 +1,40 @@ +From 3e2dc6bdb56893bc28257e482e1dbe5d39f313df Mon Sep 17 00:00:00 2001 +From: Takashi Sakamoto +Date: Mon, 13 Jan 2020 17:46:28 +0900 +Subject: ALSA: dice: fix fallback from protocol extension into limited functionality + +From: Takashi Sakamoto + +commit 3e2dc6bdb56893bc28257e482e1dbe5d39f313df upstream. + +At failure of attempt to detect protocol extension, ALSA dice driver +should be fallback to limited functionality. However it's not. + +This commit fixes it. + +Cc: # v4.18+ +Fixes: 58579c056c1c9 ("ALSA: dice: use extended protocol to detect available stream formats") +Signed-off-by: Takashi Sakamoto +Link: https://lore.kernel.org/r/20200113084630.14305-2-o-takashi@sakamocchi.jp +Signed-off-by: Takashi Iwai +Signed-off-by: Greg Kroah-Hartman + +--- + sound/firewire/dice/dice-extension.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +--- a/sound/firewire/dice/dice-extension.c ++++ b/sound/firewire/dice/dice-extension.c +@@ -159,8 +159,11 @@ int snd_dice_detect_extension_formats(st + int j; + + for (j = i + 1; j < 9; ++j) { +- if (pointers[i * 2] == pointers[j * 2]) ++ if (pointers[i * 2] == pointers[j * 2]) { ++ // Fallback to limited functionality. ++ err = -ENXIO; + goto end; ++ } + } + } + diff --git a/queue-4.19/alsa-seq-fix-racy-access-for-queue-timer-in-proc-read.patch b/queue-4.19/alsa-seq-fix-racy-access-for-queue-timer-in-proc-read.patch new file mode 100644 index 00000000000..af0218a5a21 --- /dev/null +++ b/queue-4.19/alsa-seq-fix-racy-access-for-queue-timer-in-proc-read.patch @@ -0,0 +1,54 @@ +From 60adcfde92fa40fcb2dbf7cc52f9b096e0cd109a Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Wed, 15 Jan 2020 21:37:33 +0100 +Subject: ALSA: seq: Fix racy access for queue timer in proc read + +From: Takashi Iwai + +commit 60adcfde92fa40fcb2dbf7cc52f9b096e0cd109a upstream. + +snd_seq_info_timer_read() reads the information of the timer assigned +for each queue, but it's done in a racy way which may lead to UAF as +spotted by syzkaller. + +This patch applies the missing q->timer_mutex lock while accessing the +timer object as well as a slight code change to adapt the standard +coding style. + +Reported-by: syzbot+2b2ef983f973e5c40943@syzkaller.appspotmail.com +Cc: +Link: https://lore.kernel.org/r/20200115203733.26530-1-tiwai@suse.de +Signed-off-by: Takashi Iwai +Signed-off-by: Greg Kroah-Hartman + +--- + sound/core/seq/seq_timer.c | 14 +++++++++----- + 1 file changed, 9 insertions(+), 5 deletions(-) + +--- a/sound/core/seq/seq_timer.c ++++ b/sound/core/seq/seq_timer.c +@@ -480,15 +480,19 @@ void snd_seq_info_timer_read(struct snd_ + q = queueptr(idx); + if (q == NULL) + continue; +- if ((tmr = q->timer) == NULL || +- (ti = tmr->timeri) == NULL) { +- queuefree(q); +- continue; +- } ++ mutex_lock(&q->timer_mutex); ++ tmr = q->timer; ++ if (!tmr) ++ goto unlock; ++ ti = tmr->timeri; ++ if (!ti) ++ goto unlock; + snd_iprintf(buffer, "Timer for queue %i : %s\n", q->queue, ti->timer->name); + resolution = snd_timer_resolution(ti) * tmr->ticks; + snd_iprintf(buffer, " Period time : %lu.%09lu\n", resolution / 1000000000, resolution % 1000000000); + snd_iprintf(buffer, " Skew : %u / %u\n", tmr->skew, tmr->skew_base); ++unlock: ++ mutex_unlock(&q->timer_mutex); + queuefree(q); + } + } diff --git a/queue-4.19/alsa-usb-audio-fix-sync-ep-altsetting-sanity-check.patch b/queue-4.19/alsa-usb-audio-fix-sync-ep-altsetting-sanity-check.patch new file mode 100644 index 00000000000..ba7efc1d40e --- /dev/null +++ b/queue-4.19/alsa-usb-audio-fix-sync-ep-altsetting-sanity-check.patch @@ -0,0 +1,42 @@ +From 5d1b71226dc4d44b4b65766fa9d74492f9d4587b Mon Sep 17 00:00:00 2001 +From: Johan Hovold +Date: Tue, 14 Jan 2020 09:39:53 +0100 +Subject: ALSA: usb-audio: fix sync-ep altsetting sanity check + +From: Johan Hovold + +commit 5d1b71226dc4d44b4b65766fa9d74492f9d4587b upstream. + +The altsetting sanity check in set_sync_ep_implicit_fb_quirk() was +checking for there to be at least one altsetting but then went on to +access the second one, which may not exist. + +This could lead to random slab data being used to initialise the sync +endpoint in snd_usb_add_endpoint(). + +Fixes: c75a8a7ae565 ("ALSA: snd-usb: add support for implicit feedback") +Fixes: ca10a7ebdff1 ("ALSA: usb-audio: FT C400 sync playback EP to capture EP") +Fixes: 5e35dc0338d8 ("ALSA: usb-audio: add implicit fb quirk for Behringer UFX1204") +Fixes: 17f08b0d9aaf ("ALSA: usb-audio: add implicit fb quirk for Axe-Fx II") +Fixes: 103e9625647a ("ALSA: usb-audio: simplify set_sync_ep_implicit_fb_quirk") +Cc: stable # 3.5 +Signed-off-by: Johan Hovold +Link: https://lore.kernel.org/r/20200114083953.1106-1-johan@kernel.org +Signed-off-by: Takashi Iwai +Signed-off-by: Greg Kroah-Hartman + +--- + sound/usb/pcm.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/sound/usb/pcm.c ++++ b/sound/usb/pcm.c +@@ -377,7 +377,7 @@ static int set_sync_ep_implicit_fb_quirk + add_sync_ep_from_ifnum: + iface = usb_ifnum_to_if(dev, ifnum); + +- if (!iface || iface->num_altsetting == 0) ++ if (!iface || iface->num_altsetting < 2) + return -EINVAL; + + alts = &iface->altsetting[1]; diff --git a/queue-4.19/arm-dts-am571x-idk-fix-gpios-property-to-have-the-correct-gpio-number.patch b/queue-4.19/arm-dts-am571x-idk-fix-gpios-property-to-have-the-correct-gpio-number.patch new file mode 100644 index 00000000000..26546a1f527 --- /dev/null +++ b/queue-4.19/arm-dts-am571x-idk-fix-gpios-property-to-have-the-correct-gpio-number.patch @@ -0,0 +1,38 @@ +From 0c4eb2a6b3c6b0facd0a3bccda5db22e7b3b6f96 Mon Sep 17 00:00:00 2001 +From: Kishon Vijay Abraham I +Date: Tue, 17 Dec 2019 14:21:23 +0530 +Subject: ARM: dts: am571x-idk: Fix gpios property to have the correct gpio number + +From: Kishon Vijay Abraham I + +commit 0c4eb2a6b3c6b0facd0a3bccda5db22e7b3b6f96 upstream. + +commit d23f3839fe97d8dce03d ("ARM: dts: DRA7: Add pcie1 dt node for +EP mode") while adding the dt node for EP mode for DRA7 platform, +added rc node for am571x-idk and populated gpios property with +"gpio3 23". However the GPIO_PCIE_SWRST line is actually connected +to "gpio5 18". Fix it here. (The patch adding "gpio3 23" was tested +with another am57x board in EP mode which doesn't rely on reset from +host). + +Cc: stable # 4.14+ +Fixes: d23f3839fe97d8dce03d ("ARM: dts: DRA7: Add pcie1 dt node for EP mode") +Signed-off-by: Kishon Vijay Abraham I +Signed-off-by: Tony Lindgren +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm/boot/dts/am571x-idk.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/am571x-idk.dts ++++ b/arch/arm/boot/dts/am571x-idk.dts +@@ -90,7 +90,7 @@ + + &pcie1_rc { + status = "okay"; +- gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>; ++ gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>; + }; + + &pcie1_ep { diff --git a/queue-4.19/arm-dts-imx6q-dhcom-fix-rtc-compatible.patch b/queue-4.19/arm-dts-imx6q-dhcom-fix-rtc-compatible.patch new file mode 100644 index 00000000000..9f450763b96 --- /dev/null +++ b/queue-4.19/arm-dts-imx6q-dhcom-fix-rtc-compatible.patch @@ -0,0 +1,32 @@ +From 7d7778b1396bc9e2a3875009af522beb4ea9355a Mon Sep 17 00:00:00 2001 +From: Alexandre Belloni +Date: Fri, 13 Dec 2019 00:08:14 +0100 +Subject: ARM: dts: imx6q-dhcom: fix rtc compatible + +From: Alexandre Belloni + +commit 7d7778b1396bc9e2a3875009af522beb4ea9355a upstream. + +The only correct and documented compatible string for the rv3029 is +microcrystal,rv3029. Fix it up. + +Fixes: 52c7a088badd ("ARM: dts: imx6q: Add support for the DHCOM iMX6 SoM and PDK2") +Signed-off-by: Alexandre Belloni +Signed-off-by: Shawn Guo +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm/boot/dts/imx6q-dhcom-som.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/imx6q-dhcom-som.dtsi ++++ b/arch/arm/boot/dts/imx6q-dhcom-som.dtsi +@@ -205,7 +205,7 @@ + }; + + rtc@56 { +- compatible = "rv3029c2"; ++ compatible = "microcrystal,rv3029"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rtc_hw300>; + reg = <0x56>; diff --git a/queue-4.19/arm-dts-imx6q-dhcom-fix-sgtl5000-vddio-regulator-connection.patch b/queue-4.19/arm-dts-imx6q-dhcom-fix-sgtl5000-vddio-regulator-connection.patch new file mode 100644 index 00000000000..ebe06f879f0 --- /dev/null +++ b/queue-4.19/arm-dts-imx6q-dhcom-fix-sgtl5000-vddio-regulator-connection.patch @@ -0,0 +1,36 @@ +From fe6a6689d1815b63528796886853890d8ee7f021 Mon Sep 17 00:00:00 2001 +From: Marek Vasut +Date: Fri, 20 Dec 2019 10:11:24 +0100 +Subject: ARM: dts: imx6q-dhcom: Fix SGTL5000 VDDIO regulator connection + +From: Marek Vasut + +commit fe6a6689d1815b63528796886853890d8ee7f021 upstream. + +The SGTL5000 VDDIO is connected to the PMIC SW2 output, not to +a fixed 3V3 rail. Describe this correctly in the DT. + +Fixes: 52c7a088badd ("ARM: dts: imx6q: Add support for the DHCOM iMX6 SoM and PDK2") +Signed-off-by: Marek Vasut +Cc: Fabio Estevam +Cc: Ludwig Zenz +Cc: NXP Linux Team +To: linux-arm-kernel@lists.infradead.org +Signed-off-by: Shawn Guo +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm/boot/dts/imx6q-dhcom-pdk2.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/imx6q-dhcom-pdk2.dts ++++ b/arch/arm/boot/dts/imx6q-dhcom-pdk2.dts +@@ -55,7 +55,7 @@ + #sound-dai-cells = <0>; + clocks = <&clk_ext_audio_codec>; + VDDA-supply = <®_3p3v>; +- VDDIO-supply = <®_3p3v>; ++ VDDIO-supply = <&sw2_reg>; + }; + }; + diff --git a/queue-4.19/arm-dts-meson8-fix-the-size-of-the-pmu-registers.patch b/queue-4.19/arm-dts-meson8-fix-the-size-of-the-pmu-registers.patch new file mode 100644 index 00000000000..73444b6a228 --- /dev/null +++ b/queue-4.19/arm-dts-meson8-fix-the-size-of-the-pmu-registers.patch @@ -0,0 +1,54 @@ +From 46c9585ed4af688ff1be6d4e76d7ed2f04de4fba Mon Sep 17 00:00:00 2001 +From: Martin Blumenstingl +Date: Sun, 17 Nov 2019 16:41:54 +0100 +Subject: ARM: dts: meson8: fix the size of the PMU registers + +From: Martin Blumenstingl + +commit 46c9585ed4af688ff1be6d4e76d7ed2f04de4fba upstream. + +The PMU registers are at least 0x18 bytes wide. Meson8b already uses a +size of 0x18. The structure of the PMU registers on Meson8 and Meson8b +is similar but not identical. + +Meson8 and Meson8b have the following registers in common (starting at +AOBUS + 0xe0): + #define AO_RTI_PWR_A9_CNTL0 0xe0 (0x38 << 2) + #define AO_RTI_PWR_A9_CNTL1 0xe4 (0x39 << 2) + #define AO_RTI_GEN_PWR_SLEEP0 0xe8 (0x3a << 2) + #define AO_RTI_GEN_PWR_ISO0 0x4c (0x3b << 2) + +Meson8b additionally has these three registers: + #define AO_RTI_GEN_PWR_ACK0 0xf0 (0x3c << 2) + #define AO_RTI_PWR_A9_MEM_PD0 0xf4 (0x3d << 2) + #define AO_RTI_PWR_A9_MEM_PD1 0xf8 (0x3e << 2) + +Thus we can assume that the register size of the PMU IP blocks is +identical on both SoCs (and Meson8 just contains some reserved registers +in that area) because the CEC registers start right after the PMU +(AO_RTI_*) registers at AOBUS + 0x100 (0x40 << 2). + +The upcoming power domain driver will need to read and write the +AO_RTI_GEN_PWR_SLEEP0 and AO_RTI_GEN_PWR_ISO0 registers, so the updated +size is needed for that driver to work. + +Fixes: 4a5a27116b447d ("ARM: dts: meson8: add support for booting the secondary CPU cores") +Signed-off-by: Martin Blumenstingl +Signed-off-by: Kevin Hilman +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm/boot/dts/meson8.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/meson8.dtsi ++++ b/arch/arm/boot/dts/meson8.dtsi +@@ -139,7 +139,7 @@ + &aobus { + pmu: pmu@e0 { + compatible = "amlogic,meson8-pmu", "syscon"; +- reg = <0xe0 0x8>; ++ reg = <0xe0 0x18>; + }; + + pinctrl_aobus: pinctrl@84 { diff --git a/queue-4.19/arm64-dts-allwinner-a64-olinuxino-fix-sdio-supply-regulator.patch b/queue-4.19/arm64-dts-allwinner-a64-olinuxino-fix-sdio-supply-regulator.patch new file mode 100644 index 00000000000..e081a84d869 --- /dev/null +++ b/queue-4.19/arm64-dts-allwinner-a64-olinuxino-fix-sdio-supply-regulator.patch @@ -0,0 +1,37 @@ +From 3d615c2fc2d111b51d2e20516b920138d4ae29a2 Mon Sep 17 00:00:00 2001 +From: Stefan Mavrodiev +Date: Fri, 29 Nov 2019 13:39:41 +0200 +Subject: arm64: dts: allwinner: a64: olinuxino: Fix SDIO supply regulator + +From: Stefan Mavrodiev + +commit 3d615c2fc2d111b51d2e20516b920138d4ae29a2 upstream. + +A64-OLinuXino uses DCDC1 (VCC-IO) for MMC1 supply. In commit 916b68cfe4b5 +("arm64: dts: a64-olinuxino: Enable RTL8723BS WiFi") ALDO2 is set, which is +VCC-PL. Since DCDC1 is always present, the boards are working without a +problem. + +This patch sets the correct regulator. + +Fixes: 916b68cfe4b5 ("arm64: dts: a64-olinuxino: Enable RTL8723BS WiFi") +Cc: stable@vger.kernel.org # v4.16+ +Signed-off-by: Stefan Mavrodiev +Signed-off-by: Maxime Ripard +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts +@@ -77,7 +77,7 @@ + &mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; +- vmmc-supply = <®_aldo2>; ++ vmmc-supply = <®_dcdc1>; + vqmmc-supply = <®_dldo4>; + mmc-pwrseq = <&wifi_pwrseq>; + bus-width = <4>; diff --git a/queue-4.19/asoc-msm8916-wcd-analog-fix-mic-bias-internal1.patch b/queue-4.19/asoc-msm8916-wcd-analog-fix-mic-bias-internal1.patch new file mode 100644 index 00000000000..b028168b105 --- /dev/null +++ b/queue-4.19/asoc-msm8916-wcd-analog-fix-mic-bias-internal1.patch @@ -0,0 +1,67 @@ +From 057efcf9faea4769cf1020677d93d040db9b23f3 Mon Sep 17 00:00:00 2001 +From: Stephan Gerhold +Date: Sat, 11 Jan 2020 17:40:04 +0100 +Subject: ASoC: msm8916-wcd-analog: Fix MIC BIAS Internal1 + +From: Stephan Gerhold + +commit 057efcf9faea4769cf1020677d93d040db9b23f3 upstream. + +MIC BIAS Internal1 is broken at the moment because we always +enable the internal rbias resistor to the TX2 line (connected to +the headset microphone), rather than enabling the resistor connected +to TX1. + +Move the RBIAS code to pm8916_wcd_analog_enable_micbias_int1/2() +to fix this. + +Fixes: 585e881e5b9e ("ASoC: codecs: Add msm8916-wcd analog codec") +Cc: Srinivas Kandagatla +Signed-off-by: Stephan Gerhold +Link: https://lore.kernel.org/r/20200111164006.43074-3-stephan@gerhold.net +Signed-off-by: Mark Brown +Signed-off-by: Greg Kroah-Hartman + +--- + sound/soc/codecs/msm8916-wcd-analog.c | 16 +++++++++++++--- + 1 file changed, 13 insertions(+), 3 deletions(-) + +--- a/sound/soc/codecs/msm8916-wcd-analog.c ++++ b/sound/soc/codecs/msm8916-wcd-analog.c +@@ -388,9 +388,6 @@ static int pm8916_wcd_analog_enable_micb + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: +- snd_soc_component_update_bits(component, CDC_A_MICB_1_INT_RBIAS, +- MICB_1_INT_TX2_INT_RBIAS_EN_MASK, +- MICB_1_INT_TX2_INT_RBIAS_EN_ENABLE); + snd_soc_component_update_bits(component, reg, MICB_1_EN_PULL_DOWN_EN_MASK, 0); + snd_soc_component_update_bits(component, CDC_A_MICB_1_EN, + MICB_1_EN_OPA_STG2_TAIL_CURR_MASK, +@@ -440,6 +437,14 @@ static int pm8916_wcd_analog_enable_micb + struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); + struct pm8916_wcd_analog_priv *wcd = snd_soc_component_get_drvdata(component); + ++ switch (event) { ++ case SND_SOC_DAPM_PRE_PMU: ++ snd_soc_component_update_bits(component, CDC_A_MICB_1_INT_RBIAS, ++ MICB_1_INT_TX1_INT_RBIAS_EN_MASK, ++ MICB_1_INT_TX1_INT_RBIAS_EN_ENABLE); ++ break; ++ } ++ + return pm8916_wcd_analog_enable_micbias_int(component, event, w->reg, + wcd->micbias1_cap_mode); + } +@@ -550,6 +555,11 @@ static int pm8916_wcd_analog_enable_micb + struct pm8916_wcd_analog_priv *wcd = snd_soc_component_get_drvdata(component); + + switch (event) { ++ case SND_SOC_DAPM_PRE_PMU: ++ snd_soc_component_update_bits(component, CDC_A_MICB_1_INT_RBIAS, ++ MICB_1_INT_TX2_INT_RBIAS_EN_MASK, ++ MICB_1_INT_TX2_INT_RBIAS_EN_ENABLE); ++ break; + case SND_SOC_DAPM_POST_PMU: + pm8916_mbhc_configure_bias(wcd, true); + break; diff --git a/queue-4.19/asoc-msm8916-wcd-analog-fix-selected-events-for-mic-bias-external1.patch b/queue-4.19/asoc-msm8916-wcd-analog-fix-selected-events-for-mic-bias-external1.patch new file mode 100644 index 00000000000..970bc20851f --- /dev/null +++ b/queue-4.19/asoc-msm8916-wcd-analog-fix-selected-events-for-mic-bias-external1.patch @@ -0,0 +1,44 @@ +From e0beec88397b163c7c4ea6fcfb67e8e07a2671dc Mon Sep 17 00:00:00 2001 +From: Stephan Gerhold +Date: Sat, 11 Jan 2020 17:40:03 +0100 +Subject: ASoC: msm8916-wcd-analog: Fix selected events for MIC BIAS External1 + +From: Stephan Gerhold + +commit e0beec88397b163c7c4ea6fcfb67e8e07a2671dc upstream. + +MIC BIAS External1 sets pm8916_wcd_analog_enable_micbias_ext1() +as event handler, which ends up in pm8916_wcd_analog_enable_micbias_ext(). + +But pm8916_wcd_analog_enable_micbias_ext() only handles the POST_PMU +event, which is not specified in the event flags for MIC BIAS External1. +This means that the code in the event handler is never actually run. + +Set SND_SOC_DAPM_POST_PMU as the only event for the handler to fix this. + +Fixes: 585e881e5b9e ("ASoC: codecs: Add msm8916-wcd analog codec") +Cc: Srinivas Kandagatla +Signed-off-by: Stephan Gerhold +Link: https://lore.kernel.org/r/20200111164006.43074-2-stephan@gerhold.net +Signed-off-by: Mark Brown +Signed-off-by: Greg Kroah-Hartman + +--- + sound/soc/codecs/msm8916-wcd-analog.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/sound/soc/codecs/msm8916-wcd-analog.c ++++ b/sound/soc/codecs/msm8916-wcd-analog.c +@@ -885,10 +885,10 @@ static const struct snd_soc_dapm_widget + + SND_SOC_DAPM_SUPPLY("MIC BIAS External1", CDC_A_MICB_1_EN, 7, 0, + pm8916_wcd_analog_enable_micbias_ext1, +- SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), ++ SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_SUPPLY("MIC BIAS External2", CDC_A_MICB_2_EN, 7, 0, + pm8916_wcd_analog_enable_micbias_ext2, +- SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), ++ SND_SOC_DAPM_POST_PMU), + + SND_SOC_DAPM_ADC_E("ADC1", NULL, CDC_A_TX_1_EN, 7, 0, + pm8916_wcd_analog_enable_adc, diff --git a/queue-4.19/asoc-msm8916-wcd-digital-reset-rx-interpolation-path-after-use.patch b/queue-4.19/asoc-msm8916-wcd-digital-reset-rx-interpolation-path-after-use.patch new file mode 100644 index 00000000000..9bcb88d646c --- /dev/null +++ b/queue-4.19/asoc-msm8916-wcd-digital-reset-rx-interpolation-path-after-use.patch @@ -0,0 +1,52 @@ +From 85578bbd642f65065039b1765ebe1a867d5435b0 Mon Sep 17 00:00:00 2001 +From: Stephan Gerhold +Date: Sun, 5 Jan 2020 11:27:53 +0100 +Subject: ASoC: msm8916-wcd-digital: Reset RX interpolation path after use + +From: Stephan Gerhold + +commit 85578bbd642f65065039b1765ebe1a867d5435b0 upstream. + +For some reason, attempting to route audio through QDSP6 on MSM8916 +causes the RX interpolation path to get "stuck" after playing audio +a few times. In this situation, the analog codec part is still working, +but the RX path in the digital codec stops working, so you only hear +the analog parts powering up. After a reboot everything works again. + +So far I was not able to reproduce the problem when using lpass-cpu. + +The downstream kernel driver avoids this by resetting the RX +interpolation path after use. In mainline we do something similar +for the TX decimator (LPASS_CDC_CLK_TX_RESET_B1_CTL), but the +interpolator reset (LPASS_CDC_CLK_RX_RESET_CTL) got lost when the +msm8916-wcd driver was split into analog and digital. + +Fix this problem by adding the reset to +msm8916_wcd_digital_enable_interpolator(). + +Fixes: 150db8c5afa1 ("ASoC: codecs: Add msm8916-wcd digital codec") +Cc: Srinivas Kandagatla +Signed-off-by: Stephan Gerhold +Link: https://lore.kernel.org/r/20200105102753.83108-1-stephan@gerhold.net +Signed-off-by: Mark Brown +Signed-off-by: Greg Kroah-Hartman + +--- + sound/soc/codecs/msm8916-wcd-digital.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +--- a/sound/soc/codecs/msm8916-wcd-digital.c ++++ b/sound/soc/codecs/msm8916-wcd-digital.c +@@ -357,6 +357,12 @@ static int msm8916_wcd_digital_enable_in + snd_soc_component_write(component, rx_gain_reg[w->shift], + snd_soc_component_read32(component, rx_gain_reg[w->shift])); + break; ++ case SND_SOC_DAPM_POST_PMD: ++ snd_soc_component_update_bits(component, LPASS_CDC_CLK_RX_RESET_CTL, ++ 1 << w->shift, 1 << w->shift); ++ snd_soc_component_update_bits(component, LPASS_CDC_CLK_RX_RESET_CTL, ++ 1 << w->shift, 0x0); ++ break; + } + return 0; + } diff --git a/queue-4.19/block-fix-an-integer-overflow-in-logical-block-size.patch b/queue-4.19/block-fix-an-integer-overflow-in-logical-block-size.patch new file mode 100644 index 00000000000..3b0ae3eaddb --- /dev/null +++ b/queue-4.19/block-fix-an-integer-overflow-in-logical-block-size.patch @@ -0,0 +1,116 @@ +From ad6bf88a6c19a39fb3b0045d78ea880325dfcf15 Mon Sep 17 00:00:00 2001 +From: Mikulas Patocka +Date: Wed, 15 Jan 2020 08:35:25 -0500 +Subject: block: fix an integer overflow in logical block size + +From: Mikulas Patocka + +commit ad6bf88a6c19a39fb3b0045d78ea880325dfcf15 upstream. + +Logical block size has type unsigned short. That means that it can be at +most 32768. However, there are architectures that can run with 64k pages +(for example arm64) and on these architectures, it may be possible to +create block devices with 64k block size. + +For exmaple (run this on an architecture with 64k pages): + +Mount will fail with this error because it tries to read the superblock using 2-sector +access: + device-mapper: writecache: I/O is not aligned, sector 2, size 1024, block size 65536 + EXT4-fs (dm-0): unable to read superblock + +This patch changes the logical block size from unsigned short to unsigned +int to avoid the overflow. + +Cc: stable@vger.kernel.org +Reviewed-by: Martin K. Petersen +Reviewed-by: Ming Lei +Signed-off-by: Mikulas Patocka +Signed-off-by: Jens Axboe +Signed-off-by: Greg Kroah-Hartman + +--- + block/blk-settings.c | 2 +- + drivers/md/dm-snap-persistent.c | 2 +- + drivers/md/raid0.c | 2 +- + include/linux/blkdev.h | 8 ++++---- + 4 files changed, 7 insertions(+), 7 deletions(-) + +--- a/block/blk-settings.c ++++ b/block/blk-settings.c +@@ -379,7 +379,7 @@ EXPORT_SYMBOL(blk_queue_max_segment_size + * storage device can address. The default of 512 covers most + * hardware. + **/ +-void blk_queue_logical_block_size(struct request_queue *q, unsigned short size) ++void blk_queue_logical_block_size(struct request_queue *q, unsigned int size) + { + q->limits.logical_block_size = size; + +--- a/drivers/md/dm-snap-persistent.c ++++ b/drivers/md/dm-snap-persistent.c +@@ -17,7 +17,7 @@ + #include + + #define DM_MSG_PREFIX "persistent snapshot" +-#define DM_CHUNK_SIZE_DEFAULT_SECTORS 32 /* 16KB */ ++#define DM_CHUNK_SIZE_DEFAULT_SECTORS 32U /* 16KB */ + + #define DM_PREFETCH_CHUNKS 12 + +--- a/drivers/md/raid0.c ++++ b/drivers/md/raid0.c +@@ -94,7 +94,7 @@ static int create_strip_zones(struct mdd + char b[BDEVNAME_SIZE]; + char b2[BDEVNAME_SIZE]; + struct r0conf *conf = kzalloc(sizeof(*conf), GFP_KERNEL); +- unsigned short blksize = 512; ++ unsigned blksize = 512; + + *private_conf = ERR_PTR(-ENOMEM); + if (!conf) +--- a/include/linux/blkdev.h ++++ b/include/linux/blkdev.h +@@ -372,6 +372,7 @@ struct queue_limits { + unsigned int max_sectors; + unsigned int max_segment_size; + unsigned int physical_block_size; ++ unsigned int logical_block_size; + unsigned int alignment_offset; + unsigned int io_min; + unsigned int io_opt; +@@ -382,7 +383,6 @@ struct queue_limits { + unsigned int discard_granularity; + unsigned int discard_alignment; + +- unsigned short logical_block_size; + unsigned short max_segments; + unsigned short max_integrity_segments; + unsigned short max_discard_segments; +@@ -1212,7 +1212,7 @@ extern void blk_queue_max_write_same_sec + unsigned int max_write_same_sectors); + extern void blk_queue_max_write_zeroes_sectors(struct request_queue *q, + unsigned int max_write_same_sectors); +-extern void blk_queue_logical_block_size(struct request_queue *, unsigned short); ++extern void blk_queue_logical_block_size(struct request_queue *, unsigned int); + extern void blk_queue_physical_block_size(struct request_queue *, unsigned int); + extern void blk_queue_alignment_offset(struct request_queue *q, + unsigned int alignment); +@@ -1473,7 +1473,7 @@ static inline unsigned int queue_max_seg + return q->limits.max_segment_size; + } + +-static inline unsigned short queue_logical_block_size(struct request_queue *q) ++static inline unsigned queue_logical_block_size(struct request_queue *q) + { + int retval = 512; + +@@ -1483,7 +1483,7 @@ static inline unsigned short queue_logic + return retval; + } + +-static inline unsigned short bdev_logical_block_size(struct block_device *bdev) ++static inline unsigned int bdev_logical_block_size(struct block_device *bdev) + { + return queue_logical_block_size(bdev_get_queue(bdev)); + } diff --git a/queue-4.19/clk-don-t-try-to-enable-critical-clocks-if-prepare-failed.patch b/queue-4.19/clk-don-t-try-to-enable-critical-clocks-if-prepare-failed.patch new file mode 100644 index 00000000000..62178a9eb4c --- /dev/null +++ b/queue-4.19/clk-don-t-try-to-enable-critical-clocks-if-prepare-failed.patch @@ -0,0 +1,65 @@ +From 12ead77432f2ce32dea797742316d15c5800cb32 Mon Sep 17 00:00:00 2001 +From: Guenter Roeck +Date: Wed, 25 Dec 2019 08:34:29 -0800 +Subject: clk: Don't try to enable critical clocks if prepare failed + +From: Guenter Roeck + +commit 12ead77432f2ce32dea797742316d15c5800cb32 upstream. + +The following traceback is seen if a critical clock fails to prepare. + +bcm2835-clk 3f101000.cprman: plld: couldn't lock PLL +------------[ cut here ]------------ +Enabling unprepared plld_per +WARNING: CPU: 1 PID: 1 at drivers/clk/clk.c:1014 clk_core_enable+0xcc/0x2c0 +... +Call trace: + clk_core_enable+0xcc/0x2c0 + __clk_register+0x5c4/0x788 + devm_clk_hw_register+0x4c/0xb0 + bcm2835_register_pll_divider+0xc0/0x150 + bcm2835_clk_probe+0x134/0x1e8 + platform_drv_probe+0x50/0xa0 + really_probe+0xd4/0x308 + driver_probe_device+0x54/0xe8 + device_driver_attach+0x6c/0x78 + __driver_attach+0x54/0xd8 +... + +Check return values from clk_core_prepare() and clk_core_enable() and +bail out if any of those functions returns an error. + +Cc: Jerome Brunet +Fixes: 99652a469df1 ("clk: migrate the count of orphaned clocks at init") +Signed-off-by: Guenter Roeck +Link: https://lkml.kernel.org/r/20191225163429.29694-1-linux@roeck-us.net +Signed-off-by: Stephen Boyd +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/clk/clk.c | 10 ++++++++-- + 1 file changed, 8 insertions(+), 2 deletions(-) + +--- a/drivers/clk/clk.c ++++ b/drivers/clk/clk.c +@@ -3066,11 +3066,17 @@ static int __clk_core_init(struct clk_co + if (core->flags & CLK_IS_CRITICAL) { + unsigned long flags; + +- clk_core_prepare(core); ++ ret = clk_core_prepare(core); ++ if (ret) ++ goto out; + + flags = clk_enable_lock(); +- clk_core_enable(core); ++ ret = clk_core_enable(core); + clk_enable_unlock(flags); ++ if (ret) { ++ clk_core_unprepare(core); ++ goto out; ++ } + } + + /* diff --git a/queue-4.19/clk-qcom-gcc-sdm845-add-missing-flag-to-votable-gdscs.patch b/queue-4.19/clk-qcom-gcc-sdm845-add-missing-flag-to-votable-gdscs.patch new file mode 100644 index 00000000000..53d799b5774 --- /dev/null +++ b/queue-4.19/clk-qcom-gcc-sdm845-add-missing-flag-to-votable-gdscs.patch @@ -0,0 +1,96 @@ +From 5e82548e26ef62e257dc2ff37c11acb5eb72728e Mon Sep 17 00:00:00 2001 +From: Georgi Djakov +Date: Tue, 26 Nov 2019 17:34:37 +0200 +Subject: clk: qcom: gcc-sdm845: Add missing flag to votable GDSCs + +From: Georgi Djakov + +commit 5e82548e26ef62e257dc2ff37c11acb5eb72728e upstream. + +On sdm845 devices, during boot we see the following warnings (unless we +have added 'pd_ignore_unused' to the kernel command line): + hlos1_vote_mmnoc_mmu_tbu_sf_gdsc status stuck at 'on' + hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc status stuck at 'on' + hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc status stuck at 'on' + hlos1_vote_aggre_noc_mmu_tbu2_gdsc status stuck at 'on' + hlos1_vote_aggre_noc_mmu_tbu1_gdsc status stuck at 'on' + hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc status stuck at 'on' + hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc status stuck at 'on' + +As the name of these GDSCs suggests, they are "votable" and in downstream +DT, they all have the property "qcom,no-status-check-on-disable", which +means that we should not poll the status bit when we disable them. + +Luckily the VOTABLE flag already exists and it does exactly what we need, +so let's make use of it to make the warnings disappear. + +Fixes: 06391eddb60a ("clk: qcom: Add Global Clock controller (GCC) driver for SDM845") +Reported-by: Rob Clark +Signed-off-by: Georgi Djakov +Link: https://lkml.kernel.org/r/20191126153437.11808-1-georgi.djakov@linaro.org +Tested-by: Rob Clark +Signed-off-by: Stephen Boyd +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/clk/qcom/gcc-sdm845.c | 7 +++++++ + 1 file changed, 7 insertions(+) + +--- a/drivers/clk/qcom/gcc-sdm845.c ++++ b/drivers/clk/qcom/gcc-sdm845.c +@@ -3150,6 +3150,7 @@ static struct gdsc hlos1_vote_aggre_noc_ + .name = "hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, ++ .flags = VOTABLE, + }; + + static struct gdsc hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc = { +@@ -3158,6 +3159,7 @@ static struct gdsc hlos1_vote_aggre_noc_ + .name = "hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, ++ .flags = VOTABLE, + }; + + static struct gdsc hlos1_vote_aggre_noc_mmu_tbu1_gdsc = { +@@ -3166,6 +3168,7 @@ static struct gdsc hlos1_vote_aggre_noc_ + .name = "hlos1_vote_aggre_noc_mmu_tbu1_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, ++ .flags = VOTABLE, + }; + + static struct gdsc hlos1_vote_aggre_noc_mmu_tbu2_gdsc = { +@@ -3174,6 +3177,7 @@ static struct gdsc hlos1_vote_aggre_noc_ + .name = "hlos1_vote_aggre_noc_mmu_tbu2_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, ++ .flags = VOTABLE, + }; + + static struct gdsc hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc = { +@@ -3182,6 +3186,7 @@ static struct gdsc hlos1_vote_mmnoc_mmu_ + .name = "hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, ++ .flags = VOTABLE, + }; + + static struct gdsc hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc = { +@@ -3190,6 +3195,7 @@ static struct gdsc hlos1_vote_mmnoc_mmu_ + .name = "hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, ++ .flags = VOTABLE, + }; + + static struct gdsc hlos1_vote_mmnoc_mmu_tbu_sf_gdsc = { +@@ -3198,6 +3204,7 @@ static struct gdsc hlos1_vote_mmnoc_mmu_ + .name = "hlos1_vote_mmnoc_mmu_tbu_sf_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, ++ .flags = VOTABLE, + }; + + static struct clk_regmap *gcc_sdm845_clocks[] = { diff --git a/queue-4.19/dt-bindings-reset-meson8b-fix-duplicate-reset-ids.patch b/queue-4.19/dt-bindings-reset-meson8b-fix-duplicate-reset-ids.patch new file mode 100644 index 00000000000..c07edf414b2 --- /dev/null +++ b/queue-4.19/dt-bindings-reset-meson8b-fix-duplicate-reset-ids.patch @@ -0,0 +1,42 @@ +From 4881873f4cc1460f63d85fa81363d56be328ccdc Mon Sep 17 00:00:00 2001 +From: Martin Blumenstingl +Date: Sat, 30 Nov 2019 19:53:37 +0100 +Subject: dt-bindings: reset: meson8b: fix duplicate reset IDs + +From: Martin Blumenstingl + +commit 4881873f4cc1460f63d85fa81363d56be328ccdc upstream. + +According to the public S805 datasheet the RESET2 register uses the +following bits for the PIC_DC, PSC and NAND reset lines: +- PIC_DC is at bit 3 (meaning: RESET_VD_RMEM + 3) +- PSC is at bit 4 (meaning: RESET_VD_RMEM + 4) +- NAND is at bit 5 (meaning: RESET_VD_RMEM + 4) + +Update the reset IDs of these three reset lines so they don't conflict +with PIC_DC and map to the actual hardware reset lines. + +Fixes: 79795e20a184eb ("dt-bindings: reset: Add bindings for the Meson SoC Reset Controller") +Signed-off-by: Martin Blumenstingl +Signed-off-by: Kevin Hilman +Signed-off-by: Greg Kroah-Hartman + +--- + include/dt-bindings/reset/amlogic,meson8b-reset.h | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +--- a/include/dt-bindings/reset/amlogic,meson8b-reset.h ++++ b/include/dt-bindings/reset/amlogic,meson8b-reset.h +@@ -95,9 +95,9 @@ + #define RESET_VD_RMEM 64 + #define RESET_AUDIN 65 + #define RESET_DBLK 66 +-#define RESET_PIC_DC 66 +-#define RESET_PSC 66 +-#define RESET_NAND 66 ++#define RESET_PIC_DC 67 ++#define RESET_PSC 68 ++#define RESET_NAND 69 + #define RESET_GE2D 70 + #define RESET_PARSER_REG 71 + #define RESET_PARSER_FETCH 72 diff --git a/queue-4.19/fix-built-in-early-load-intel-microcode-alignment.patch b/queue-4.19/fix-built-in-early-load-intel-microcode-alignment.patch new file mode 100644 index 00000000000..94cce0bca3d --- /dev/null +++ b/queue-4.19/fix-built-in-early-load-intel-microcode-alignment.patch @@ -0,0 +1,54 @@ +From f5ae2ea6347a308cfe91f53b53682ce635497d0d Mon Sep 17 00:00:00 2001 +From: Jari Ruusu +Date: Sun, 12 Jan 2020 15:00:53 +0200 +Subject: Fix built-in early-load Intel microcode alignment + +From: Jari Ruusu + +commit f5ae2ea6347a308cfe91f53b53682ce635497d0d upstream. + +Intel Software Developer's Manual, volume 3, chapter 9.11.6 says: + + "Note that the microcode update must be aligned on a 16-byte boundary + and the size of the microcode update must be 1-KByte granular" + +When early-load Intel microcode is loaded from initramfs, userspace tool +'iucode_tool' has already 16-byte aligned those microcode bits in that +initramfs image. Image that was created something like this: + + iucode_tool --write-earlyfw=FOO.cpio microcode-files... + +However, when early-load Intel microcode is loaded from built-in +firmware BLOB using CONFIG_EXTRA_FIRMWARE= kernel config option, that +16-byte alignment is not guaranteed. + +Fix this by forcing all built-in firmware BLOBs to 16-byte alignment. + +[ If we end up having other firmware with much bigger alignment + requirements, we might need to introduce some method for the firmware + to specify it, this is the minimal "just increase the alignment a bit + to account for this one special case" patch - Linus ] + +Signed-off-by: Jari Ruusu +Cc: Borislav Petkov +Cc: Fenghua Yu +Cc: Luis Chamberlain +Cc: stable@kernel.org +Signed-off-by: Linus Torvalds +Signed-off-by: Greg Kroah-Hartman + +--- + firmware/Makefile | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/firmware/Makefile ++++ b/firmware/Makefile +@@ -19,7 +19,7 @@ quiet_cmd_fwbin = MK_FW $@ + PROGBITS=$(if $(CONFIG_ARM),%,@)progbits; \ + echo "/* Generated by firmware/Makefile */" > $@;\ + echo " .section .rodata" >>$@;\ +- echo " .p2align $${ASM_ALIGN}" >>$@;\ ++ echo " .p2align 4" >>$@;\ + echo "_fw_$${FWSTR}_bin:" >>$@;\ + echo " .incbin \"$(2)\"" >>$@;\ + echo "_fw_end:" >>$@;\ -- 2.47.3