From ff68b4b5b158883ba8954db2876cd026c47b8443 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Sat, 26 Jun 2021 23:59:03 -0400 Subject: [PATCH] sim: frv: fix ambiguous else compiler warnings Add explicit braces to if bodies when the body is another if/else to fix a bunch of compiler warnings. --- sim/frv/ChangeLog | 6 ++++++ sim/frv/frv.c | 10 ++++++---- sim/frv/profile-fr500.c | 32 +++++++++++++++++++------------- sim/frv/profile-fr550.c | 20 ++++++++++++-------- 4 files changed, 43 insertions(+), 25 deletions(-) diff --git a/sim/frv/ChangeLog b/sim/frv/ChangeLog index d9029d06b6d..945d7606120 100644 --- a/sim/frv/ChangeLog +++ b/sim/frv/ChangeLog @@ -1,3 +1,9 @@ +2021-06-27 Mike Frysinger + + * frv.c (frvbf_shift_left_arith_saturate): Add braces to if statement. + * profile-fr500.c (adjust_float_register_busy): Likewise. + * profile-fr550.c (adjust_float_register_busy): Likewise. + 2021-06-22 Mike Frysinger * configure: Regenerate. diff --git a/sim/frv/frv.c b/sim/frv/frv.c index aff9dc1a49e..22c5fb7d8bd 100644 --- a/sim/frv/frv.c +++ b/sim/frv/frv.c @@ -1182,10 +1182,12 @@ frvbf_shift_left_arith_saturate (SIM_CPU *current_cpu, SI arg1, SI arg2) /* Signed shift by 31 or greater saturates by definition. */ if (arg2 >= 31) - if (arg1 > 0) - return (SI) 0x7fffffff; - else - return (SI) 0x80000000; + { + if (arg1 > 0) + return (SI) 0x7fffffff; + else + return (SI) 0x80000000; + } /* OK, arg2 is between 1 and 31. */ neg_arg1 = (arg1 < 0); diff --git a/sim/frv/profile-fr500.c b/sim/frv/profile-fr500.c index f89e451bad8..e9cc49dc38d 100644 --- a/sim/frv/profile-fr500.c +++ b/sim/frv/profile-fr500.c @@ -158,22 +158,28 @@ adjust_float_register_busy (SIM_CPU *cpu, INT in_FRi, INT in_FRj, INT out_FRk, then their latency will be less than previously recorded. See Table 13-13 in the LSI. */ if (in_FRi >= 0) - if (use_is_fpop (cpu, in_FRi)) - decrease_FR_busy (cpu, in_FRi, cycles); - else - enforce_full_fr_latency (cpu, in_FRi); - + { + if (use_is_fpop (cpu, in_FRi)) + decrease_FR_busy (cpu, in_FRi, cycles); + else + enforce_full_fr_latency (cpu, in_FRi); + } + if (in_FRj >= 0 && in_FRj != in_FRi) - if (use_is_fpop (cpu, in_FRj)) - decrease_FR_busy (cpu, in_FRj, cycles); - else - enforce_full_fr_latency (cpu, in_FRj); + { + if (use_is_fpop (cpu, in_FRj)) + decrease_FR_busy (cpu, in_FRj, cycles); + else + enforce_full_fr_latency (cpu, in_FRj); + } if (out_FRk >= 0 && out_FRk != in_FRi && out_FRk != in_FRj) - if (use_is_fpop (cpu, out_FRk)) - decrease_FR_busy (cpu, out_FRk, cycles); - else - enforce_full_fr_latency (cpu, out_FRk); + { + if (use_is_fpop (cpu, out_FRk)) + decrease_FR_busy (cpu, out_FRk, cycles); + else + enforce_full_fr_latency (cpu, out_FRk); + } } /* Latency of floating point registers may be less than recorded when followed diff --git a/sim/frv/profile-fr550.c b/sim/frv/profile-fr550.c index 2bf1729135a..9b17931abc2 100644 --- a/sim/frv/profile-fr550.c +++ b/sim/frv/profile-fr550.c @@ -225,10 +225,12 @@ adjust_float_register_busy (SIM_CPU *cpu, for (i = 0; i < iwidth; ++i) { if (! REG_OVERLAP (in_FRi + i, 1, out_FRk, kwidth)) - if (use_is_fr_load (cpu, in_FRi + i)) - decrease_FR_busy (cpu, in_FRi + i, 1); - else - enforce_full_fr_latency (cpu, in_FRi + i); + { + if (use_is_fr_load (cpu, in_FRi + i)) + decrease_FR_busy (cpu, in_FRi + i, 1); + else + enforce_full_fr_latency (cpu, in_FRi + i); + } } } @@ -238,10 +240,12 @@ adjust_float_register_busy (SIM_CPU *cpu, { if (! REG_OVERLAP (in_FRj + i, 1, in_FRi, iwidth) && ! REG_OVERLAP (in_FRj + i, 1, out_FRk, kwidth)) - if (use_is_fr_load (cpu, in_FRj + i)) - decrease_FR_busy (cpu, in_FRj + i, 1); - else - enforce_full_fr_latency (cpu, in_FRj + i); + { + if (use_is_fr_load (cpu, in_FRj + i)) + decrease_FR_busy (cpu, in_FRj + i, 1); + else + enforce_full_fr_latency (cpu, in_FRj + i); + } } } -- 2.39.5