From ff7dcac2e8a88ca503c2852340d70bcba77f724c Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Wed, 15 Aug 2018 14:43:46 +0200 Subject: [PATCH] 4.14-stable patches added patches: x86-cpu-amd-have-smp_num_siblings-and-cpu_llc_id-always-be-present.patch --- queue-4.14/series | 1 + ...ngs-and-cpu_llc_id-always-be-present.patch | 115 ++++++++++++++++++ 2 files changed, 116 insertions(+) create mode 100644 queue-4.14/x86-cpu-amd-have-smp_num_siblings-and-cpu_llc_id-always-be-present.patch diff --git a/queue-4.14/series b/queue-4.14/series index 0c23cb84945..69ce4b6b1ac 100644 --- a/queue-4.14/series +++ b/queue-4.14/series @@ -106,3 +106,4 @@ x86-smp-fix-non-smp-broken-build-due-to-redefinition-of-apic_id_is_primary_threa cpu-hotplug-non-smp-machines-do-not-make-use-of-booted_once.patch x86-init-fix-build-with-config_swap-n.patch x86-speculation-l1tf-unbreak-__have_arch_pfn_modify_allowed-architectures.patch +x86-cpu-amd-have-smp_num_siblings-and-cpu_llc_id-always-be-present.patch diff --git a/queue-4.14/x86-cpu-amd-have-smp_num_siblings-and-cpu_llc_id-always-be-present.patch b/queue-4.14/x86-cpu-amd-have-smp_num_siblings-and-cpu_llc_id-always-be-present.patch new file mode 100644 index 00000000000..35d3941563f --- /dev/null +++ b/queue-4.14/x86-cpu-amd-have-smp_num_siblings-and-cpu_llc_id-always-be-present.patch @@ -0,0 +1,115 @@ +From f8b64d08dde2714c62751d18ba77f4aeceb161d3 Mon Sep 17 00:00:00 2001 +From: Borislav Petkov +Date: Fri, 27 Apr 2018 16:34:34 -0500 +Subject: x86/CPU/AMD: Have smp_num_siblings and cpu_llc_id always be present + +From: Borislav Petkov + +commit f8b64d08dde2714c62751d18ba77f4aeceb161d3 upstream. + +Move smp_num_siblings and cpu_llc_id to cpu/common.c so that they're +always present as symbols and not only in the CONFIG_SMP case. Then, +other code using them doesn't need ugly ifdeffery anymore. Get rid of +some ifdeffery. + +Signed-off-by: Borislav Petkov +Signed-off-by: Suravee Suthikulpanit +Signed-off-by: Borislav Petkov +Signed-off-by: Thomas Gleixner +Link: http://lkml.kernel.org/r/1524864877-111962-2-git-send-email-suravee.suthikulpanit@amd.com +Signed-off-by: Guenter Roeck +Signed-off-by: Greg Kroah-Hartman + +--- + arch/x86/include/asm/smp.h | 1 - + arch/x86/kernel/cpu/amd.c | 10 +--------- + arch/x86/kernel/cpu/common.c | 7 +++++++ + arch/x86/kernel/smpboot.c | 7 ------- + 4 files changed, 8 insertions(+), 17 deletions(-) + +--- a/arch/x86/include/asm/smp.h ++++ b/arch/x86/include/asm/smp.h +@@ -170,7 +170,6 @@ static inline int wbinvd_on_all_cpus(voi + wbinvd(); + return 0; + } +-#define smp_num_siblings 1 + #endif /* CONFIG_SMP */ + + extern unsigned disabled_cpus; +--- a/arch/x86/kernel/cpu/amd.c ++++ b/arch/x86/kernel/cpu/amd.c +@@ -298,7 +298,6 @@ static int nearby_node(int apicid) + } + #endif + +-#ifdef CONFIG_SMP + /* + * Fix up cpu_core_id for pre-F17h systems to be in the + * [0 .. cores_per_node - 1] range. Not really needed but +@@ -382,7 +381,6 @@ static void amd_get_topology(struct cpui + legacy_fixup_core_id(c); + } + } +-#endif + + /* + * On a AMD dual core setup the lower bits of the APIC id distinguish the cores. +@@ -390,7 +388,6 @@ static void amd_get_topology(struct cpui + */ + static void amd_detect_cmp(struct cpuinfo_x86 *c) + { +-#ifdef CONFIG_SMP + unsigned bits; + int cpu = smp_processor_id(); + +@@ -402,16 +399,11 @@ static void amd_detect_cmp(struct cpuinf + /* use socket ID also for last level cache */ + per_cpu(cpu_llc_id, cpu) = c->phys_proc_id; + amd_get_topology(c); +-#endif + } + + u16 amd_get_nb_id(int cpu) + { +- u16 id = 0; +-#ifdef CONFIG_SMP +- id = per_cpu(cpu_llc_id, cpu); +-#endif +- return id; ++ return per_cpu(cpu_llc_id, cpu); + } + EXPORT_SYMBOL_GPL(amd_get_nb_id); + +--- a/arch/x86/kernel/cpu/common.c ++++ b/arch/x86/kernel/cpu/common.c +@@ -66,6 +66,13 @@ cpumask_var_t cpu_callin_mask; + /* representing cpus for which sibling maps can be computed */ + cpumask_var_t cpu_sibling_setup_mask; + ++/* Number of siblings per CPU package */ ++int smp_num_siblings = 1; ++EXPORT_SYMBOL(smp_num_siblings); ++ ++/* Last level cache ID of each logical CPU */ ++DEFINE_PER_CPU_READ_MOSTLY(u16, cpu_llc_id) = BAD_APICID; ++ + /* correctly size the local cpu masks */ + void __init setup_cpu_local_masks(void) + { +--- a/arch/x86/kernel/smpboot.c ++++ b/arch/x86/kernel/smpboot.c +@@ -80,13 +80,6 @@ + #include + #include + +-/* Number of siblings per CPU package */ +-int smp_num_siblings = 1; +-EXPORT_SYMBOL(smp_num_siblings); +- +-/* Last level cache ID of each logical CPU */ +-DEFINE_PER_CPU_READ_MOSTLY(u16, cpu_llc_id) = BAD_APICID; +- + /* representing HT siblings of each logical CPU */ + DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_sibling_map); + EXPORT_PER_CPU_SYMBOL(cpu_sibling_map); -- 2.47.3