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2025-05-22	Daniel P. Berrangé	scripts/checkpatch.pl: mandate SPDX tag for Rust src...	commit \| commitdiff \| tree
2025-05-22	Juraj Marcin	util/qemu-sockets: Introduce inet socket options contro...	commit \| commitdiff \| tree
2025-05-22	Juraj Marcin	util/qemu-sockets: Refactor inet_parse() to use QemuOpts	commit \| commitdiff \| tree
2025-05-22	Juraj Marcin	util/qemu-sockets: Add support for keep-alive flag...	commit \| commitdiff \| tree
2025-05-22	Juraj Marcin	util/qemu-sockets: Refactor success and failure paths...	commit \| commitdiff \| tree
2025-05-22	Juraj Marcin	util/qemu-sockets: Refactor setting client sockopts...	commit \| commitdiff \| tree
2025-05-22	Juraj Marcin	io: Fix partial struct copy in qio_dns_resolver_lookup_...	commit \| commitdiff \| tree
2025-05-22	Daniel P. Berrangé	scripts/checkpatch: reject license boilerplate on new...	commit \| commitdiff \| tree
2025-05-22	Daniel P. Berrangé	scripts/checkpatch: reimplement mandate for SPDX-Licens...	commit \| commitdiff \| tree
2025-05-22	Daniel P. Berrangé	scripts/checkpatch: use new hook for MAINTAINERS update...	commit \| commitdiff \| tree
2025-05-22	Daniel P. Berrangé	scripts/checkpatch: expand pattern for matching makefiles	commit \| commitdiff \| tree
2025-05-22	Daniel P. Berrangé	scripts/checkpatch: use new hook for file permissions...	commit \| commitdiff \| tree
2025-05-22	Daniel P. Berrangé	scripts/checkpatch: use new hook for ACPI test data...	commit \| commitdiff \| tree
2025-05-22	Daniel P. Berrangé	scripts/checkpatch: introduce tracking of file start/end	commit \| commitdiff \| tree
2025-05-22	Daniel P. Berrangé	scripts/checkpatch.pl: fix various indentation mistakes	commit \| commitdiff \| tree
2025-05-22	Daniel P. Berrangé	Revert "scripts: mandate that new files have SPDX-Licen...	commit \| commitdiff \| tree
2025-05-22	Daniel P. Berrangé	crypto: fully drop built-in cipher provider	commit \| commitdiff \| tree
2025-05-21	Daniel P. Berrangé	tests: fix skipping cipher tests when AES is not available	commit \| commitdiff \| tree
2025-05-21	Daniel P. Berrangé	tests: skip legacy qcow2 encryption test if AES is...	commit \| commitdiff \| tree
2025-05-21	Daniel P. Berrangé	tests: skip encrypted secret tests if AES is not available	commit \| commitdiff \| tree
2025-05-21	Daniel P. Berrangé	ui/vnc: fix tight palette pixel encoding for 8/16-bpp...	commit \| commitdiff \| tree
2025-05-21	Daniel P. Berrangé	ui/vnc: take account of client byte order in pixman...	commit \| commitdiff \| tree
2025-05-21	Daniel P. Berrangé	ui/vnc.c: replace big endian flag with byte order value	commit \| commitdiff \| tree
2025-05-20	Stefan Hajnoczi	Merge tag 'for-upstream' of https://gitlab.com/bonzini...	commit \| commitdiff \| tree
2025-05-20	Paolo Bonzini	qom: reverse order of instance_post_init calls	commit \| commitdiff \| tree
2025-05-20	Paolo Bonzini	target/riscv: remove .instance_post_init	commit \| commitdiff \| tree
2025-05-20	Paolo Bonzini	target/riscv: convert Xiangshan Nanhu to RISCVCPUDef	commit \| commitdiff \| tree
2025-05-20	Paolo Bonzini	target/riscv: convert Ventana V1 to RISCVCPUDef	commit \| commitdiff \| tree
2025-05-20	Paolo Bonzini	target/riscv: convert TT Ascalon to RISCVCPUDef	commit \| commitdiff \| tree
2025-05-20	Paolo Bonzini	target/riscv: convert THead C906 to RISCVCPUDef	commit \| commitdiff \| tree
2025-05-20	Paolo Bonzini	target/riscv: generalize custom CSR functionality	commit \| commitdiff \| tree
2025-05-20	Paolo Bonzini	target/riscv: th: make CSR insertion test a bit more...	commit \| commitdiff \| tree
2025-05-20	Paolo Bonzini	target/riscv: convert SiFive U models to RISCVCPUDef	commit \| commitdiff \| tree
2025-05-20	Paolo Bonzini	target/riscv: convert ibex CPU models to RISCVCPUDef	commit \| commitdiff \| tree
2025-05-20	Paolo Bonzini	target/riscv: convert SiFive E CPU models to RISCVCPUDef	commit \| commitdiff \| tree
2025-05-20	Paolo Bonzini	target/riscv: convert dynamic CPU models to RISCVCPUDef	commit \| commitdiff \| tree
2025-05-20	Paolo Bonzini	target/riscv: convert bare CPU models to RISCVCPUDef	commit \| commitdiff \| tree
2025-05-20	Paolo Bonzini	target/riscv: convert profile CPU models to RISCVCPUDef	commit \| commitdiff \| tree
2025-05-20	Paolo Bonzini	target/riscv: convert abstract CPU classes to RISCVCPUDef	commit \| commitdiff \| tree
2025-05-20	Paolo Bonzini	target/riscv: add more RISCVCPUDef fields	commit \| commitdiff \| tree
2025-05-20	Paolo Bonzini	target/riscv: include default value in cpu_cfg_fields...	commit \| commitdiff \| tree
2025-05-20	Paolo Bonzini	target/riscv: move RISCVCPUConfig fields to a header...	commit \| commitdiff \| tree
2025-05-20	Paolo Bonzini	target/riscv: merge riscv_cpu_class_init with the class...	commit \| commitdiff \| tree
2025-05-20	Paolo Bonzini	target/riscv: store RISCVCPUDef struct directly in...	commit \| commitdiff \| tree
2025-05-20	Paolo Bonzini	target/riscv: introduce RISCVCPUDef	commit \| commitdiff \| tree
2025-05-20	Paolo Bonzini	target/riscv: move satp_mode.{map,init} out of CPUConfig	commit \| commitdiff \| tree
2025-05-20	Paolo Bonzini	target/riscv: remove supported from RISCVSATPMap	commit \| commitdiff \| tree
2025-05-20	Paolo Bonzini	target/riscv: update max_satp_mode based on QOM properties	commit \| commitdiff \| tree
2025-05-20	Paolo Bonzini	target/riscv: cpu: store max SATP mode as a single...	commit \| commitdiff \| tree
2025-05-20	Paolo Bonzini	target/riscv: assert argument to set_satp_mode_max_supp...	commit \| commitdiff \| tree
2025-05-20	Paolo Bonzini	hw/riscv: acpi: only create RHCT MMU entry for supporte...	commit \| commitdiff \| tree
2025-05-20	Zhao Liu	qapi/misc-target: Fix the doc to distinguish query...	commit \| commitdiff \| tree
2025-05-20	Zhao Liu	qapi/misc-target: Fix the doc related SGXEPCSection	commit \| commitdiff \| tree
2025-05-20	Zhao Liu	qapi/misc-target: Rename SGXInfo to SgxInfo	commit \| commitdiff \| tree
2025-05-20	Zhao Liu	qapi/misc-target: Rename SGXEPCSection to SgxEpcSection	commit \| commitdiff \| tree
2025-05-20	Rakesh Jeyasingh	hw/pci-host: Remove unused pci_host_data_be_ops	commit \| commitdiff \| tree
2025-05-20	Rakesh Jeyasingh	hw/pci-host/gt64120: Fix endianness handling	commit \| commitdiff \| tree
2025-05-20	Xiaoyao Li	i386/hvf: Make CPUID_HT supported	commit \| commitdiff \| tree
2025-05-20	Xiaoyao Li	i386/tcg: Make CPUID_HT and CPUID_EXT3_CMP_LEG supported	commit \| commitdiff \| tree
2025-05-19	Stefan Hajnoczi	Merge tag 'pull-riscv-to-apply-20250519' of https:...	commit \| commitdiff \| tree
2025-05-19	Daniel Henrique...	hw/riscv/virt.c: remove 'long' casts in fmt strings	commit \| commitdiff \| tree
2025-05-19	Daniel Henrique...	hw/riscv/virt.c: use s->memmap in finalize_fdt() functions	commit \| commitdiff \| tree
2025-05-19	Daniel Henrique...	hw/riscv/virt.c: use s->memmap in create_fdt_virtio()	commit \| commitdiff \| tree
2025-05-19	Daniel Henrique...	hw/riscv/virt.c: use s->memmap in create_fdt_sockets...	commit \| commitdiff \| tree
2025-05-19	Daniel Henrique...	hw/riscv/virt.c: use s->memmap in create_fdt() path	commit \| commitdiff \| tree
2025-05-19	Daniel Henrique...	hw/riscv/virt.c: add 'base' arg in create_fw_cfg()	commit \| commitdiff \| tree
2025-05-19	Daniel Henrique...	hw/riscv/virt.c: use s->memmap in virt_machine_done()	commit \| commitdiff \| tree
2025-05-19	Daniel Henrique...	hw/riscv/virt.c: remove trivial virt_memmap references	commit \| commitdiff \| tree
2025-05-19	Daniel Henrique...	hw/riscv/virt.c: enforce s->memmap use in machine_init()	commit \| commitdiff \| tree
2025-05-19	Daniel Henrique...	target/riscv/kvm: add scounteren CSR	commit \| commitdiff \| tree
2025-05-19	Daniel Henrique...	target/riscv/kvm: read/write KVM regs via env size	commit \| commitdiff \| tree
2025-05-19	Daniel Henrique...	target/riscv/kvm: add senvcfg CSR	commit \| commitdiff \| tree
2025-05-19	Daniel Henrique...	target/riscv/kvm: do not read unavailable CSRs	commit \| commitdiff \| tree
2025-05-19	Daniel Henrique...	target/riscv/kvm: add kvm_csr_cfgs[]	commit \| commitdiff \| tree
2025-05-19	Daniel Henrique...	target/riscv/kvm: turn kvm_riscv_reg_id_ulong() into...	commit \| commitdiff \| tree
2025-05-19	Daniel Henrique...	target/riscv/kvm: turn u32/u64 reg functions into macros	commit \| commitdiff \| tree
2025-05-19	Daniel Henrique...	target/riscv/kvm: fix leak in kvm_riscv_init_multiext_cfg()	commit \| commitdiff \| tree
2025-05-19	Daniel Henrique...	target/riscv/kvm: minor fixes/tweaks	commit \| commitdiff \| tree
2025-05-19	Richard Henderson	target/riscv: Fix write_misa vs aligned next_pc	commit \| commitdiff \| tree
2025-05-19	Richard Henderson	target/riscv: Move insn_len to internals.h	commit \| commitdiff \| tree
2025-05-19	Richard Henderson	target/riscv: Pass ra to riscv_csrrw_i128	commit \| commitdiff \| tree
2025-05-19	Richard Henderson	target/riscv: Pass ra to riscv_csrrw	commit \| commitdiff \| tree
2025-05-19	Richard Henderson	target/riscv: Pass ra to riscv_csrrw_do128	commit \| commitdiff \| tree
2025-05-19	Richard Henderson	target/riscv: Pass ra to riscv_csrrw_do64	commit \| commitdiff \| tree
2025-05-19	Richard Henderson	target/riscv: Pass ra to riscv_csr_write_fn	commit \| commitdiff \| tree
2025-05-19	Alistair Francis	MAINTAINERS: Add common-user/host/riscv to RISC-V section	commit \| commitdiff \| tree
2025-05-19	Anton Blanchard	target/riscv: Fix vslidedown with rvv_ta_all_1s	commit \| commitdiff \| tree
2025-05-19	Max Chou	target/riscv: Fix the rvv reserved encoding of unmasked...	commit \| commitdiff \| tree
2025-05-19	Max Chou	target/riscv: rvv: Apply vext_check_input_eew to vector...	commit \| commitdiff \| tree
2025-05-19	Max Chou	target/riscv: rvv: Apply vext_check_input_eew to vector...	commit \| commitdiff \| tree
2025-05-19	Max Chou	target/riscv: rvv: Apply vext_check_input_eew to vector...	commit \| commitdiff \| tree
2025-05-19	Max Chou	target/riscv: rvv: Apply vext_check_input_eew to vector...	commit \| commitdiff \| tree
2025-05-19	Max Chou	target/riscv: rvv: Apply vext_check_input_eew to OPIVV...	commit \| commitdiff \| tree
2025-05-19	Max Chou	target/riscv: rvv: Apply vext_check_input_eew to OPIVI...	commit \| commitdiff \| tree
2025-05-19	Max Chou	target/riscv: rvv: Apply vext_check_input_eew to vrgath...	commit \| commitdiff \| tree
2025-05-19	Anton Blanchard	target/riscv: rvv: Add CHECK arg to GEN_OPFVF_WIDEN_TRANS	commit \| commitdiff \| tree
2025-05-19	Anton Blanchard	target/riscv: rvv: Source vector registers cannot overl...	commit \| commitdiff \| tree
2025-05-19	Icenowy Zheng	common-user/host/riscv: use tail pseudoinstruction...	commit \| commitdiff \| tree
2025-05-19	Ziqiao Kong	target/riscv: fix endless translation loop on big endia...	commit \| commitdiff \| tree
2025-05-19	Paolo Bonzini	hw/riscv: Fix type conflict of GLib function pointers	commit \| commitdiff \| tree
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