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Imported linux-2.6.27.39 suse/xen patches.
[ipfire-2.x.git] / src / patches / suse-2.6.27.39 / patches.drivers / 0023-Staging-Lindent-sxg.c.patch
CommitLineData
2cb7cef9
BS		 1From 5c7514e0610249a4e7710eefd801c2b0442eb8ea Mon Sep 17 00:00:00 2001
2From: J.R. Mauro <jrm8005@gmail.com>
3Date: Sun, 5 Oct 2008 20:38:52 -0400
4Subject: [PATCH 23/23] Staging: Lindent sxg.c
5Patch-mainline: 2.6.28
6
7Lindent drivers/staging/sxg/sxg.c
8
9Signed-off by: J.R. Mauro <jrm8005@gmail.com>
10Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
11---
12 drivers/staging/sxg/sxg.c | 146 +++++++++++++++++++++++++--------------------
13 1 files changed, 81 insertions(+), 65 deletions(-)
14
15diff --git a/drivers/staging/sxg/sxg.c b/drivers/staging/sxg/sxg.c
16index 0117d51..6ccbee8 100644
17--- a/drivers/staging/sxg/sxg.c
18+++ b/drivers/staging/sxg/sxg.c
19@@ -80,9 +80,15 @@
20 #include "sxgphycode.h"
21 #include "saharadbgdownload.h"
22
23-static int sxg_allocate_buffer_memory(p_adapter_t adapter, u32 Size, SXG_BUFFER_TYPE BufferType);
24-static void sxg_allocate_rcvblock_complete(p_adapter_t adapter, void * RcvBlock, dma_addr_t PhysicalAddress, u32 Length);
25-static void sxg_allocate_sgl_buffer_complete(p_adapter_t adapter, PSXG_SCATTER_GATHER SxgSgl, dma_addr_t PhysicalAddress, u32 Length);
26+static int sxg_allocate_buffer_memory(p_adapter_t adapter, u32 Size,
27+ SXG_BUFFER_TYPE BufferType);
28+static void sxg_allocate_rcvblock_complete(p_adapter_t adapter, void *RcvBlock,
29+ dma_addr_t PhysicalAddress,
30+ u32 Length);
31+static void sxg_allocate_sgl_buffer_complete(p_adapter_t adapter,
32+ PSXG_SCATTER_GATHER SxgSgl,
33+ dma_addr_t PhysicalAddress,
34+ u32 Length);
35
36 static void sxg_mcast_init_crc32(void);
37
38@@ -100,13 +106,13 @@ static void sxg_complete_slow_send(p_adapter_t adapter);
39 static struct sk_buff *sxg_slow_receive(p_adapter_t adapter, PSXG_EVENT Event);
40 static void sxg_process_rcv_error(p_adapter_t adapter, u32 ErrorStatus);
41 static bool sxg_mac_filter(p_adapter_t adapter,
42- p_ether_header EtherHdr, ushort length);
43+ p_ether_header EtherHdr, ushort length);
44
45 #if SLIC_GET_STATS_ENABLED
46 static struct net_device_stats *sxg_get_stats(p_net_device dev);
47 #endif
48
49-static int sxg_mac_set_address(p_net_device dev, void * ptr);
50+static int sxg_mac_set_address(p_net_device dev, void *ptr);
51
52 static void sxg_adapter_set_hwaddr(p_adapter_t adapter);
53
54@@ -115,20 +121,19 @@ static void sxg_mcast_set_mask(p_adapter_t adapter);
55
56 static int sxg_initialize_adapter(p_adapter_t adapter);
57 static void sxg_stock_rcv_buffers(p_adapter_t adapter);
58-static void sxg_complete_descriptor_blocks(p_adapter_t adapter, unsigned char Index);
59+static void sxg_complete_descriptor_blocks(p_adapter_t adapter,
60+ unsigned char Index);
61 static int sxg_initialize_link(p_adapter_t adapter);
62 static int sxg_phy_init(p_adapter_t adapter);
63 static void sxg_link_event(p_adapter_t adapter);
64 static SXG_LINK_STATE sxg_get_link_state(p_adapter_t adapter);
65 static void sxg_link_state(p_adapter_t adapter, SXG_LINK_STATE LinkState);
66 static int sxg_write_mdio_reg(p_adapter_t adapter,
67- u32 DevAddr, u32 RegAddr, u32 Value);
68+ u32 DevAddr, u32 RegAddr, u32 Value);
69 static int sxg_read_mdio_reg(p_adapter_t adapter,
70- u32 DevAddr, u32 RegAddr, u32 * pValue);
71+ u32 DevAddr, u32 RegAddr, u32 *pValue);
72 static void sxg_mcast_set_list(p_net_device dev);
73
74-
75-
76 #define XXXTODO 0
77
78 static unsigned int sxg_first_init = 1;
79@@ -164,6 +169,7 @@ static struct pci_device_id sxg_pci_tbl[] __devinitdata = {
80 {PCI_DEVICE(SXG_VENDOR_ID, SXG_DEVICE_ID)},
81 {0,}
82 };
83+
84 MODULE_DEVICE_TABLE(pci, sxg_pci_tbl);
85
86 /***********************************************************************
87@@ -242,7 +248,7 @@ static bool sxg_download_microcode(p_adapter_t adapter, SXG_UCODE_SEL UcodeSel)
88 PSXG_HW_REGS HwRegs = adapter->HwRegs;
89 u32 Section;
90 u32 ThisSectionSize;
91- u32 * Instruction = NULL;
92+ u32 *Instruction = NULL;
93 u32 BaseAddress, AddressOffset, Address;
94 // u32 Failure;
95 u32 ValueRead;
96@@ -606,7 +612,7 @@ static void sxg_config_pci(struct pci_dev *pcidev)
97 PCI_COMMAND_MASTER | // Bus master enable
98 PCI_COMMAND_INVALIDATE | // Memory write and invalidate
99 PCI_COMMAND_PARITY | // Parity error response
100- PCI_COMMAND_SERR | // System ERR
101+ PCI_COMMAND_SERR | // System ERR
102 PCI_COMMAND_FAST_BACK); // Fast back-to-back
103 if (pci_command != new_command) {
104 DBG_ERROR("%s -- Updating PCI COMMAND register %4.4x->%4.4x.\n",
105@@ -695,17 +701,19 @@ static int sxg_entry_probe(struct pci_dev *pcidev,
106 mmio_start, mmio_len);
107
108 memmapped_ioaddr = ioremap(mmio_start, mmio_len);
109- DBG_ERROR("sxg: %s MEMMAPPED_IOADDR [%p]\n", __FUNCTION__, memmapped_ioaddr);
110+ DBG_ERROR("sxg: %s MEMMAPPED_IOADDR [%p]\n", __FUNCTION__,
111+ memmapped_ioaddr);
112 if (!memmapped_ioaddr) {
113 DBG_ERROR("%s cannot remap MMIO region %lx @ %lx\n",
114 __FUNCTION__, mmio_len, mmio_start);
115 goto err_out_free_mmio_region;
116 }
117
118- DBG_ERROR("sxg: %s found Alacritech SXG PCI, MMIO at %p, start[%lx] len[%lx], IRQ %d.\n",
119+ DBG_ERROR
120+ ("sxg: %s found Alacritech SXG PCI, MMIO at %p, start[%lx] len[%lx], IRQ %d.\n",
121 __func__, memmapped_ioaddr, mmio_start, mmio_len, pcidev->irq);
122
123- adapter->HwRegs = (void *) memmapped_ioaddr;
124+ adapter->HwRegs = (void *)memmapped_ioaddr;
125 adapter->base_addr = memmapped_ioaddr;
126
127 mmio_start = pci_resource_start(pcidev, 2);
128@@ -715,7 +723,8 @@ static int sxg_entry_probe(struct pci_dev *pcidev,
129 mmio_start, mmio_len);
130
131 memmapped_ioaddr = ioremap(mmio_start, mmio_len);
132- DBG_ERROR("sxg: %s MEMMAPPED_IOADDR [%p]\n", __func__, memmapped_ioaddr);
133+ DBG_ERROR("sxg: %s MEMMAPPED_IOADDR [%p]\n", __func__,
134+ memmapped_ioaddr);
135 if (!memmapped_ioaddr) {
136 DBG_ERROR("%s cannot remap MMIO region %lx @ %lx\n",
137 __FUNCTION__, mmio_len, mmio_start);
138@@ -845,7 +854,6 @@ static int sxg_entry_probe(struct pci_dev *pcidev,
139 return -ENODEV;
140 }
141
142-
143 /***********************************************************************
144 * LINE BASE Interrupt routines..
145 ***********************************************************************/
146@@ -957,7 +965,8 @@ static irqreturn_t sxg_isr(int irq, void *dev_id)
147 PSXG_EVENT_RING EventRing = &adapter->EventRings[i];
148 PSXG_EVENT Event =
149 &EventRing->Ring[adapter->NextEvent[i]];
150- unsigned char Cpu = adapter->RssSystemInfo->RssIdToCpu[i];
151+ unsigned char Cpu =
152+ adapter->RssSystemInfo->RssIdToCpu[i];
153 if (Event->Status & EVENT_STATUS_VALID) {
154 adapter->IsrDpcsPending++;
155 CpuMask |= (1 << Cpu);
156@@ -1078,7 +1087,8 @@ static int sxg_process_isr(p_adapter_t adapter, u32 MessageId)
157 if (Isr & SXG_ISR_DEAD) {
158 // Set aside the crash info and set the adapter state to RESET
159 adapter->CrashCpu =
160- (unsigned char) ((Isr & SXG_ISR_CPU) >> SXG_ISR_CPU_SHIFT);
161+ (unsigned char)((Isr & SXG_ISR_CPU) >>
162+ SXG_ISR_CPU_SHIFT);
163 adapter->CrashLocation = (ushort) (Isr & SXG_ISR_CRASH);
164 adapter->Dead = TRUE;
165 DBG_ERROR("%s: ISR_DEAD %x, CPU: %d\n", __FUNCTION__,
166@@ -1286,7 +1296,7 @@ static void sxg_complete_slow_send(p_adapter_t adapter)
167 {
168 PSXG_XMT_RING XmtRing = &adapter->XmtRings[0];
169 PSXG_RING_INFO XmtRingInfo = &adapter->XmtRingZeroInfo;
170- u32 * ContextType;
171+ u32 *ContextType;
172 PSXG_CMD XmtCmd;
173
174 // NOTE - This lock is dropped and regrabbed in this loop.
175@@ -1380,11 +1390,9 @@ static struct sk_buff *sxg_slow_receive(p_adapter_t adapter, PSXG_EVENT Event)
176 SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "RcvError",
177 Event, Event->Status, Event->HostHandle, 0);
178 // XXXTODO - Remove this print later
179- DBG_ERROR("SXG: Receive error %x\n",
180- *(u32 *)
181+ DBG_ERROR("SXG: Receive error %x\n", *(u32 *)
182 SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr));
183- sxg_process_rcv_error(adapter,
184- *(u32 *)
185+ sxg_process_rcv_error(adapter, *(u32 *)
186 SXG_RECEIVE_DATA_LOCATION
187 (RcvDataBufferHdr));
188 goto drop;
189@@ -1406,8 +1414,7 @@ static struct sk_buff *sxg_slow_receive(p_adapter_t adapter, PSXG_EVENT Event)
190 //
191 // Dumb-nic frame. See if it passes our mac filter and update stats
192 //
193- if (!sxg_mac_filter(adapter,
194- (p_ether_header)
195+ if (!sxg_mac_filter(adapter, (p_ether_header)
196 SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr),
197 Event->Length)) {
198 SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "RcvFiltr",
199@@ -1527,7 +1534,8 @@ static void sxg_process_rcv_error(p_adapter_t adapter, u32 ErrorStatus)
200 * Return Value:
201 * TRUE if the frame is to be allowed
202 */
203-static bool sxg_mac_filter(p_adapter_t adapter, p_ether_header EtherHdr, ushort length)
204+static bool sxg_mac_filter(p_adapter_t adapter, p_ether_header EtherHdr,
205+ ushort length)
206 {
207 bool EqualAddr;
208
209@@ -1600,7 +1608,8 @@ static int sxg_register_interrupt(p_adapter_t adapter)
210 ("sxg: %s AllocAdaptRsrcs adapter[%p] dev->irq[%x] %x\n",
211 __FUNCTION__, adapter, adapter->netdev->irq, NR_IRQS);
212
213- spin_unlock_irqrestore(&sxg_global.driver_lock, sxg_global.flags);
214+ spin_unlock_irqrestore(&sxg_global.driver_lock,
215+ sxg_global.flags);
216
217 retval = request_irq(adapter->netdev->irq,
218 &sxg_isr,
219@@ -1729,7 +1738,6 @@ static int sxg_entry_open(p_net_device dev)
220 sxg_global.num_sxg_ports_active++;
221 adapter->activated = 1;
222 }
223-
224 // Initialize the adapter
225 DBG_ERROR("sxg: %s ENTER sxg_initialize_adapter\n", __FUNCTION__);
226 status = sxg_initialize_adapter(adapter);
227@@ -1786,7 +1794,7 @@ static void __devexit sxg_entry_remove(struct pci_dev *pcidev)
228 release_mem_region(mmio_start, mmio_len);
229
230 DBG_ERROR("sxg: %s iounmap dev->base_addr[%x]\n", __FUNCTION__,
231- (unsigned int) dev->base_addr);
232+ (unsigned int)dev->base_addr);
233 iounmap((char *)dev->base_addr);
234
235 DBG_ERROR("sxg: %s deallocate device\n", __FUNCTION__);
236@@ -1929,7 +1937,7 @@ static int sxg_transmit_packet(p_adapter_t adapter, struct sk_buff *skb)
237 {
238 PSCATTER_GATHER_LIST pSgl;
239 PSXG_SCATTER_GATHER SxgSgl;
240- void * SglBuffer;
241+ void *SglBuffer;
242 u32 SglBufferLength;
243
244 // The vast majority of work is done in the shared
245@@ -2038,7 +2046,9 @@ static void sxg_dumb_sgl(PSCATTER_GATHER_LIST pSgl, PSXG_SCATTER_GATHER SxgSgl)
246 #endif
247 // Fill in the command
248 // Copy out the first SGE to the command and adjust for offset
249- phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len, PCI_DMA_TODEVICE);
250+ phys_addr =
251+ pci_map_single(adapter->pcidev, skb->data, skb->len,
252+ PCI_DMA_TODEVICE);
253 XmtCmd->Buffer.FirstSgeAddress = SXG_GET_ADDR_HIGH(phys_addr);
254 XmtCmd->Buffer.FirstSgeAddress = XmtCmd->Buffer.FirstSgeAddress << 32;
255 XmtCmd->Buffer.FirstSgeAddress =
256@@ -2422,7 +2432,8 @@ static SXG_LINK_STATE sxg_get_link_state(p_adapter_t adapter)
257 return (SXG_LINK_DOWN);
258 }
259
260-static void sxg_indicate_link_state(p_adapter_t adapter, SXG_LINK_STATE LinkState)
261+static void sxg_indicate_link_state(p_adapter_t adapter,
262+ SXG_LINK_STATE LinkState)
263 {
264 if (adapter->LinkState == SXG_LINK_UP) {
265 DBG_ERROR("%s: LINK now UP, call netif_start_queue\n",
266@@ -2487,11 +2498,11 @@ static void sxg_link_state(p_adapter_t adapter, SXG_LINK_STATE LinkState)
267 * status
268 */
269 static int sxg_write_mdio_reg(p_adapter_t adapter,
270- u32 DevAddr, u32 RegAddr, u32 Value)
271+ u32 DevAddr, u32 RegAddr, u32 Value)
272 {
273 PSXG_HW_REGS HwRegs = adapter->HwRegs;
274 u32 AddrOp; // Address operation (written to MIIM field reg)
275- u32 WriteOp; // Write operation (written to MIIM field reg)
276+ u32 WriteOp; // Write operation (written to MIIM field reg)
277 u32 Cmd; // Command (written to MIIM command reg)
278 u32 ValueRead;
279 u32 Timeout;
280@@ -2577,7 +2588,7 @@ static int sxg_write_mdio_reg(p_adapter_t adapter,
281 * status
282 */
283 static int sxg_read_mdio_reg(p_adapter_t adapter,
284- u32 DevAddr, u32 RegAddr, u32 * pValue)
285+ u32 DevAddr, u32 RegAddr, u32 *pValue)
286 {
287 PSXG_HW_REGS HwRegs = adapter->HwRegs;
288 u32 AddrOp; // Address operation (written to MIIM field reg)
289@@ -2698,7 +2709,7 @@ static int sxg_mcast_add_list(p_adapter_t adapter, char *address)
290 * we must then transpose the value and return bits 30-23.
291 *
292 */
293-static u32 sxg_crc_table[256]; /* Table of CRC's for all possible byte values */
294+static u32 sxg_crc_table[256]; /* Table of CRC's for all possible byte values */
295 static u32 sxg_crc_init; /* Is table initialized */
296
297 /*
298@@ -2706,7 +2717,7 @@ static u32 sxg_crc_init; /* Is table initialized */
299 */
300 static void sxg_mcast_init_crc32(void)
301 {
302- u32 c; /* CRC shit reg */
303+ u32 c; /* CRC shit reg */
304 u32 e = 0; /* Poly X-or pattern */
305 int i; /* counter */
306 int k; /* byte being shifted into crc */
307@@ -2783,7 +2794,7 @@ static void sxg_mcast_set_list(p_net_device dev)
308 ASSERT(adapter);
309
310 for (i = 1; i <= mc_count; i++) {
311- addresses = (char *) & mc_list->dmi_addr;
312+ addresses = (char *)&mc_list->dmi_addr;
313 if (mc_list->dmi_addrlen == 6) {
314 status = sxg_mcast_add_list(adapter, addresses);
315 if (status != STATUS_SUCCESS) {
316@@ -2833,7 +2844,7 @@ static void sxg_mcast_set_mask(p_adapter_t adapter)
317 PSXG_UCODE_REGS sxg_regs = adapter->UcodeRegs;
318
319 DBG_ERROR("%s ENTER (%s) macopts[%x] mask[%llx]\n", __FUNCTION__,
320- adapter->netdev->name, (unsigned int) adapter->MacFilter,
321+ adapter->netdev->name, (unsigned int)adapter->MacFilter,
322 adapter->MulticastMask);
323
324 if (adapter->MacFilter & (MAC_ALLMCAST | MAC_PROMISC)) {
325@@ -2857,12 +2868,10 @@ static void sxg_mcast_set_mask(p_adapter_t adapter)
326 ((adapter->MulticastMask >> 32) & 0xFFFFFFFF)));
327
328 WRITE_REG(sxg_regs->McastLow,
329- (u32) (adapter->MulticastMask & 0xFFFFFFFF),
330- FLUSH);
331+ (u32) (adapter->MulticastMask & 0xFFFFFFFF), FLUSH);
332 WRITE_REG(sxg_regs->McastHigh,
333 (u32) ((adapter->
334- MulticastMask >> 32) & 0xFFFFFFFF),
335- FLUSH);
336+ MulticastMask >> 32) & 0xFFFFFFFF), FLUSH);
337 }
338 }
339
340@@ -2991,9 +3000,9 @@ void SxgFreeResources(p_adapter_t adapter)
341 * None.
342 */
343 static void sxg_allocate_complete(p_adapter_t adapter,
344- void *VirtualAddress,
345- dma_addr_t PhysicalAddress,
346- u32 Length, SXG_BUFFER_TYPE Context)
347+ void *VirtualAddress,
348+ dma_addr_t PhysicalAddress,
349+ u32 Length, SXG_BUFFER_TYPE Context)
350 {
351 SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AllocCmp",
352 adapter, VirtualAddress, Length, Context);
353@@ -3008,8 +3017,7 @@ static void sxg_allocate_complete(p_adapter_t adapter,
354 PhysicalAddress, Length);
355 break;
356 case SXG_BUFFER_TYPE_SGL:
357- sxg_allocate_sgl_buffer_complete(adapter,
358- (PSXG_SCATTER_GATHER)
359+ sxg_allocate_sgl_buffer_complete(adapter, (PSXG_SCATTER_GATHER)
360 VirtualAddress,
361 PhysicalAddress, Length);
362 break;
363@@ -3031,10 +3039,10 @@ static void sxg_allocate_complete(p_adapter_t adapter,
364 * int
365 */
366 static int sxg_allocate_buffer_memory(p_adapter_t adapter,
367- u32 Size, SXG_BUFFER_TYPE BufferType)
368+ u32 Size, SXG_BUFFER_TYPE BufferType)
369 {
370 int status;
371- void * Buffer;
372+ void *Buffer;
373 dma_addr_t pBuffer;
374
375 SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AllocMem",
376@@ -3083,8 +3091,9 @@ static int sxg_allocate_buffer_memory(p_adapter_t adapter,
377 *
378 */
379 static void sxg_allocate_rcvblock_complete(p_adapter_t adapter,
380- void * RcvBlock,
381- dma_addr_t PhysicalAddress, u32 Length)
382+ void *RcvBlock,
383+ dma_addr_t PhysicalAddress,
384+ u32 Length)
385 {
386 u32 i;
387 u32 BufferSize = adapter->ReceiveBufferSize;
388@@ -3160,9 +3169,10 @@ static void sxg_allocate_rcvblock_complete(p_adapter_t adapter,
389 }
390
391 // Locate the descriptor block and put it on a separate free queue
392- RcvDescriptorBlock = (PSXG_RCV_DESCRIPTOR_BLOCK) ((unsigned char *)RcvBlock +
393- SXG_RCV_DESCRIPTOR_BLOCK_OFFSET
394- (BufferSize));
395+ RcvDescriptorBlock =
396+ (PSXG_RCV_DESCRIPTOR_BLOCK) ((unsigned char *)RcvBlock +
397+ SXG_RCV_DESCRIPTOR_BLOCK_OFFSET
398+ (BufferSize));
399 RcvDescriptorBlockHdr =
400 (PSXG_RCV_DESCRIPTOR_BLOCK_HDR) ((unsigned char *)RcvBlock +
401 SXG_RCV_DESCRIPTOR_BLOCK_HDR_OFFSET
402@@ -3210,8 +3220,9 @@ static void sxg_allocate_rcvblock_complete(p_adapter_t adapter,
403 *
404 */
405 static void sxg_allocate_sgl_buffer_complete(p_adapter_t adapter,
406- PSXG_SCATTER_GATHER SxgSgl,
407- dma_addr_t PhysicalAddress, u32 Length)
408+ PSXG_SCATTER_GATHER SxgSgl,
409+ dma_addr_t PhysicalAddress,
410+ u32 Length)
411 {
412 SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AlSglCmp",
413 adapter, SxgSgl, Length, 0);
414@@ -3228,7 +3239,8 @@ static void sxg_allocate_sgl_buffer_complete(p_adapter_t adapter,
415 adapter, SxgSgl, Length, 0);
416 }
417
418-static unsigned char temp_mac_address[6] = { 0x00, 0xab, 0xcd, 0xef, 0x12, 0x69 };
419+static unsigned char temp_mac_address[6] =
420+ { 0x00, 0xab, 0xcd, 0xef, 0x12, 0x69 };
421
422 static void sxg_adapter_set_hwaddr(p_adapter_t adapter)
423 {
424@@ -3255,7 +3267,7 @@ static void sxg_adapter_set_hwaddr(p_adapter_t adapter)
425
426 }
427
428-static int sxg_mac_set_address(p_net_device dev, void * ptr)
429+static int sxg_mac_set_address(p_net_device dev, void *ptr)
430 {
431 #if XXXTODO
432 p_adapter_t adapter = (p_adapter_t) netdev_priv(dev);
433@@ -3400,7 +3412,8 @@ static int sxg_initialize_adapter(p_adapter_t adapter)
434 * status
435 */
436 static int sxg_fill_descriptor_block(p_adapter_t adapter,
437- PSXG_RCV_DESCRIPTOR_BLOCK_HDR RcvDescriptorBlockHdr)
438+ PSXG_RCV_DESCRIPTOR_BLOCK_HDR
439+ RcvDescriptorBlockHdr)
440 {
441 u32 i;
442 PSXG_RING_INFO RcvRingInfo = &adapter->RcvRingZeroInfo;
443@@ -3436,7 +3449,8 @@ static int sxg_fill_descriptor_block(p_adapter_t adapter,
444 ASSERT(RcvDataBufferHdr);
445 SXG_REINIATIALIZE_PACKET(RcvDataBufferHdr->SxgDumbRcvPacket);
446 RcvDataBufferHdr->State = SXG_BUFFER_ONCARD;
447- RcvDescriptorBlock->Descriptors[i].VirtualAddress = (void *)RcvDataBufferHdr;
448+ RcvDescriptorBlock->Descriptors[i].VirtualAddress =
449+ (void *)RcvDataBufferHdr;
450 RcvDescriptorBlock->Descriptors[i].PhysicalAddress =
451 RcvDataBufferHdr->PhysicalAddress;
452 }
453@@ -3497,7 +3511,9 @@ static void sxg_stock_rcv_buffers(p_adapter_t adapter)
454 RcvDescriptorBlockHdr = NULL;
455 if (adapter->FreeRcvBlockCount) {
456 _ple = RemoveHeadList(&adapter->FreeRcvBlocks);
457- RcvDescriptorBlockHdr = container_of(_ple, SXG_RCV_DESCRIPTOR_BLOCK_HDR, FreeList);
458+ RcvDescriptorBlockHdr =
459+ container_of(_ple, SXG_RCV_DESCRIPTOR_BLOCK_HDR,
460+ FreeList);
461 adapter->FreeRcvBlockCount--;
462 RcvDescriptorBlockHdr->State = SXG_BUFFER_BUSY;
463 }
464@@ -3533,7 +3549,8 @@ static void sxg_stock_rcv_buffers(p_adapter_t adapter)
465 * Return
466 * None
467 */
468-static void sxg_complete_descriptor_blocks(p_adapter_t adapter, unsigned char Index)
469+static void sxg_complete_descriptor_blocks(p_adapter_t adapter,
470+ unsigned char Index)
471 {
472 PSXG_RCV_RING RingZero = &adapter->RcvRings[0];
473 PSXG_RING_INFO RcvRingInfo = &adapter->RcvRingZeroInfo;
474@@ -3576,7 +3593,6 @@ static void sxg_complete_descriptor_blocks(p_adapter_t adapter, unsigned char In
475 adapter, Index, RcvRingInfo->Head, RcvRingInfo->Tail);
476 }
477
478-
479 static struct pci_driver sxg_driver = {
480 .name = DRV_NAME,
481 .id_table = sxg_pci_tbl,
482--
4831.6.0.2
484
IPFire 2.x development tree