]> git.ipfire.org Git - ipfire-2.x.git/blame - src/patches/suse-2.6.27.39/patches.drivers/cxgb3-simplify-port-type-struct-and-usage
projects / ipfire-2.x.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Fix oinkmaster patch.
[ipfire-2.x.git] / src / patches / suse-2.6.27.39 / patches.drivers / cxgb3-simplify-port-type-struct-and-usage
CommitLineData
2cb7cef9
BS		 1Commit-Id: 044979827eda13675abab99879ebe3ea535d59fa
2From: Divy Le Ray <divy@chelsio.com>
3Date: Wed, 8 Oct 2008 17:38:29 -0700
4Acked-by: Karsten Keil <kkeil@novell.com>
5Subject: [PATCH] cxgb3: simplify port type struct and usage
6Reference: bnc#446739
7
8
9Second step in overall phy layer reorganization.
10Clean up the port_type_info structure.
11Support coextistence of clause 22 and clause 45 MDIO devices.
12Select the type of MDIO transaction on a per transaction basis.
13
14Signed-off-by: Divy Le Ray <divy@chelsio.com>
15Signed-off-by: David S. Miller <davem@davemloft.net>
16
17Index: linux-2.6.27/drivers/net/cxgb3/adapter.h
18===================================================================
19--- linux-2.6.27.orig/drivers/net/cxgb3/adapter.h
20+++ linux-2.6.27/drivers/net/cxgb3/adapter.h
21@@ -54,7 +54,6 @@ struct port_info {
22 struct adapter *adapter;
23 struct vlan_group *vlan_grp;
24 struct sge_qset *qs;
25- const struct port_type_info *port_type;
26 u8 port_id;
27 u8 rx_csum_offload;
28 u8 nqsets;
29@@ -283,6 +282,7 @@ int t3_offload_tx(struct t3cdev *tdev, s
30 void t3_os_ext_intr_handler(struct adapter *adapter);
31 void t3_os_link_changed(struct adapter *adapter, int port_id, int link_status,
32 int speed, int duplex, int fc);
33+void t3_os_phymod_changed(struct adapter *adap, int port_id);
34
35 void t3_sge_start(struct adapter *adap);
36 void t3_sge_stop(struct adapter *adap);
37Index: linux-2.6.27/drivers/net/cxgb3/ael1002.c
38===================================================================
39--- linux-2.6.27.orig/drivers/net/cxgb3/ael1002.c
40+++ linux-2.6.27/drivers/net/cxgb3/ael1002.c
41@@ -122,7 +122,9 @@ static struct cphy_ops ael1002_ops = {
42 int t3_ael1002_phy_prep(struct cphy *phy, struct adapter *adapter,
43 int phy_addr, const struct mdio_ops *mdio_ops)
44 {
45- cphy_init(phy, adapter, phy_addr, &ael1002_ops, mdio_ops);
46+ cphy_init(phy, adapter, phy_addr, &ael1002_ops, mdio_ops,
47+ SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_FIBRE,
48+ "10GBASE-R");
49 ael100x_txon(phy);
50 return 0;
51 }
52@@ -178,7 +180,9 @@ static struct cphy_ops ael1006_ops = {
53 int t3_ael1006_phy_prep(struct cphy *phy, struct adapter *adapter,
54 int phy_addr, const struct mdio_ops *mdio_ops)
55 {
56- cphy_init(phy, adapter, phy_addr, &ael1006_ops, mdio_ops);
57+ cphy_init(phy, adapter, phy_addr, &ael1006_ops, mdio_ops,
58+ SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_FIBRE,
59+ "10GBASE-SR");
60 ael100x_txon(phy);
61 return 0;
62 }
63@@ -198,7 +202,9 @@ int t3_qt2045_phy_prep(struct cphy *phy,
64 {
65 unsigned int stat;
66
67- cphy_init(phy, adapter, phy_addr, &qt2045_ops, mdio_ops);
68+ cphy_init(phy, adapter, phy_addr, &qt2045_ops, mdio_ops,
69+ SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_TP,
70+ "10GBASE-CX4");
71
72 /*
73 * Some cards where the PHY is supposed to be at address 0 actually
74@@ -256,6 +262,8 @@ static struct cphy_ops xaui_direct_ops =
75 int t3_xaui_direct_phy_prep(struct cphy *phy, struct adapter *adapter,
76 int phy_addr, const struct mdio_ops *mdio_ops)
77 {
78- cphy_init(phy, adapter, phy_addr, &xaui_direct_ops, mdio_ops);
79+ cphy_init(phy, adapter, phy_addr, &xaui_direct_ops, mdio_ops,
80+ SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_TP,
81+ "10GBASE-CX4");
82 return 0;
83 }
84Index: linux-2.6.27/drivers/net/cxgb3/common.h
85===================================================================
86--- linux-2.6.27.orig/drivers/net/cxgb3/common.h
87+++ linux-2.6.27/drivers/net/cxgb3/common.h
88@@ -193,8 +193,6 @@ struct mdio_ops {
89 struct adapter_info {
90 unsigned char nports; /* # of ports */
91 unsigned char phy_base_addr; /* MDIO PHY base address */
92- unsigned char mdien;
93- unsigned char mdiinv;
94 unsigned int gpio_out; /* GPIO output settings */
95 unsigned int gpio_intr; /* GPIO IRQ enable mask */
96 unsigned long caps; /* adapter capabilities */
97@@ -202,13 +200,6 @@ struct adapter_info {
98 const char *desc; /* product description */
99 };
100
101-struct port_type_info {
102- int (*phy_prep)(struct cphy *phy, struct adapter *adapter,
103- int phy_addr, const struct mdio_ops *ops);
104- unsigned int caps;
105- const char *desc;
106-};
107-
108 struct mc5_stats {
109 unsigned long parity_err;
110 unsigned long active_rgn_full;
111@@ -548,7 +539,6 @@ enum {
112
113 /* PHY operations */
114 struct cphy_ops {
115- void (*destroy)(struct cphy *phy);
116 int (*reset)(struct cphy *phy, int wait);
117
118 int (*intr_enable)(struct cphy *phy);
119@@ -569,8 +559,10 @@ struct cphy_ops {
120
121 /* A PHY instance */
122 struct cphy {
123- int addr; /* PHY address */
124+ int addr; /* PHY address */
125+ unsigned int caps; /* PHY capabilities */
126 struct adapter *adapter; /* associated adapter */
127+ const char *desc; /* PHY description */
128 unsigned long fifo_errors; /* FIFO over/under-flows */
129 const struct cphy_ops *ops; /* PHY operations */
130 int (*mdio_read)(struct adapter *adapter, int phy_addr, int mmd_addr,
131@@ -595,10 +587,13 @@ static inline int mdio_write(struct cphy
132 /* Convenience initializer */
133 static inline void cphy_init(struct cphy *phy, struct adapter *adapter,
134 int phy_addr, struct cphy_ops *phy_ops,
135- const struct mdio_ops *mdio_ops)
136+ const struct mdio_ops *mdio_ops,
137+ unsigned int caps, const char *desc)
138 {
139- phy->adapter = adapter;
140 phy->addr = phy_addr;
141+ phy->caps = caps;
142+ phy->adapter = adapter;
143+ phy->desc = desc;
144 phy->ops = phy_ops;
145 if (mdio_ops) {
146 phy->mdio_read = mdio_ops->read;
147Index: linux-2.6.27/drivers/net/cxgb3/cxgb3_main.c
148===================================================================
149--- linux-2.6.27.orig/drivers/net/cxgb3/cxgb3_main.c
150+++ linux-2.6.27/drivers/net/cxgb3/cxgb3_main.c
151@@ -2454,7 +2454,7 @@ static void check_link_status(struct ada
152 struct net_device *dev = adapter->port[i];
153 struct port_info *p = netdev_priv(dev);
154
155- if (!(p->port_type->caps & SUPPORTED_IRQ) && netif_running(dev))
156+ if (!(p->phy.caps & SUPPORTED_IRQ) && netif_running(dev))
157 t3_link_changed(adapter, i);
158 }
159 }
160@@ -2767,7 +2767,7 @@ static void __devinit print_port_info(st
161 if (!test_bit(i, &adap->registered_device_map))
162 continue;
163 printk(KERN_INFO "%s: %s %s %sNIC (rev %d) %s%s\n",
164- dev->name, ai->desc, pi->port_type->desc,
165+ dev->name, ai->desc, pi->phy.desc,
166 is_offload(adap) ? "R" : "", adap->params.rev, buf,
167 (adap->flags & USING_MSIX) ? " MSI-X" :
168 (adap->flags & USING_MSI) ? " MSI" : "");
169Index: linux-2.6.27/drivers/net/cxgb3/t3_hw.c
170===================================================================
171--- linux-2.6.27.orig/drivers/net/cxgb3/t3_hw.c
172+++ linux-2.6.27/drivers/net/cxgb3/t3_hw.c
173@@ -194,21 +194,18 @@ int t3_mc7_bd_read(struct mc7 *mc7, unsi
174 static void mi1_init(struct adapter *adap, const struct adapter_info *ai)
175 {
176 u32 clkdiv = adap->params.vpd.cclk / (2 * adap->params.vpd.mdc) - 1;
177- u32 val = F_PREEN | V_MDIINV(ai->mdiinv) | V_MDIEN(ai->mdien) |
178- V_CLKDIV(clkdiv);
179+ u32 val = F_PREEN | V_CLKDIV(clkdiv);
180
181- if (!(ai->caps & SUPPORTED_10000baseT_Full))
182- val |= V_ST(1);
183 t3_write_reg(adap, A_MI1_CFG, val);
184 }
185
186-#define MDIO_ATTEMPTS 10
187+#define MDIO_ATTEMPTS 20
188
189 /*
190- * MI1 read/write operations for direct-addressed PHYs.
191+ * MI1 read/write operations for clause 22 PHYs.
192 */
193-static int mi1_read(struct adapter *adapter, int phy_addr, int mmd_addr,
194- int reg_addr, unsigned int *valp)
195+static int t3_mi1_read(struct adapter *adapter, int phy_addr, int mmd_addr,
196+ int reg_addr, unsigned int *valp)
197 {
198 int ret;
199 u32 addr = V_REGADDR(reg_addr) | V_PHYADDR(phy_addr);
200@@ -217,16 +214,17 @@ static int mi1_read(struct adapter *adap
201 return -EINVAL;
202
203 mutex_lock(&adapter->mdio_lock);
204+ t3_set_reg_field(adapter, A_MI1_CFG, V_ST(M_ST), V_ST(1));
205 t3_write_reg(adapter, A_MI1_ADDR, addr);
206 t3_write_reg(adapter, A_MI1_OP, V_MDI_OP(2));
207- ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0, MDIO_ATTEMPTS, 20);
208+ ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0, MDIO_ATTEMPTS, 10);
209 if (!ret)
210 *valp = t3_read_reg(adapter, A_MI1_DATA);
211 mutex_unlock(&adapter->mdio_lock);
212 return ret;
213 }
214
215-static int mi1_write(struct adapter *adapter, int phy_addr, int mmd_addr,
216+static int t3_mi1_write(struct adapter *adapter, int phy_addr, int mmd_addr,
217 int reg_addr, unsigned int val)
218 {
219 int ret;
220@@ -236,37 +234,51 @@ static int mi1_write(struct adapter *ada
221 return -EINVAL;
222
223 mutex_lock(&adapter->mdio_lock);
224+ t3_set_reg_field(adapter, A_MI1_CFG, V_ST(M_ST), V_ST(1));
225 t3_write_reg(adapter, A_MI1_ADDR, addr);
226 t3_write_reg(adapter, A_MI1_DATA, val);
227 t3_write_reg(adapter, A_MI1_OP, V_MDI_OP(1));
228- ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0, MDIO_ATTEMPTS, 20);
229+ ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0, MDIO_ATTEMPTS, 10);
230 mutex_unlock(&adapter->mdio_lock);
231 return ret;
232 }
233
234 static const struct mdio_ops mi1_mdio_ops = {
235- mi1_read,
236- mi1_write
237+ t3_mi1_read,
238+ t3_mi1_write
239 };
240
241 /*
242+ * Performs the address cycle for clause 45 PHYs.
243+ * Must be called with the MDIO_LOCK held.
244+ */
245+static int mi1_wr_addr(struct adapter *adapter, int phy_addr, int mmd_addr,
246+ int reg_addr)
247+{
248+ u32 addr = V_REGADDR(mmd_addr) | V_PHYADDR(phy_addr);
249+
250+ t3_set_reg_field(adapter, A_MI1_CFG, V_ST(M_ST), 0);
251+ t3_write_reg(adapter, A_MI1_ADDR, addr);
252+ t3_write_reg(adapter, A_MI1_DATA, reg_addr);
253+ t3_write_reg(adapter, A_MI1_OP, V_MDI_OP(0));
254+ return t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0,
255+ MDIO_ATTEMPTS, 10);
256+}
257+
258+/*
259 * MI1 read/write operations for indirect-addressed PHYs.
260 */
261 static int mi1_ext_read(struct adapter *adapter, int phy_addr, int mmd_addr,
262 int reg_addr, unsigned int *valp)
263 {
264 int ret;
265- u32 addr = V_REGADDR(mmd_addr) | V_PHYADDR(phy_addr);
266
267 mutex_lock(&adapter->mdio_lock);
268- t3_write_reg(adapter, A_MI1_ADDR, addr);
269- t3_write_reg(adapter, A_MI1_DATA, reg_addr);
270- t3_write_reg(adapter, A_MI1_OP, V_MDI_OP(0));
271- ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0, MDIO_ATTEMPTS, 20);
272+ ret = mi1_wr_addr(adapter, phy_addr, mmd_addr, reg_addr);
273 if (!ret) {
274 t3_write_reg(adapter, A_MI1_OP, V_MDI_OP(3));
275 ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0,
276- MDIO_ATTEMPTS, 20);
277+ MDIO_ATTEMPTS, 10);
278 if (!ret)
279 *valp = t3_read_reg(adapter, A_MI1_DATA);
280 }
281@@ -278,18 +290,14 @@ static int mi1_ext_write(struct adapter
282 int reg_addr, unsigned int val)
283 {
284 int ret;
285- u32 addr = V_REGADDR(mmd_addr) | V_PHYADDR(phy_addr);
286
287 mutex_lock(&adapter->mdio_lock);
288- t3_write_reg(adapter, A_MI1_ADDR, addr);
289- t3_write_reg(adapter, A_MI1_DATA, reg_addr);
290- t3_write_reg(adapter, A_MI1_OP, V_MDI_OP(0));
291- ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0, MDIO_ATTEMPTS, 20);
292+ ret = mi1_wr_addr(adapter, phy_addr, mmd_addr, reg_addr);
293 if (!ret) {
294 t3_write_reg(adapter, A_MI1_DATA, val);
295 t3_write_reg(adapter, A_MI1_OP, V_MDI_OP(1));
296 ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0,
297- MDIO_ATTEMPTS, 20);
298+ MDIO_ATTEMPTS, 10);
299 }
300 mutex_unlock(&adapter->mdio_lock);
301 return ret;
302@@ -435,22 +443,22 @@ int t3_set_phy_speed_duplex(struct cphy
303 }
304
305 static const struct adapter_info t3_adap_info[] = {
306- {2, 0, 0, 0,
307+ {2, 0,
308 F_GPIO2_OEN | F_GPIO4_OEN |
309 F_GPIO2_OUT_VAL | F_GPIO4_OUT_VAL, F_GPIO3 | F_GPIO5,
310 0,
311 &mi1_mdio_ops, "Chelsio PE9000"},
312- {2, 0, 0, 0,
313+ {2, 0,
314 F_GPIO2_OEN | F_GPIO4_OEN |
315 F_GPIO2_OUT_VAL | F_GPIO4_OUT_VAL, F_GPIO3 | F_GPIO5,
316 0,
317 &mi1_mdio_ops, "Chelsio T302"},
318- {1, 0, 0, 0,
319+ {1, 0,
320 F_GPIO1_OEN | F_GPIO6_OEN | F_GPIO7_OEN | F_GPIO10_OEN |
321 F_GPIO11_OEN | F_GPIO1_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL,
322 0, SUPPORTED_10000baseT_Full | SUPPORTED_AUI,
323 &mi1_mdio_ext_ops, "Chelsio T310"},
324- {2, 0, 0, 0,
325+ {2, 0,
326 F_GPIO1_OEN | F_GPIO2_OEN | F_GPIO4_OEN | F_GPIO5_OEN | F_GPIO6_OEN |
327 F_GPIO7_OEN | F_GPIO10_OEN | F_GPIO11_OEN | F_GPIO1_OUT_VAL |
328 F_GPIO5_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL, 0,
329@@ -467,29 +475,23 @@ const struct adapter_info *t3_get_adapte
330 return id < ARRAY_SIZE(t3_adap_info) ? &t3_adap_info[id] : NULL;
331 }
332
333-#define CAPS_1G (SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Full | \
334- SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_MII)
335-#define CAPS_10G (SUPPORTED_10000baseT_Full | SUPPORTED_AUI)
336+struct port_type_info {
337+ int (*phy_prep)(struct cphy *phy, struct adapter *adapter,
338+ int phy_addr, const struct mdio_ops *ops);
339+};
340
341 static const struct port_type_info port_types[] = {
342- {NULL},
343- {t3_ael1002_phy_prep, CAPS_10G | SUPPORTED_FIBRE,
344- "10GBASE-XR"},
345- {t3_vsc8211_phy_prep, CAPS_1G | SUPPORTED_TP | SUPPORTED_IRQ,
346- "10/100/1000BASE-T"},
347- {NULL, CAPS_1G | SUPPORTED_TP | SUPPORTED_IRQ,
348- "10/100/1000BASE-T"},
349- {t3_xaui_direct_phy_prep, CAPS_10G | SUPPORTED_TP, "10GBASE-CX4"},
350- {NULL, CAPS_10G, "10GBASE-KX4"},
351- {t3_qt2045_phy_prep, CAPS_10G | SUPPORTED_TP, "10GBASE-CX4"},
352- {t3_ael1006_phy_prep, CAPS_10G | SUPPORTED_FIBRE,
353- "10GBASE-SR"},
354- {NULL, CAPS_10G | SUPPORTED_TP, "10GBASE-CX4"},
355+ { NULL },
356+ { t3_ael1002_phy_prep },
357+ { t3_vsc8211_phy_prep },
358+ { NULL},
359+ { t3_xaui_direct_phy_prep },
360+ { NULL },
361+ { t3_qt2045_phy_prep },
362+ { t3_ael1006_phy_prep },
363+ { NULL },
364 };
365
366-#undef CAPS_1G
367-#undef CAPS_10G
368-
369 #define VPD_ENTRY(name, len) \
370 u8 name##_kword[2]; u8 name##_len; u8 name##_data[len]
371
372@@ -1691,7 +1693,7 @@ int t3_phy_intr_handler(struct adapter *
373 mask = gpi - (gpi & (gpi - 1));
374 gpi -= mask;
375
376- if (!(p->port_type->caps & SUPPORTED_IRQ))
377+ if (!(p->phy.caps & SUPPORTED_IRQ))
378 continue;
379
380 if (cause & mask) {
381@@ -3556,7 +3558,7 @@ int t3_prep_adapter(struct adapter *adap
382 int reset)
383 {
384 int ret;
385- unsigned int i, j = 0;
386+ unsigned int i, j = -1;
387
388 get_pci_mode(adapter, &adapter->params.pci);
389
390@@ -3620,19 +3622,18 @@ int t3_prep_adapter(struct adapter *adap
391
392 for_each_port(adapter, i) {
393 u8 hw_addr[6];
394+ const struct port_type_info *pti;
395 struct port_info *p = adap2pinfo(adapter, i);
396
397- while (!adapter->params.vpd.port_type[j])
398- ++j;
399+ while (!adapter->params.vpd.port_type[++j])
400+ ;
401
402- p->port_type = &port_types[adapter->params.vpd.port_type[j]];
403- ret = p->port_type->phy_prep(&p->phy, adapter,
404- ai->phy_base_addr + j,
405- ai->mdio_ops);
406+ pti = &port_types[adapter->params.vpd.port_type[j]];
407+ ret = pti->phy_prep(&p->phy, adapter, ai->phy_base_addr + j,
408+ ai->mdio_ops);
409 if (ret)
410 return ret;
411 mac_prep(&p->mac, adapter, j);
412- ++j;
413
414 /*
415 * The VPD EEPROM stores the base Ethernet address for the
416@@ -3646,9 +3647,9 @@ int t3_prep_adapter(struct adapter *adap
417 ETH_ALEN);
418 memcpy(adapter->port[i]->perm_addr, hw_addr,
419 ETH_ALEN);
420- init_link_config(&p->link_config, p->port_type->caps);
421+ init_link_config(&p->link_config, p->phy.caps);
422 p->phy.ops->power_down(&p->phy, 1);
423- if (!(p->port_type->caps & SUPPORTED_IRQ))
424+ if (!(p->phy.caps & SUPPORTED_IRQ))
425 adapter->params.linkpoll_period = 10;
426 }
427
428@@ -3664,7 +3665,7 @@ void t3_led_ready(struct adapter *adapte
429 int t3_replay_prep_adapter(struct adapter *adapter)
430 {
431 const struct adapter_info *ai = adapter->params.info;
432- unsigned int i, j = 0;
433+ unsigned int i, j = -1;
434 int ret;
435
436 early_hw_init(adapter, ai);
437@@ -3673,17 +3674,17 @@ int t3_replay_prep_adapter(struct adapte
438 return ret;
439
440 for_each_port(adapter, i) {
441+ const struct port_type_info *pti;
442 struct port_info *p = adap2pinfo(adapter, i);
443- while (!adapter->params.vpd.port_type[j])
444- ++j;
445
446- ret = p->port_type->phy_prep(&p->phy, adapter,
447- ai->phy_base_addr + j,
448- ai->mdio_ops);
449+ while (!adapter->params.vpd.port_type[++j])
450+ ;
451+
452+ pti = &port_types[adapter->params.vpd.port_type[j]];
453+ ret = pti->phy_prep(&p->phy, adapter, p->phy.addr, NULL);
454 if (ret)
455 return ret;
456 p->phy.ops->power_down(&p->phy, 1);
457- ++j;
458 }
459
460 return 0;
461Index: linux-2.6.27/drivers/net/cxgb3/vsc8211.c
462===================================================================
463--- linux-2.6.27.orig/drivers/net/cxgb3/vsc8211.c
464+++ linux-2.6.27/drivers/net/cxgb3/vsc8211.c
465@@ -224,6 +224,9 @@ static struct cphy_ops vsc8211_ops = {
466 int t3_vsc8211_phy_prep(struct cphy *phy, struct adapter *adapter,
467 int phy_addr, const struct mdio_ops *mdio_ops)
468 {
469- cphy_init(phy, adapter, phy_addr, &vsc8211_ops, mdio_ops);
470+ cphy_init(phy, adapter, phy_addr, &vsc8211_ops, mdio_ops,
471+ SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Full |
472+ SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_MII |
473+ SUPPORTED_TP | SUPPORTED_IRQ, "10/100/1000BASE-T");
474 return 0;
475 }
IPFire 2.x development tree