From 2b230b77f5710aae3a8bf345b31d76d51c747829 Mon Sep 17 00:00:00 2001 From: Stefan Schantl Date: Thu, 19 Dec 2013 21:42:56 +0100 Subject: [PATCH] Kernel: Add SATA support on imx6 wandboard. The imx6q wandboard has a soldered SATA port which can be used by loading the ahci_imx kernel module. --- lfs/linux | 6 + .../imx/0005-Add-IMX6Q-AHCI-support.patch | 85 +++++ .../imx/0006-imx-Add-IMX53-AHCI-support.patch | 25 ++ ...nable-sata-clk-if-SATA_AHCI_PLATFORM.patch | 33 ++ ...e-the-sata-bits-definitions-of-gpr13.patch | 150 +++++++++ ...d-ahci-sata-support-on-imx-platforms.patch | 316 ++++++++++++++++++ ...ahci_imx-depend-on-CONFIG_MFD_SYSCON.patch | 24 ++ 7 files changed, 639 insertions(+) create mode 100644 src/patches/kernel/wandboard/imx/0005-Add-IMX6Q-AHCI-support.patch create mode 100644 src/patches/kernel/wandboard/imx/0006-imx-Add-IMX53-AHCI-support.patch create mode 100644 src/patches/kernel/wandboard/imx/0007-imx6-enable-sata-clk-if-SATA_AHCI_PLATFORM.patch create mode 100644 src/patches/kernel/wandboard/imx/0008-ARM-imx6q-update-the-sata-bits-definitions-of-gpr13.patch create mode 100644 src/patches/kernel/wandboard/imx/0009-ahci_imx-add-ahci-sata-support-on-imx-platforms.patch create mode 100644 src/patches/kernel/wandboard/imx/0010-ahci_imx-depend-on-CONFIG_MFD_SYSCON.patch diff --git a/lfs/linux b/lfs/linux index 6d5aea47c8..0530d367a1 100644 --- a/lfs/linux +++ b/lfs/linux @@ -176,6 +176,12 @@ ifeq "$(KCFG)" "-multi" cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/kernel/wandboard/imx/0002-i.MX6-Wandboard-add-CKO1-clock-output.patch cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/kernel/wandboard/imx/0003-thermal-add-imx-thermal-driver-support.patch cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/kernel/wandboard/imx/0004-ARM-i.MX6-Wandboard-add-wifi-bt-rfkill-driver.patch + cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/kernel/wandboard/imx/0005-Add-IMX6Q-AHCI-support.patch + cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/kernel/wandboard/imx/0006-imx-Add-IMX53-AHCI-support.patch + cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/kernel/wandboard/imx/0007-imx6-enable-sata-clk-if-SATA_AHCI_PLATFORM.patch + cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/kernel/wandboard/imx/0008-ARM-imx6q-update-the-sata-bits-definitions-of-gpr13.patch + cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/kernel/wandboard/imx/0009-ahci_imx-add-ahci-sata-support-on-imx-platforms.patch + cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/kernel/wandboard/imx/0010-ahci_imx-depend-on-CONFIG_MFD_SYSCON.patch # Patchset for Compulab Utilite. cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/kernel/utilite/linux-3.10-compulab-utilite-support.patch diff --git a/src/patches/kernel/wandboard/imx/0005-Add-IMX6Q-AHCI-support.patch b/src/patches/kernel/wandboard/imx/0005-Add-IMX6Q-AHCI-support.patch new file mode 100644 index 0000000000..912b3be268 --- /dev/null +++ b/src/patches/kernel/wandboard/imx/0005-Add-IMX6Q-AHCI-support.patch @@ -0,0 +1,85 @@ +From 8e890a259208dbe3aba6f46f7c3a213269d8f123 Mon Sep 17 00:00:00 2001 +From: Allen Ibara +Date: Tue, 4 Dec 2012 20:44:26 -0800 +Subject: [PATCH 2/5] Add IMX6Q AHCI support + +Adds ahci_platform bits to make AHCI work on sabrelite IMX6Q board. + +Signed-off-by: Allen Ibara +Signed-off-by: Robert Nelson +--- + +diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c +index 7a8a284..d324cdf 100644 +--- a/drivers/ata/ahci_platform.c ++++ b/drivers/ata/ahci_platform.c +@@ -23,6 +23,9 @@ + #include + #include + #include ++#include ++#include ++#include + #include "ahci.h" + + static void ahci_host_stop(struct ata_host *host); +@@ -30,6 +33,7 @@ static void ahci_host_stop(struct ata_host *host); + enum ahci_type { + AHCI, /* standard platform ahci */ + IMX53_AHCI, /* ahci on i.mx53 */ ++ IMX6Q_AHCI, /* ahci on i.mx6q */ + STRICT_AHCI, /* delayed DMA engine start */ + }; + +@@ -41,6 +45,9 @@ static struct platform_device_id ahci_devtype[] = { + .name = "imx53-ahci", + .driver_data = IMX53_AHCI, + }, { ++ .name = "imx6q-ahci", ++ .driver_data = IMX53_AHCI, ++ }, { + .name = "strict-ahci", + .driver_data = STRICT_AHCI, + }, { +@@ -86,12 +93,24 @@ static struct scsi_host_template ahci_platform_sht = { + AHCI_SHT("ahci_platform"), + }; + ++static const struct of_device_id ahci_of_match[] = { ++ { .compatible = "calxeda,hb-ahci", .data = &ahci_devtype[AHCI],}, ++ { .compatible = "fsl,imx6q-ahci", .data = &ahci_devtype[IMX6Q_AHCI],}, ++ { .compatible = "snps,spear-ahci", }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, ahci_of_match); ++ + static int ahci_probe(struct platform_device *pdev) + { + struct device *dev = &pdev->dev; + struct ahci_platform_data *pdata = dev_get_platdata(dev); ++ const struct of_device_id *of_id = ++ of_match_device(ahci_of_match, &pdev->dev); ++ const struct platform_device_id *id_entry = of_id->data; + const struct platform_device_id *id = platform_get_device_id(pdev); +- struct ata_port_info pi = ahci_port_info[id ? id->driver_data : 0]; ++ struct ata_port_info pi = ahci_port_info[id ? id->driver_data : \ ++ id_entry->driver_data]; + const struct ata_port_info *ppi[] = { &pi, NULL }; + struct ahci_host_priv *hpriv; + struct ata_host *host; +@@ -325,12 +344,6 @@ disable_unprepare_clk: + + static SIMPLE_DEV_PM_OPS(ahci_pm_ops, ahci_suspend, ahci_resume); + +-static const struct of_device_id ahci_of_match[] = { +- { .compatible = "snps,spear-ahci", }, +- {}, +-}; +-MODULE_DEVICE_TABLE(of, ahci_of_match); +- + static struct platform_driver ahci_driver = { + .probe = ahci_probe, + .remove = ata_platform_remove_one, +-- +1.7.10.4 + diff --git a/src/patches/kernel/wandboard/imx/0006-imx-Add-IMX53-AHCI-support.patch b/src/patches/kernel/wandboard/imx/0006-imx-Add-IMX53-AHCI-support.patch new file mode 100644 index 0000000000..1b96d8c3a6 --- /dev/null +++ b/src/patches/kernel/wandboard/imx/0006-imx-Add-IMX53-AHCI-support.patch @@ -0,0 +1,25 @@ +From 41cc1967181a833c3c5af30682ea85dd01c28ff4 Mon Sep 17 00:00:00 2001 +From: Robert Nelson +Date: Tue, 22 Jan 2013 22:21:03 -0600 +Subject: [PATCH 3/5] imx: Add IMX53 AHCI support + +Adds ahci_platform bits to make AHCI work on mx53 qsb board. + +Signed-off-by: Robert Nelson +--- + +diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c +index d324cdf..b01eeca 100644 +--- a/drivers/ata/ahci_platform.c ++++ b/drivers/ata/ahci_platform.c +@@ -95,6 +95,7 @@ static struct scsi_host_template ahci_platform_sht = { + + static const struct of_device_id ahci_of_match[] = { + { .compatible = "calxeda,hb-ahci", .data = &ahci_devtype[AHCI],}, ++ { .compatible = "fsl,imx53-ahci", .data = &ahci_devtype[IMX53_AHCI],}, + { .compatible = "fsl,imx6q-ahci", .data = &ahci_devtype[IMX6Q_AHCI],}, + { .compatible = "snps,spear-ahci", }, + {}, +-- +1.7.10.4 + diff --git a/src/patches/kernel/wandboard/imx/0007-imx6-enable-sata-clk-if-SATA_AHCI_PLATFORM.patch b/src/patches/kernel/wandboard/imx/0007-imx6-enable-sata-clk-if-SATA_AHCI_PLATFORM.patch new file mode 100644 index 0000000000..d85e3ffe79 --- /dev/null +++ b/src/patches/kernel/wandboard/imx/0007-imx6-enable-sata-clk-if-SATA_AHCI_PLATFORM.patch @@ -0,0 +1,33 @@ +From 765561c8c72a46c2177b20d730e061ab2ff8f970 Mon Sep 17 00:00:00 2001 +From: Paolo Pisati +Date: Thu, 31 Jan 2013 18:33:46 +0100 +Subject: [PATCH 4/5] SAUCE: imx6: enable sata clk if SATA_AHCI_PLATFORM + +Clock modifications in 24d340ac "ARM i.MX6: Fix ethernet PLL clocks" broke the +SATA clk, fix it. + +More info: http://www.spinics.net/lists/arm-kernel/msg221503.html + +Original-code-from: Shawn Guo +Signed-off-by: Paolo Pisati +--- + arch/arm/mach-imx/clk-imx6q.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c +index 4e3148c..38d707a 100644 +--- a/arch/arm/mach-imx/clk-imx6q.c ++++ b/arch/arm/mach-imx/clk-imx6q.c +@@ -568,6 +568,9 @@ int __init mx6q_clocks_init(void) + clk_prepare_enable(clk[usbphy2_gate]); + } + ++ if (IS_ENABLED(CONFIG_SATA_AHCI_PLATFORM)) ++ clk_prepare_enable(clk[sata_ref_100m]); ++ + /* Set initial power mode */ + imx6q_set_lpm(WAIT_CLOCKED); + +-- +1.7.10.4 + diff --git a/src/patches/kernel/wandboard/imx/0008-ARM-imx6q-update-the-sata-bits-definitions-of-gpr13.patch b/src/patches/kernel/wandboard/imx/0008-ARM-imx6q-update-the-sata-bits-definitions-of-gpr13.patch new file mode 100644 index 0000000000..6f6ea693df --- /dev/null +++ b/src/patches/kernel/wandboard/imx/0008-ARM-imx6q-update-the-sata-bits-definitions-of-gpr13.patch @@ -0,0 +1,150 @@ +From 371863a788db77e6092d69df17d8884cb0d94270 Mon Sep 17 00:00:00 2001 +From: Richard Zhu +Date: Wed, 24 Jul 2013 06:15:28 +0000 +Subject: [PATCH 1/2] ARM: imx6q: update the sata bits definitions of gpr13 + +Replace the SATA_PHY_# by the more readable definitons. + +tj: Being routed through libata branch to enable implementation of + ahci_imx. + +Signed-off-by: Richard Zhu +Acked-by: Shawn Guo +Signed-off-by: Tejun Heo +--- + include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 121 +++++++++++++++++++-------- + 1 file changed, 84 insertions(+), 37 deletions(-) + +diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h +index b1521e8..b6bdcd6 100644 +--- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h ++++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h +@@ -279,41 +279,88 @@ + #define IMX6Q_GPR13_CAN2_STOP_REQ BIT(29) + #define IMX6Q_GPR13_CAN1_STOP_REQ BIT(28) + #define IMX6Q_GPR13_ENET_STOP_REQ BIT(27) +-#define IMX6Q_GPR13_SATA_PHY_8_MASK (0x7 << 24) +-#define IMX6Q_GPR13_SATA_PHY_8_0_5_DB (0x0 << 24) +-#define IMX6Q_GPR13_SATA_PHY_8_1_0_DB (0x1 << 24) +-#define IMX6Q_GPR13_SATA_PHY_8_1_5_DB (0x2 << 24) +-#define IMX6Q_GPR13_SATA_PHY_8_2_0_DB (0x3 << 24) +-#define IMX6Q_GPR13_SATA_PHY_8_2_5_DB (0x4 << 24) +-#define IMX6Q_GPR13_SATA_PHY_8_3_0_DB (0x5 << 24) +-#define IMX6Q_GPR13_SATA_PHY_8_3_5_DB (0x6 << 24) +-#define IMX6Q_GPR13_SATA_PHY_8_4_0_DB (0x7 << 24) +-#define IMX6Q_GPR13_SATA_PHY_7_MASK (0x1f << 19) +-#define IMX6Q_GPR13_SATA_PHY_7_SATA1I (0x10 << 19) +-#define IMX6Q_GPR13_SATA_PHY_7_SATA1M (0x10 << 19) +-#define IMX6Q_GPR13_SATA_PHY_7_SATA1X (0x1a << 19) +-#define IMX6Q_GPR13_SATA_PHY_7_SATA2I (0x12 << 19) +-#define IMX6Q_GPR13_SATA_PHY_7_SATA2M (0x12 << 19) +-#define IMX6Q_GPR13_SATA_PHY_7_SATA2X (0x1a << 19) +-#define IMX6Q_GPR13_SATA_PHY_6_MASK (0x7 << 16) +-#define IMX6Q_GPR13_SATA_SPEED_MASK BIT(15) +-#define IMX6Q_GPR13_SATA_SPEED_1P5G 0x0 +-#define IMX6Q_GPR13_SATA_SPEED_3P0G BIT(15) +-#define IMX6Q_GPR13_SATA_PHY_5 BIT(14) +-#define IMX6Q_GPR13_SATA_PHY_4_MASK (0x7 << 11) +-#define IMX6Q_GPR13_SATA_PHY_4_16_16 (0x0 << 11) +-#define IMX6Q_GPR13_SATA_PHY_4_14_16 (0x1 << 11) +-#define IMX6Q_GPR13_SATA_PHY_4_12_16 (0x2 << 11) +-#define IMX6Q_GPR13_SATA_PHY_4_10_16 (0x3 << 11) +-#define IMX6Q_GPR13_SATA_PHY_4_9_16 (0x4 << 11) +-#define IMX6Q_GPR13_SATA_PHY_4_8_16 (0x5 << 11) +-#define IMX6Q_GPR13_SATA_PHY_3_MASK (0xf << 7) +-#define IMX6Q_GPR13_SATA_PHY_3_OFF 0x7 +-#define IMX6Q_GPR13_SATA_PHY_2_MASK (0x1f << 2) +-#define IMX6Q_GPR13_SATA_PHY_2_OFF 0x2 +-#define IMX6Q_GPR13_SATA_PHY_1_MASK (0x3 << 0) +-#define IMX6Q_GPR13_SATA_PHY_1_FAST (0x0 << 0) +-#define IMX6Q_GPR13_SATA_PHY_1_MED (0x1 << 0) +-#define IMX6Q_GPR13_SATA_PHY_1_SLOW (0x2 << 0) +- ++#define IMX6Q_GPR13_SATA_RX_EQ_VAL_MASK (0x7 << 24) ++#define IMX6Q_GPR13_SATA_RX_EQ_VAL_0_5_DB (0x0 << 24) ++#define IMX6Q_GPR13_SATA_RX_EQ_VAL_1_0_DB (0x1 << 24) ++#define IMX6Q_GPR13_SATA_RX_EQ_VAL_1_5_DB (0x2 << 24) ++#define IMX6Q_GPR13_SATA_RX_EQ_VAL_2_0_DB (0x3 << 24) ++#define IMX6Q_GPR13_SATA_RX_EQ_VAL_2_5_DB (0x4 << 24) ++#define IMX6Q_GPR13_SATA_RX_EQ_VAL_3_0_DB (0x5 << 24) ++#define IMX6Q_GPR13_SATA_RX_EQ_VAL_3_5_DB (0x6 << 24) ++#define IMX6Q_GPR13_SATA_RX_EQ_VAL_4_0_DB (0x7 << 24) ++#define IMX6Q_GPR13_SATA_RX_LOS_LVL_MASK (0x1f << 19) ++#define IMX6Q_GPR13_SATA_RX_LOS_LVL_SATA1I (0x10 << 19) ++#define IMX6Q_GPR13_SATA_RX_LOS_LVL_SATA1M (0x10 << 19) ++#define IMX6Q_GPR13_SATA_RX_LOS_LVL_SATA1X (0x1a << 19) ++#define IMX6Q_GPR13_SATA_RX_LOS_LVL_SATA2I (0x12 << 19) ++#define IMX6Q_GPR13_SATA_RX_LOS_LVL_SATA2M (0x12 << 19) ++#define IMX6Q_GPR13_SATA_RX_LOS_LVL_SATA2X (0x1a << 19) ++#define IMX6Q_GPR13_SATA_RX_DPLL_MODE_MASK (0x7 << 16) ++#define IMX6Q_GPR13_SATA_RX_DPLL_MODE_1P_1F (0x0 << 16) ++#define IMX6Q_GPR13_SATA_RX_DPLL_MODE_2P_2F (0x1 << 16) ++#define IMX6Q_GPR13_SATA_RX_DPLL_MODE_1P_4F (0x2 << 16) ++#define IMX6Q_GPR13_SATA_RX_DPLL_MODE_2P_4F (0x3 << 16) ++#define IMX6Q_GPR13_SATA_SPD_MODE_MASK BIT(15) ++#define IMX6Q_GPR13_SATA_SPD_MODE_1P5G 0x0 ++#define IMX6Q_GPR13_SATA_SPD_MODE_3P0G BIT(15) ++#define IMX6Q_GPR13_SATA_MPLL_SS_EN BIT(14) ++#define IMX6Q_GPR13_SATA_TX_ATTEN_MASK (0x7 << 11) ++#define IMX6Q_GPR13_SATA_TX_ATTEN_16_16 (0x0 << 11) ++#define IMX6Q_GPR13_SATA_TX_ATTEN_14_16 (0x1 << 11) ++#define IMX6Q_GPR13_SATA_TX_ATTEN_12_16 (0x2 << 11) ++#define IMX6Q_GPR13_SATA_TX_ATTEN_10_16 (0x3 << 11) ++#define IMX6Q_GPR13_SATA_TX_ATTEN_9_16 (0x4 << 11) ++#define IMX6Q_GPR13_SATA_TX_ATTEN_8_16 (0x5 << 11) ++#define IMX6Q_GPR13_SATA_TX_BOOST_MASK (0xf << 7) ++#define IMX6Q_GPR13_SATA_TX_BOOST_0_00_DB (0x0 << 7) ++#define IMX6Q_GPR13_SATA_TX_BOOST_0_37_DB (0x1 << 7) ++#define IMX6Q_GPR13_SATA_TX_BOOST_0_74_DB (0x2 << 7) ++#define IMX6Q_GPR13_SATA_TX_BOOST_1_11_DB (0x3 << 7) ++#define IMX6Q_GPR13_SATA_TX_BOOST_1_48_DB (0x4 << 7) ++#define IMX6Q_GPR13_SATA_TX_BOOST_1_85_DB (0x5 << 7) ++#define IMX6Q_GPR13_SATA_TX_BOOST_2_22_DB (0x6 << 7) ++#define IMX6Q_GPR13_SATA_TX_BOOST_2_59_DB (0x7 << 7) ++#define IMX6Q_GPR13_SATA_TX_BOOST_2_96_DB (0x8 << 7) ++#define IMX6Q_GPR13_SATA_TX_BOOST_3_33_DB (0x9 << 7) ++#define IMX6Q_GPR13_SATA_TX_BOOST_3_70_DB (0xa << 7) ++#define IMX6Q_GPR13_SATA_TX_BOOST_4_07_DB (0xb << 7) ++#define IMX6Q_GPR13_SATA_TX_BOOST_4_44_DB (0xc << 7) ++#define IMX6Q_GPR13_SATA_TX_BOOST_4_81_DB (0xd << 7) ++#define IMX6Q_GPR13_SATA_TX_BOOST_5_28_DB (0xe << 7) ++#define IMX6Q_GPR13_SATA_TX_BOOST_5_75_DB (0xf << 7) ++#define IMX6Q_GPR13_SATA_TX_LVL_MASK (0x1f << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_0_937_V (0x00 << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_0_947_V (0x01 << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_0_957_V (0x02 << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_0_966_V (0x03 << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_0_976_V (0x04 << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_0_986_V (0x05 << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_0_996_V (0x06 << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_1_005_V (0x07 << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_1_015_V (0x08 << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_1_025_V (0x09 << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_1_035_V (0x0a << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_1_045_V (0x0b << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_1_054_V (0x0c << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_1_064_V (0x0d << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_1_074_V (0x0e << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_1_084_V (0x0f << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_1_094_V (0x10 << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_1_104_V (0x11 << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_1_113_V (0x12 << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_1_123_V (0x13 << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_1_133_V (0x14 << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_1_143_V (0x15 << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_1_152_V (0x16 << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_1_162_V (0x17 << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_1_172_V (0x18 << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_1_182_V (0x19 << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_1_191_V (0x1a << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_1_201_V (0x1b << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_1_211_V (0x1c << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_1_221_V (0x1d << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_1_230_V (0x1e << 2) ++#define IMX6Q_GPR13_SATA_TX_LVL_1_240_V (0x1f << 2) ++#define IMX6Q_GPR13_SATA_MPLL_CLK_EN BIT(1) ++#define IMX6Q_GPR13_SATA_TX_EDGE_RATE BIT(0) + #endif /* __LINUX_IMX6Q_IOMUXC_GPR_H */ +-- +1.7.10.4 + diff --git a/src/patches/kernel/wandboard/imx/0009-ahci_imx-add-ahci-sata-support-on-imx-platforms.patch b/src/patches/kernel/wandboard/imx/0009-ahci_imx-add-ahci-sata-support-on-imx-platforms.patch new file mode 100644 index 0000000000..758476a6c4 --- /dev/null +++ b/src/patches/kernel/wandboard/imx/0009-ahci_imx-add-ahci-sata-support-on-imx-platforms.patch @@ -0,0 +1,316 @@ +From 093f4fdd74f29031d79be747c65b95fb16601a92 Mon Sep 17 00:00:00 2001 +From: Richard Zhu +Date: Wed, 24 Jul 2013 06:15:29 +0000 +Subject: [PATCH 2/2] ahci_imx: add ahci sata support on imx platforms + +imx6q contains one Synopsys AHCI SATA controller, But it can't share +ahci_platform driver with other controllers because there are some +misalignments of the generic AHCI controller - the bits definitions of +the HBA registers, the Vendor Specific registers, the AHCI PHY clock +and the AHCI signals adjustment window(GPR13 register). + + - CAP_SSS(bit20) of the HOST_CAP is writable, default value is '0', + should be configured to be '1' + + - bit0 (only one AHCI SATA port on imx6q) of the HOST_PORTS_IMPL + should be set to be '1'.(default 0) + + - One Vendor Specific register HOST_TIMER1MS(offset:0xe0) should be + configured regarding to the frequency of AHB bus clock. + + - Configurations of the AHCI PHY clock, and the signal parameters of + the GPR13 + +Setup its own ahci sata driver, contained the imx6q specific +initialized codes, re-use the generic ahci_platform driver, and keep +the generic ahci_platform driver clean as much as possible. + +tj: patch description reformatted + +Signed-off-by: Richard Zhu +Reviewed-by: Shawn Guo +Signed-off-by: Tejun Heo +--- + drivers/ata/Kconfig | 9 ++ + drivers/ata/Makefile | 1 + + drivers/ata/ahci_imx.c | 236 ++++++++++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 246 insertions(+) + create mode 100644 drivers/ata/ahci_imx.c + +diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig +index 80dc988..cbf7a16 100644 +--- a/drivers/ata/Kconfig ++++ b/drivers/ata/Kconfig +@@ -97,6 +97,15 @@ config SATA_AHCI_PLATFORM + + If unsure, say N. + ++config AHCI_IMX ++ tristate "Freescale i.MX AHCI SATA support" ++ depends on SATA_AHCI_PLATFORM ++ help ++ This option enables support for the Freescale i.MX SoC's ++ onboard AHCI SATA. ++ ++ If unsure, say N. ++ + config SATA_FSL + tristate "Freescale 3.0Gbps SATA support" + depends on FSL_SOC +diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile +index c04d0fd..46518c6 100644 +--- a/drivers/ata/Makefile ++++ b/drivers/ata/Makefile +@@ -10,6 +10,7 @@ obj-$(CONFIG_SATA_INIC162X) += sata_inic162x.o + obj-$(CONFIG_SATA_SIL24) += sata_sil24.o + obj-$(CONFIG_SATA_DWC) += sata_dwc_460ex.o + obj-$(CONFIG_SATA_HIGHBANK) += sata_highbank.o libahci.o ++obj-$(CONFIG_AHCI_IMX) += ahci_imx.o + + # SFF w/ custom DMA + obj-$(CONFIG_PDC_ADMA) += pdc_adma.o +diff --git a/drivers/ata/ahci_imx.c b/drivers/ata/ahci_imx.c +new file mode 100644 +index 0000000..58debb0 +--- /dev/null ++++ b/drivers/ata/ahci_imx.c +@@ -0,0 +1,236 @@ ++/* ++ * Freescale IMX AHCI SATA platform driver ++ * Copyright 2013 Freescale Semiconductor, Inc. ++ * ++ * based on the AHCI SATA platform driver by Jeff Garzik and Anton Vorontsov ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms and conditions of the GNU General Public License, ++ * version 2, as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program. If not, see . ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "ahci.h" ++ ++enum { ++ HOST_TIMER1MS = 0xe0, /* Timer 1-ms */ ++}; ++ ++struct imx_ahci_priv { ++ struct platform_device *ahci_pdev; ++ struct clk *sata_ref_clk; ++ struct clk *ahb_clk; ++ struct regmap *gpr; ++}; ++ ++static int imx6q_sata_init(struct device *dev, void __iomem *mmio) ++{ ++ int ret = 0; ++ unsigned int reg_val; ++ struct imx_ahci_priv *imxpriv = dev_get_drvdata(dev->parent); ++ ++ imxpriv->gpr = ++ syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr"); ++ if (IS_ERR(imxpriv->gpr)) { ++ dev_err(dev, "failed to find fsl,imx6q-iomux-gpr regmap\n"); ++ return PTR_ERR(imxpriv->gpr); ++ } ++ ++ ret = clk_prepare_enable(imxpriv->sata_ref_clk); ++ if (ret < 0) { ++ dev_err(dev, "prepare-enable sata_ref clock err:%d\n", ret); ++ return ret; ++ } ++ ++ /* ++ * set PHY Paremeters, two steps to configure the GPR13, ++ * one write for rest of parameters, mask of first write ++ * is 0x07fffffd, and the other one write for setting ++ * the mpll_clk_en. ++ */ ++ regmap_update_bits(imxpriv->gpr, 0x34, IMX6Q_GPR13_SATA_RX_EQ_VAL_MASK ++ | IMX6Q_GPR13_SATA_RX_LOS_LVL_MASK ++ | IMX6Q_GPR13_SATA_RX_DPLL_MODE_MASK ++ | IMX6Q_GPR13_SATA_SPD_MODE_MASK ++ | IMX6Q_GPR13_SATA_MPLL_SS_EN ++ | IMX6Q_GPR13_SATA_TX_ATTEN_MASK ++ | IMX6Q_GPR13_SATA_TX_BOOST_MASK ++ | IMX6Q_GPR13_SATA_TX_LVL_MASK ++ | IMX6Q_GPR13_SATA_TX_EDGE_RATE ++ , IMX6Q_GPR13_SATA_RX_EQ_VAL_3_0_DB ++ | IMX6Q_GPR13_SATA_RX_LOS_LVL_SATA2M ++ | IMX6Q_GPR13_SATA_RX_DPLL_MODE_2P_4F ++ | IMX6Q_GPR13_SATA_SPD_MODE_3P0G ++ | IMX6Q_GPR13_SATA_MPLL_SS_EN ++ | IMX6Q_GPR13_SATA_TX_ATTEN_9_16 ++ | IMX6Q_GPR13_SATA_TX_BOOST_3_33_DB ++ | IMX6Q_GPR13_SATA_TX_LVL_1_025_V); ++ regmap_update_bits(imxpriv->gpr, 0x34, IMX6Q_GPR13_SATA_MPLL_CLK_EN, ++ IMX6Q_GPR13_SATA_MPLL_CLK_EN); ++ usleep_range(100, 200); ++ ++ /* ++ * Configure the HWINIT bits of the HOST_CAP and HOST_PORTS_IMPL, ++ * and IP vendor specific register HOST_TIMER1MS. ++ * Configure CAP_SSS (support stagered spin up). ++ * Implement the port0. ++ * Get the ahb clock rate, and configure the TIMER1MS register. ++ */ ++ reg_val = readl(mmio + HOST_CAP); ++ if (!(reg_val & HOST_CAP_SSS)) { ++ reg_val |= HOST_CAP_SSS; ++ writel(reg_val, mmio + HOST_CAP); ++ } ++ reg_val = readl(mmio + HOST_PORTS_IMPL); ++ if (!(reg_val & 0x1)) { ++ reg_val |= 0x1; ++ writel(reg_val, mmio + HOST_PORTS_IMPL); ++ } ++ ++ reg_val = clk_get_rate(imxpriv->ahb_clk) / 1000; ++ writel(reg_val, mmio + HOST_TIMER1MS); ++ ++ return 0; ++} ++ ++static void imx6q_sata_exit(struct device *dev) ++{ ++ struct imx_ahci_priv *imxpriv = dev_get_drvdata(dev->parent); ++ ++ regmap_update_bits(imxpriv->gpr, 0x34, IMX6Q_GPR13_SATA_MPLL_CLK_EN, ++ !IMX6Q_GPR13_SATA_MPLL_CLK_EN); ++ clk_disable_unprepare(imxpriv->sata_ref_clk); ++} ++ ++static struct ahci_platform_data imx6q_sata_pdata = { ++ .init = imx6q_sata_init, ++ .exit = imx6q_sata_exit, ++}; ++ ++static const struct of_device_id imx_ahci_of_match[] = { ++ { .compatible = "fsl,imx6q-ahci", .data = &imx6q_sata_pdata}, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, imx_ahci_of_match); ++ ++static int imx_ahci_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct resource *mem, *irq, res[2]; ++ const struct of_device_id *of_id; ++ const struct ahci_platform_data *pdata = NULL; ++ struct imx_ahci_priv *imxpriv; ++ struct device *ahci_dev; ++ struct platform_device *ahci_pdev; ++ int ret; ++ ++ imxpriv = devm_kzalloc(dev, sizeof(*imxpriv), GFP_KERNEL); ++ if (!imxpriv) { ++ dev_err(dev, "can't alloc ahci_host_priv\n"); ++ return -ENOMEM; ++ } ++ ++ ahci_pdev = platform_device_alloc("ahci", -1); ++ if (!ahci_pdev) ++ return -ENODEV; ++ ++ ahci_dev = &ahci_pdev->dev; ++ ahci_dev->parent = dev; ++ ++ imxpriv->ahb_clk = devm_clk_get(dev, "ahb"); ++ if (IS_ERR(imxpriv->ahb_clk)) { ++ dev_err(dev, "can't get ahb clock.\n"); ++ ret = PTR_ERR(imxpriv->ahb_clk); ++ goto err_out; ++ } ++ ++ imxpriv->sata_ref_clk = devm_clk_get(dev, "sata_ref"); ++ if (IS_ERR(imxpriv->sata_ref_clk)) { ++ dev_err(dev, "can't get sata_ref clock.\n"); ++ ret = PTR_ERR(imxpriv->sata_ref_clk); ++ goto err_out; ++ } ++ ++ imxpriv->ahci_pdev = ahci_pdev; ++ platform_set_drvdata(pdev, imxpriv); ++ ++ of_id = of_match_device(imx_ahci_of_match, dev); ++ if (of_id) { ++ pdata = of_id->data; ++ } else { ++ ret = -EINVAL; ++ goto err_out; ++ } ++ ++ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); ++ if (!mem || !irq) { ++ dev_err(dev, "no mmio/irq resource\n"); ++ ret = -ENOMEM; ++ goto err_out; ++ } ++ ++ res[0] = *mem; ++ res[1] = *irq; ++ ++ ahci_dev->coherent_dma_mask = DMA_BIT_MASK(32); ++ ahci_dev->dma_mask = &ahci_dev->coherent_dma_mask; ++ ahci_dev->of_node = dev->of_node; ++ ++ ret = platform_device_add_resources(ahci_pdev, res, 2); ++ if (ret) ++ goto err_out; ++ ++ ret = platform_device_add_data(ahci_pdev, pdata, sizeof(*pdata)); ++ if (ret) ++ goto err_out; ++ ++ ret = platform_device_add(ahci_pdev); ++ if (ret) { ++err_out: ++ platform_device_put(ahci_pdev); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int imx_ahci_remove(struct platform_device *pdev) ++{ ++ struct imx_ahci_priv *imxpriv = platform_get_drvdata(pdev); ++ struct platform_device *ahci_pdev = imxpriv->ahci_pdev; ++ ++ platform_device_unregister(ahci_pdev); ++ return 0; ++} ++ ++static struct platform_driver imx_ahci_driver = { ++ .probe = imx_ahci_probe, ++ .remove = imx_ahci_remove, ++ .driver = { ++ .name = "ahci-imx", ++ .owner = THIS_MODULE, ++ .of_match_table = imx_ahci_of_match, ++ }, ++}; ++module_platform_driver(imx_ahci_driver); ++ ++MODULE_DESCRIPTION("Freescale i.MX AHCI SATA platform driver"); ++MODULE_AUTHOR("Richard Zhu "); ++MODULE_LICENSE("GPL"); ++MODULE_ALIAS("ahci:imx"); +-- +1.7.10.4 + diff --git a/src/patches/kernel/wandboard/imx/0010-ahci_imx-depend-on-CONFIG_MFD_SYSCON.patch b/src/patches/kernel/wandboard/imx/0010-ahci_imx-depend-on-CONFIG_MFD_SYSCON.patch new file mode 100644 index 0000000000..86e7d8f0cd --- /dev/null +++ b/src/patches/kernel/wandboard/imx/0010-ahci_imx-depend-on-CONFIG_MFD_SYSCON.patch @@ -0,0 +1,24 @@ +From: Tejun Heo +Subject: [PATCH] ahci_imx: depend on CONFIG_MFD_SYSCON + +ahci_imx makes use of regmap but the dependency wasn't specified in +Kconfig leading build failures if CONFIG_AHCI_IMX is enabled but +CONFIG_MFD_SYSCON is not. Add the Kconfig dependency. + +Signed-off-by: Tejun Heo +Reported-by: Stephen Rothwell +--- + drivers/ata/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/ata/Kconfig ++++ b/drivers/ata/Kconfig +@@ -99,7 +99,7 @@ config SATA_AHCI_PLATFORM + + config AHCI_IMX + tristate "Freescale i.MX AHCI SATA support" +- depends on SATA_AHCI_PLATFORM ++ depends on SATA_AHCI_PLATFORM && MFD_SYSCON + help + This option enables support for the Freescale i.MX SoC's + onboard AHCI SATA. -- 2.39.2