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Merge remote-tracking branch 'stevee/openvswitch-systemd'
[people/amarx/ipfire-3.x.git] / binutils / patches / binutils-2.22.52.0.2-pt-pax-flags-20120425.patch
CommitLineData
0f64d6ce
MT		 1--- binutils-2.22/bfd/elf-bfd.h
2+++ binutils-2.22/bfd/elf-bfd.h
3@@ -1577,6 +1577,9 @@ struct elf_obj_tdata
4 /* Segment flags for the PT_GNU_STACK segment. */
5 unsigned int stack_flags;
6
7+ /* Segment flags for the PT_PAX_FLAGS segment. */
8+ unsigned int pax_flags;
9+
10 /* Symbol version definitions in external objects. */
11 Elf_Internal_Verdef *verdef;
12
13--- binutils-2.22/bfd/elf.c
14+++ binutils-2.22/bfd/elf.c
15@@ -1158,6 +1158,7 @@ get_segment_type (unsigned int p_type)
16 case PT_GNU_EH_FRAME: pt = "EH_FRAME"; break;
17 case PT_GNU_STACK: pt = "STACK"; break;
18 case PT_GNU_RELRO: pt = "RELRO"; break;
19+ case PT_PAX_FLAGS: pt = "PAX_FLAGS"; break;
20 default: pt = NULL; break;
21 }
22 return pt;
23@@ -2477,6 +2478,9 @@ bfd_section_from_phdr (bfd *abfd, Elf_Internal_Phdr *hdr, int hdr_index)
24 case PT_GNU_RELRO:
25 return _bfd_elf_make_section_from_phdr (abfd, hdr, hdr_index, "relro");
26
27+ case PT_PAX_FLAGS:
28+ return _bfd_elf_make_section_from_phdr (abfd, hdr, hdr_index, "pax_flags");
29+
30 default:
31 /* Check for any processor-specific program segment types. */
32 bed = get_elf_backend_data (abfd);
33@@ -3551,6 +3555,11 @@ get_program_header_size (bfd *abfd, struct bfd_link_info *info)
34 ++segs;
35 }
36
37+ {
38+ /* We need a PT_PAX_FLAGS segment. */
39+ ++segs;
40+ }
41+
42 for (s = abfd->sections; s != NULL; s = s->next)
43 {
44 if ((s->flags & SEC_LOAD) != 0
45@@ -4153,6 +4162,20 @@ _bfd_elf_map_sections_to_segments (bfd *abfd, struct bfd_link_info *info)
46 }
47 }
48
49+ {
50+ amt = sizeof (struct elf_segment_map);
51+ m = bfd_zalloc (abfd, amt);
52+ if (m == NULL)
53+ goto error_return;
54+ m->next = NULL;
55+ m->p_type = PT_PAX_FLAGS;
56+ m->p_flags = elf_tdata (abfd)->pax_flags;
57+ m->p_flags_valid = 1;
58+
59+ *pm = m;
60+ pm = &m->next;
61+ }
62+
63 free (sections);
64 elf_tdata (abfd)->segment_map = mfirst;
65 }
66@@ -5417,7 +5440,8 @@ rewrite_elf_program_header (bfd *ibfd, bfd *obfd)
67 6. PT_TLS segment includes only SHF_TLS sections.
68 7. SHF_TLS sections are only in PT_TLS or PT_LOAD segments.
69 8. PT_DYNAMIC should not contain empty sections at the beginning
70- (with the possible exception of .dynamic). */
71+ (with the possible exception of .dynamic).
72+ 9. PT_PAX_FLAGS segments do not include any sections. */
73 #define IS_SECTION_IN_INPUT_SEGMENT(section, segment, bed) \
74 ((((segment->p_paddr \
75 ? IS_CONTAINED_BY_LMA (section, segment, segment->p_paddr) \
76@@ -5425,6 +5449,7 @@ rewrite_elf_program_header (bfd *ibfd, bfd *obfd)
77 && (section->flags & SEC_ALLOC) != 0) \
78 || IS_NOTE (segment, section)) \
79 && segment->p_type != PT_GNU_STACK \
80+ && segment->p_type != PT_PAX_FLAGS \
81 && (segment->p_type != PT_TLS \
82 || (section->flags & SEC_THREAD_LOCAL)) \
83 && (segment->p_type == PT_LOAD \
84--- binutils-2.22/bfd/elflink.c
85+++ binutils-2.22/bfd/elflink.c
86@@ -5545,16 +5545,30 @@ bfd_elf_size_dynamic_sections (bfd *output_bfd,
87 return TRUE;
88
89 bed = get_elf_backend_data (output_bfd);
90+
91+ elf_tdata (output_bfd)->pax_flags = PF_NORANDEXEC;
92+ if (info->execheap)
93+ elf_tdata (output_bfd)->pax_flags |= PF_NOMPROTECT;
94+ else if (info->noexecheap)
95+ elf_tdata (output_bfd)->pax_flags |= PF_MPROTECT;
96+
97 if (info->execstack)
98- elf_tdata (output_bfd)->stack_flags = PF_R | PF_W | PF_X;
99+ {
100+ elf_tdata (output_bfd)->stack_flags = PF_R | PF_W | PF_X;
101+ elf_tdata (output_bfd)->pax_flags |= PF_EMUTRAMP;
102+ }
103 else if (info->noexecstack)
104- elf_tdata (output_bfd)->stack_flags = PF_R | PF_W;
105+ {
106+ elf_tdata (output_bfd)->stack_flags = PF_R | PF_W;
107+ elf_tdata (output_bfd)->pax_flags |= PF_NOEMUTRAMP;
108+ }
109 else
110 {
111 bfd *inputobj;
112 asection *notesec = NULL;
113 int exec = 0;
114
115+ elf_tdata (output_bfd)->pax_flags |= PF_NOEMUTRAMP;
116 for (inputobj = info->input_bfds;
117 inputobj;
118 inputobj = inputobj->link_next)
119@@ -5567,7 +5581,11 @@ bfd_elf_size_dynamic_sections (bfd *output_bfd,
120 if (s)
121 {
122 if (s->flags & SEC_CODE)
123- exec = PF_X;
124+ {
125+ elf_tdata (output_bfd)->pax_flags &= ~PF_NOEMUTRAMP;
126+ elf_tdata (output_bfd)->pax_flags |= PF_EMUTRAMP;
127+ exec = PF_X;
128+ }
129 notesec = s;
130 }
131 else if (bed->default_execstack)
132--- binutils-2.22/binutils/readelf.c
133+++ binutils-2.22/binutils/readelf.c
134@@ -2740,6 +2740,7 @@ get_segment_type (unsigned long p_type)
135 return "GNU_EH_FRAME";
136 case PT_GNU_STACK: return "GNU_STACK";
137 case PT_GNU_RELRO: return "GNU_RELRO";
138+ case PT_PAX_FLAGS: return "PAX_FLAGS";
139
140 default:
141 if ((p_type >= PT_LOPROC) && (p_type <= PT_HIPROC))
142--- binutils-2.22/include/bfdlink.h
143+++ binutils-2.22/include/bfdlink.h
144@@ -322,6 +322,14 @@ struct bfd_link_info
145 /* TRUE if PT_GNU_RELRO segment should be created. */
146 unsigned int relro: 1;
147
148+ /* TRUE if PT_PAX_FLAGS segment should be created with PF_NOMPROTECT
149+ flags. */
150+ unsigned int execheap: 1;
151+
152+ /* TRUE if PT_PAX_FLAGS segment should be created with PF_MPROTECT
153+ flags. */
154+ unsigned int noexecheap: 1;
155+
156 /* TRUE if .eh_frame_hdr section and PT_GNU_EH_FRAME ELF segment
157 should be created. */
158 unsigned int eh_frame_hdr: 1;
159--- binutils-2.22/include/elf/common.h
160+++ binutils-2.22/include/elf/common.h
161@@ -429,6 +429,7 @@
162 #define PT_SUNW_EH_FRAME PT_GNU_EH_FRAME /* Solaris uses the same value */
163 #define PT_GNU_STACK (PT_LOOS + 0x474e551) /* Stack flags */
164 #define PT_GNU_RELRO (PT_LOOS + 0x474e552) /* Read-only after relocation */
165+#define PT_PAX_FLAGS (PT_LOOS + 0x5041580) /* PaX flags */
0c98d65a 166 #define PT_GNU_SHR (PT_LOOS + 0x474e554) /* Sharable segment */
0f64d6ce
MT		 167
168 /* Program segment permissions, in program header p_flags field. */
0f64d6ce
MT		 169@@ -439,6 +440,21 @@
170 #define PF_MASKOS 0x0FF00000 /* New value, Oct 4, 1999 Draft */
171 #define PF_MASKPROC 0xF0000000 /* Processor-specific reserved bits */
172
173+/* Flags to control PaX behavior. */
174+
175+#define PF_PAGEEXEC (1 << 4) /* Enable PAGEEXEC */
176+#define PF_NOPAGEEXEC (1 << 5) /* Disable PAGEEXEC */
177+#define PF_SEGMEXEC (1 << 6) /* Enable SEGMEXEC */
178+#define PF_NOSEGMEXEC (1 << 7) /* Disable SEGMEXEC */
179+#define PF_MPROTECT (1 << 8) /* Enable MPROTECT */
180+#define PF_NOMPROTECT (1 << 9) /* Disable MPROTECT */
181+#define PF_RANDEXEC (1 << 10) /* Enable RANDEXEC */
182+#define PF_NORANDEXEC (1 << 11) /* Disable RANDEXEC */
183+#define PF_EMUTRAMP (1 << 12) /* Enable EMUTRAMP */
184+#define PF_NOEMUTRAMP (1 << 13) /* Disable EMUTRAMP */
185+#define PF_RANDMMAP (1 << 14) /* Enable RANDMMAP */
186+#define PF_NORANDMMAP (1 << 15) /* Disable RANDMMAP */
187+
188 /* Values for section header, sh_type field. */
189
190 #define SHT_NULL 0 /* Section header table entry unused */
191--- binutils-2.22/ld/emultempl/elf32.em
192+++ binutils-2.22/ld/emultempl/elf32.em
193@@ -2285,6 +2285,16 @@ fragment <<EOF
194 link_info.noexecstack = TRUE;
195 link_info.execstack = FALSE;
196 }
197+ else if (strcmp (optarg, "execheap") == 0)
198+ {
199+ link_info.execheap = TRUE;
200+ link_info.noexecheap = FALSE;
201+ }
202+ else if (strcmp (optarg, "noexecheap") == 0)
203+ {
204+ link_info.noexecheap = TRUE;
205+ link_info.execheap = FALSE;
206+ }
207 EOF
208 if test x"$GENERATE_SHLIB_SCRIPT" = xyes; then
209 fragment <<EOF
210@@ -2368,6 +2378,8 @@ fragment <<EOF
211 -z defs Report unresolved symbols in object files.\n"));
212 fprintf (file, _("\
213 -z execstack Mark executable as requiring executable stack\n"));
214+ fprintf (file, _("\
215+ -z execheap Mark executable as requiring executable heap\n"));
216 EOF
217
218 if test x"$GENERATE_SHLIB_SCRIPT" = xyes; then
219@@ -2391,6 +2403,8 @@ fragment <<EOF
220 fragment <<EOF
221 fprintf (file, _("\
222 -z noexecstack Mark executable as not requiring executable stack\n"));
223+ fprintf (file, _("\
224+ -z noexecheap Mark executable as not requiring executable heap\n"));
225 EOF
226 if test x"$GENERATE_SHLIB_SCRIPT" = xyes; then
227 fragment <<EOF
228--- binutils-2.22/ld/ldgram.y
229+++ binutils-2.22/ld/ldgram.y
230@@ -1119,6 +1119,8 @@ phdr_type:
231 $$ = exp_intop (0x6474e550);
232 else if (strcmp (s, "PT_GNU_STACK") == 0)
233 $$ = exp_intop (0x6474e551);
234+ else if (strcmp (s, "PT_PAX_FLAGS") == 0)
235+ $$ = exp_intop (0x65041580);
236 else
237 {
238 einfo (_("\
239--- binutils-2.22/ld/testsuite/ld-alpha/tlsbin.rd
240+++ binutils-2.22/ld/testsuite/ld-alpha/tlsbin.rd
241@@ -35,13 +35,14 @@ There are [0-9]+ program headers, starting at offset [0-9]+
242
243 Program Headers:
244 Type +Offset +VirtAddr +PhysAddr +FileSiz +MemSiz +Flg Align
245- PHDR +0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x0+150 R E 0x8
246+ PHDR +0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x0+188 R E 0x8
247 INTERP +0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ R +0x1
248 .*Requesting program interpreter.*
249 LOAD +0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ R E 0x10000
250 LOAD +0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ RWE 0x10000
251 DYNAMIC +0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ RW +0x8
252 TLS +0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ R +0x4
253+ +PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
254 #...
255
256 Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 3 entries:
257--- binutils-2.22/ld/testsuite/ld-alpha/tlsbinr.rd
258+++ binutils-2.22/ld/testsuite/ld-alpha/tlsbinr.rd
259@@ -42,6 +42,7 @@ Program Headers:
260 +LOAD +0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ RWE 0x10000
261 +DYNAMIC +0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ RW +0x8
262 +TLS +0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ R +0x4
263+ +PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
264 #...
265
266 Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 2 entries:
267--- binutils-2.22/ld/testsuite/ld-alpha/tlspic.rd
268+++ binutils-2.22/ld/testsuite/ld-alpha/tlspic.rd
269@@ -38,6 +38,7 @@ Program Headers:
270 +LOAD +0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ RWE 0x10000
271 +DYNAMIC +0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ RW +0x8
272 +TLS +0x0+10e0 0x0+110e0 0x0+110e0 0x0+60 0x0+80 R +0x4
273+ +PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
274 #...
275
276 Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 7 entries:
277--- binutils-2.22/ld/testsuite/ld-elf/eh1.d
278+++ binutils-2.22/ld/testsuite/ld-elf/eh1.d
279@@ -22,11 +22,11 @@ Contents of the .eh_frame section:
280 DW_CFA_nop
281 DW_CFA_nop
282
283-00000018 0000001c 0000001c FDE cie=00000000 pc=00400078..00400078
284- DW_CFA_advance_loc: 0 to 00400078
285+00000018 0000001c 0000001c FDE cie=00000000 pc=([0-9a-f]+)..\1
286+ DW_CFA_advance_loc: 0 to [0-9a-f]+
287 DW_CFA_def_cfa_offset: 16
288 DW_CFA_offset: r6 \(rbp\) at cfa-16
289- DW_CFA_advance_loc: 0 to 00400078
290+ DW_CFA_advance_loc: 0 to [0-9a-f]+
291 DW_CFA_def_cfa_register: r6 \(rbp\)
292
293 00000038 ZERO terminator
294--- binutils-2.22/ld/testsuite/ld-elf/eh2.d
295+++ binutils-2.22/ld/testsuite/ld-elf/eh2.d
296@@ -22,11 +22,11 @@ Contents of the .eh_frame section:
297 DW_CFA_nop
298 DW_CFA_nop
299
300-00000018 0000001c 0000001c FDE cie=00000000 pc=00400078..00400078
301- DW_CFA_advance_loc: 0 to 00400078
302+00000018 0000001c 0000001c FDE cie=00000000 pc=([0-9a-f]+)..\1
303+ DW_CFA_advance_loc: 0 to [0-9a-f]+
304 DW_CFA_def_cfa_offset: 16
305 DW_CFA_offset: r6 \(rbp\) at cfa-16
306- DW_CFA_advance_loc: 0 to 00400078
307+ DW_CFA_advance_loc: 0 to [0-9a-f]+
308 DW_CFA_def_cfa_register: r6 \(rbp\)
309
310 00000038 ZERO terminator
311--- binutils-2.22/ld/testsuite/ld-elf/eh3.d
312+++ binutils-2.22/ld/testsuite/ld-elf/eh3.d
313@@ -22,11 +22,11 @@ Contents of the .eh_frame section:
314 DW_CFA_nop
315 DW_CFA_nop
316
317-00000018 0000001c 0000001c FDE cie=00000000 pc=00400078..00400078
318- DW_CFA_advance_loc: 0 to 00400078
319+00000018 0000001c 0000001c FDE cie=00000000 pc=([0-9a-f]+)..\1
320+ DW_CFA_advance_loc: 0 to [0-9a-f]+
321 DW_CFA_def_cfa_offset: 16
322 DW_CFA_offset: r6 \(rbp\) at cfa-16
323- DW_CFA_advance_loc: 0 to 00400078
324+ DW_CFA_advance_loc: 0 to [0-9a-f]+
325 DW_CFA_def_cfa_register: r6 \(rbp\)
326
327 00000038 ZERO terminator
328--- binutils-2.22/ld/testsuite/ld-elf/orphan-region.d
329+++ binutils-2.22/ld/testsuite/ld-elf/orphan-region.d
330@@ -15,7 +15,9 @@
331 Program Headers:
332 Type.*
333 LOAD[ \t]+0x[0-9a-f]+ 0x0*40000000 0x0*40000000 0x[0-9a-f]+ 0x[0-9a-f]+ RWE 0x[0-9a-f]+
334+ +PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
335
336 Section to Segment mapping:
337 Segment Sections...
338 00 .text .rodata .moredata *
339+ 01 +
340--- binutils-2.22/ld/testsuite/ld-i386/tlsbin.rd
341+++ binutils-2.22/ld/testsuite/ld-i386/tlsbin.rd
342@@ -44,6 +44,7 @@ Program Headers:
343 +LOAD.*
344 +DYNAMIC.*
345 +TLS +0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x0+60 0x0+a0 R +0x1000
346+ +PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
347
348 Section to Segment mapping:
349 +Segment Sections...
350@@ -53,6 +54,7 @@ Program Headers:
351 +03 +.tdata .dynamic .got .got.plt *
352 +04 +.dynamic *
353 +05 +.tdata .tbss *
354+ +06 +
355
356 Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains 9 entries:
357 Offset +Info +Type +Sym.Value +Sym. Name
358--- binutils-2.22/ld/testsuite/ld-i386/tlsbindesc.rd
359+++ binutils-2.22/ld/testsuite/ld-i386/tlsbindesc.rd
360@@ -42,6 +42,7 @@ Program Headers:
361 +LOAD.*
362 +DYNAMIC.*
363 +TLS +0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x0+60 0x0+a0 R +0x1000
364+ +PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
365
366 Section to Segment mapping:
367 +Segment Sections...
368@@ -51,6 +52,7 @@ Program Headers:
369 +03 +.tdata .dynamic .got .got.plt *
370 +04 +.dynamic *
371 +05 +.tdata .tbss *
372+ +06 +
373
374 Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains 9 entries:
375 Offset +Info +Type +Sym.Value +Sym. Name
376--- binutils-2.22/ld/testsuite/ld-i386/tlsdesc.rd
377+++ binutils-2.22/ld/testsuite/ld-i386/tlsdesc.rd
378@@ -39,6 +39,7 @@ Program Headers:
379 +LOAD.*
380 +DYNAMIC.*
381 +TLS +0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x0+60 0x0+80 R +0x1
382+ +PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
383
384 Section to Segment mapping:
385 +Segment Sections...
386@@ -46,6 +47,7 @@ Program Headers:
387 +01 +.tdata .dynamic .got .got.plt *
388 +02 +.dynamic *
389 +03 +.tdata .tbss *
390+ +04 +
391
392 Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains 20 entries:
393 Offset +Info +Type +Sym.Value +Sym. Name
0f64d6ce
MT		 394--- binutils-2.22/ld/testsuite/ld-i386/tlsgdesc.rd
395+++ binutils-2.22/ld/testsuite/ld-i386/tlsgdesc.rd
396@@ -36,12 +36,14 @@ Program Headers:
397 +LOAD.*
398 +LOAD.*
399 +DYNAMIC.*
400+ +PAX_FLAGS.*
401
402 Section to Segment mapping:
403 +Segment Sections...
404 +00 +.hash .dynsym .dynstr .rel.dyn .rel.plt .plt .text *
405 +01 +.dynamic .got .got.plt *
406 +02 +.dynamic *
407+ +03 +
408
409 Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains 8 entries:
410 Offset +Info +Type +Sym.Value +Sym. Name
411--- binutils-2.22/ld/testsuite/ld-i386/tlsnopic.rd
412+++ binutils-2.22/ld/testsuite/ld-i386/tlsnopic.rd
413@@ -37,6 +37,7 @@ Program Headers:
414 +LOAD.*
415 +DYNAMIC.*
416 +TLS +0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x0+ 0x0+24 R +0x1
417+ +PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
418
419 Section to Segment mapping:
420 +Segment Sections...
421@@ -44,6 +45,7 @@ Program Headers:
422 +01 +.dynamic .got .got.plt *
423 +02 +.dynamic *
424 +03 +.tbss *
425+ +04 +
426
427 Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains 20 entries:
428 Offset +Info +Type +Sym.Value +Sym. Name
429--- binutils-2.22/ld/testsuite/ld-i386/tlspic.rd
430+++ binutils-2.22/ld/testsuite/ld-i386/tlspic.rd
431@@ -40,6 +40,7 @@ Program Headers:
432 +LOAD.*
433 +DYNAMIC.*
434 +TLS +0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x0+60 0x0+80 R +0x1
435+ +PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
436
437 Section to Segment mapping:
438 +Segment Sections...
439@@ -47,6 +48,7 @@ Program Headers:
440 +01 +.tdata .dynamic .got .got.plt *
441 +02 +.dynamic *
442 +03 +.tdata .tbss *
443+ +04 +
444
445 Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains 26 entries:
446 Offset +Info +Type +Sym.Value +Sym. Name
447--- binutils-2.22/ld/testsuite/ld-ia64/merge1.d
448+++ binutils-2.22/ld/testsuite/ld-ia64/merge1.d
449@@ -4,7 +4,7 @@
450 #objdump: -d
451
452 #...
453-0+1e0 <.text>:
454+[a-f0-9]+ <.text>:
455 [ ]*[a-f0-9]+: 0b 60 80 02 00 24 \[MMI\] addl r12=32,r1;;
456 [ ]*[a-f0-9]+: c0 c0 04 00 48 00 addl r12=24,r1
457 [ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
458--- binutils-2.22/ld/testsuite/ld-ia64/merge2.d
459+++ binutils-2.22/ld/testsuite/ld-ia64/merge2.d
460@@ -4,7 +4,7 @@
461 #objdump: -d
462
463 #...
464-0+1e0 <.text>:
465+[a-f0-9]+ <.text>:
466 [ ]*[a-f0-9]+: 0b 60 80 02 00 24 \[MMI\] addl r12=32,r1;;
467 [ ]*[a-f0-9]+: c0 c0 04 00 48 00 addl r12=24,r1
468 [ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
469--- binutils-2.22/ld/testsuite/ld-ia64/merge3.d
470+++ binutils-2.22/ld/testsuite/ld-ia64/merge3.d
471@@ -4,7 +4,7 @@
472 #objdump: -d
473
474 #...
475-0+210 <.text>:
476+[a-f0-9]+ <.text>:
477 [ ]*[a-f0-9]+: 0b 60 80 02 00 24 \[MMI\] addl r12=32,r1;;
478 [ ]*[a-f0-9]+: c0 40 05 00 48 00 addl r12=40,r1
479 [ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
480--- binutils-2.22/ld/testsuite/ld-ia64/merge4.d
481+++ binutils-2.22/ld/testsuite/ld-ia64/merge4.d
482@@ -4,7 +4,7 @@
483 #objdump: -d
484
485 #...
486-0+240 <.text>:
487+[a-f0-9]+ <.text>:
488 [ ]*[a-f0-9]+: 0b 60 80 02 00 24 \[MMI\] addl r12=32,r1;;
489 [ ]*[a-f0-9]+: c0 40 05 00 48 00 addl r12=40,r1
490 [ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
491--- binutils-2.22/ld/testsuite/ld-ia64/merge5.d
492+++ binutils-2.22/ld/testsuite/ld-ia64/merge5.d
493@@ -4,7 +4,7 @@
494 #objdump: -d
495
496 #...
497-0+270 <.text>:
498+[a-f0-9]+ <.text>:
499 [ ]*[a-f0-9]+: 0b 60 80 02 00 24 \[MMI\] addl r12=32,r1;;
500 [ ]*[a-f0-9]+: c0 40 05 00 48 00 addl r12=40,r1
501 [ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
502--- binutils-2.22/ld/testsuite/ld-ia64/tlsbin.rd
503+++ binutils-2.22/ld/testsuite/ld-ia64/tlsbin.rd
504@@ -36,13 +36,14 @@ There are [0-9]+ program headers, starting at offset [0-9]+
505
506 Program Headers:
507 +Type +Offset +VirtAddr +PhysAddr +FileSiz +MemSiz +Flg Align
508- +PHDR +0x0+40 0x40+40 0x40+40 0x0+188 0x0+188 R E 0x8
509- +INTERP +0x0+1c8 0x40+1c8 0x40+1c8 0x[0-9a-f]+ 0x[0-9a-f]+ R +0x1
510+ +PHDR +0x0+40 0x40+40 0x40+40 (0x[0-9a-f]+) \1 R E 0x8
511+ +INTERP +0x0+([0-9a-f]+) (0x40+\1) \2 0x[0-9a-f]+ 0x[0-9a-f]+ R +0x1
512 .*Requesting program interpreter.*
513 +LOAD +0x0+ 0x40+ 0x40+ 0x0+1[0-9a-f]+ 0x0+1[0-9a-f]+ R E 0x10000
514 +LOAD +0x0+1[0-9a-f]+ 0x60+1[0-9a-f]+ 0x60+1[0-9a-f]+ 0x0+0[0-9a-f]+ 0x0+0[0-9a-f]+ RW +0x10000
515 +DYNAMIC +0x0+1[0-9a-f]+ 0x60+1[0-9a-f]+ 0x60+1[0-9a-f]+ 0x0+150 0x0+150 RW +0x8
516 +TLS +0x0+1[0-9a-f]+ 0x60+1[0-9a-f]+ 0x60+1[0-9a-f]+ 0x0+60 0x0+a0 R +0x4
517+ +PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
518 +IA_64_UNWIND .* R +0x8
519 #...
520
521--- binutils-2.22/ld/testsuite/ld-ia64/tlspic.rd
522+++ binutils-2.22/ld/testsuite/ld-ia64/tlspic.rd
523@@ -40,6 +40,7 @@ Program Headers:
524 +LOAD +0x0+1[0-9a-f]+ 0x0+11[0-9a-f]+ 0x0+11[0-9a-f]+ 0x0+0[0-9a-f]+ 0x0+0[0-9a-f]+ RW +0x10000
525 +DYNAMIC +0x0+1[0-9a-f]+ 0x0+11[0-9a-f]+ 0x0+11[0-9a-f]+ 0x0+140 0x0+140 RW +0x8
526 +TLS +0x0+1[0-9a-f]+ 0x0+11[0-9a-f]+ 0x0+11[0-9a-f]+ 0x0+60 0x0+80 R +0x4
527+ +PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
528 +IA_64_UNWIND +0x0+1[0-9a-f]+ 0x0+1[0-9a-f]+ 0x0+1[0-9a-f]+ 0x0+18 0x0+18 R +0x8
529 #...
530
531--- binutils-2.22/ld/testsuite/ld-mips-elf/multi-got-no-shared.d
532+++ binutils-2.22/ld/testsuite/ld-mips-elf/multi-got-no-shared.d
533@@ -8,9 +8,9 @@
534 .*: +file format.*
535
536 Disassembly of section \.text:
537-004000b0 <[^>]*> 3c1c0043 lui gp,0x43
538-004000b4 <[^>]*> 279c9ff0 addiu gp,gp,-24592
539-004000b8 <[^>]*> afbc0008 sw gp,8\(sp\)
540+004000d0 <[^>]*> 3c1c0043 lui gp,0x43
541+004000d4 <[^>]*> 279c9ff0 addiu gp,gp,-24592
542+004000d8 <[^>]*> afbc0008 sw gp,8\(sp\)
543 #...
544 00408d60 <[^>]*> 3c1c0043 lui gp,0x43
545 00408d64 <[^>]*> 279c2c98 addiu gp,gp,11416
546--- binutils-2.22/ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.sd
547+++ binutils-2.22/ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.sd
548@@ -1,7 +1,7 @@
549
550 Elf file type is DYN \(Shared object file\)
551 Entry point .*
552-There are 5 program headers, starting at offset .*
553+There are [0-9] program headers, starting at offset .*
554
555 Program Headers:
556 * Type * Offset * VirtAddr * PhysAddr * FileSiz * MemSiz * Flg * Align
557@@ -9,6 +9,7 @@ Program Headers:
558 * LOAD * [^ ]+ * 0x0+00000 * 0x0+00000 [^ ]+ * [^ ]+ * R E * 0x.*
559 * LOAD * [^ ]+ * 0x0+10000 * 0x0+10000 [^ ]+ * [^ ]+ * RW * 0x.*
560 * DYNAMIC * [^ ]+ * 0x0+00400 * 0x0+00400 .*
561+ * PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
562 * NULL * .*
563
564 *Section to Segment mapping:
565@@ -18,3 +19,4 @@ Program Headers:
566 *0*2 * \.data \.got *
567 *0*3 * \.dynamic *
568 *0*4 *
569+ *0*5 *
570--- binutils-2.22/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.sd
571+++ binutils-2.22/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.sd
572@@ -1,7 +1,7 @@
573
574 Elf file type is EXEC \(Executable file\)
575 Entry point 0x44000
576-There are 8 program headers, starting at offset .*
577+There are [0-9] program headers, starting at offset .*
578
579 Program Headers:
580 * Type * Offset * VirtAddr * PhysAddr * FileSiz * MemSiz * Flg * Align
581@@ -13,6 +13,7 @@ Program Headers:
582 * LOAD * [^ ]+ * 0x0+80000 * 0x0+80000 [^ ]+ * [^ ]+ * RW * 0x.*
583 * LOAD * [^ ]+ * 0x0+a0000 * 0x0+a0000 [^ ]+ * [^ ]+ * RW * 0x.*
584 * DYNAMIC * [^ ]+ * 0x0+42000 * 0x0+42000 .*
585+ * PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
586 * NULL * .*
587
588 *Section to Segment mapping:
589@@ -25,3 +26,4 @@ Program Headers:
590 *0*5 *\.got \.data *
591 *0*6 *\.dynamic *
592 *0*7 *
593+ *0*8 *
594--- binutils-2.22/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.sd
595+++ binutils-2.22/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.sd
596@@ -1,7 +1,7 @@
597
598 Elf file type is EXEC \(Executable file\)
599 Entry point 0x44000
600-There are 8 program headers, starting at offset .*
601+There are [0-9] program headers, starting at offset .*
602
603 Program Headers:
604 * Type * Offset * VirtAddr * PhysAddr * FileSiz * MemSiz * Flg * Align
605@@ -13,6 +13,7 @@ Program Headers:
606 * LOAD * [^ ]+ * 0x0+80000 * 0x0+80000 [^ ]+ * [^ ]+ * RW * 0x.*
607 * LOAD * [^ ]+ * 0x0+a0000 * 0x0+a0000 [^ ]+ * [^ ]+ * RW * 0x.*
608 * DYNAMIC * [^ ]+ * 0x0+42000 * 0x0+42000 .*
609+ * PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
610 * NULL * .*
611
612 *Section to Segment mapping:
613@@ -25,3 +26,4 @@ Program Headers:
614 *0*5 * \.got \.data \.bss *
615 *0*6 * \.dynamic *
616 *0*7 *
617+ *0*8 *
618--- binutils-2.22/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.sd
619+++ binutils-2.22/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.sd
620@@ -1,7 +1,7 @@
621
622 Elf file type is EXEC \(Executable file\)
623 Entry point 0x44000
624-There are 8 program headers, starting at offset .*
625+There are [0-9] program headers, starting at offset .*
626
627 Program Headers:
628 * Type * Offset * VirtAddr * PhysAddr * FileSiz * MemSiz * Flg * Align
629@@ -13,6 +13,7 @@ Program Headers:
630 * LOAD * [^ ]+ * 0x0+80000 * 0x0+80000 [^ ]+ * [^ ]+ * RW * 0x.*
631 * LOAD * [^ ]+ * 0x0+a0000 * 0x0+a0000 [^ ]+ * [^ ]+ * RW * 0x.*
632 * DYNAMIC * [^ ]+ * 0x0+42000 * 0x0+42000 .*
633+ * PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
634 * NULL * .*
635
636 *Section to Segment mapping:
637@@ -25,3 +26,4 @@ Program Headers:
638 *0*5 * \.got \.data \.bss *
639 *0*6 * \.dynamic *
640 *0*7 *
641+ *0*8 *
642--- binutils-2.22/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.sd
643+++ binutils-2.22/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.sd
644@@ -1,7 +1,7 @@
645
646 Elf file type is EXEC \(Executable file\)
647 Entry point 0x44000
648-There are 8 program headers, starting at offset .*
649+There are [0-9] program headers, starting at offset .*
650
651 Program Headers:
652 * Type * Offset * VirtAddr * PhysAddr * FileSiz * MemSiz * Flg * Align
653@@ -13,6 +13,7 @@ Program Headers:
654 * LOAD * [^ ]+ * 0x0+80000 * 0x0+80000 [^ ]+ * [^ ]+ * RW * 0x.*
655 * LOAD * [^ ]+ * 0x0+a0000 * 0x0+a0000 [^ ]+ * [^ ]+ * RW * 0x.*
656 * DYNAMIC * [^ ]+ * 0x0+42000 * 0x0+42000 .*
657+ * PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
658 * NULL * .*
659
660 *Section to Segment mapping:
661@@ -25,3 +26,4 @@ Program Headers:
662 *0*5 * \.got \.data \.bss *
663 *0*6 * \.dynamic *
664 *0*7 *
665+ *0*8 *
666--- binutils-2.22/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.sd
667+++ binutils-2.22/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.sd
668@@ -1,7 +1,7 @@
669
670 Elf file type is EXEC \(Executable file\)
671 Entry point 0x44000
672-There are 7 program headers, starting at offset .*
673+There are [0-9] program headers, starting at offset .*
674
675 Program Headers:
676 * Type * Offset * VirtAddr * PhysAddr * FileSiz * MemSiz * Flg * Align
677@@ -12,6 +12,7 @@ Program Headers:
678 * LOAD * [^ ]+ * 0x0+80000 * 0x0+80000 [^ ]+ * [^ ]+ * RW * 0x.*
679 * LOAD * [^ ]+ * 0x0+a0000 * 0x0+a0000 [^ ]+ * [^ ]+ * RW * 0x.*
680 * DYNAMIC * [^ ]+ * 0x0+42000 * 0x0+42000 .*
681+ * PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
682 * NULL * .*
683
684 *Section to Segment mapping:
685@@ -23,3 +24,4 @@ Program Headers:
686 *0*4 * \.got \.data \.bss *
687 *0*5 * \.dynamic *
688 *0*6 *
689+ *0*7 *
690--- binutils-2.22/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.sd
691+++ binutils-2.22/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.sd
692@@ -1,7 +1,7 @@
693
694 Elf file type is EXEC \(Executable file\)
695 Entry point 0x44000
696-There are 8 program headers, starting at offset .*
697+There are [0-9] program headers, starting at offset .*
698
699 Program Headers:
700 * Type * Offset * VirtAddr * PhysAddr * FileSiz * MemSiz * Flg * Align
701@@ -13,6 +13,7 @@ Program Headers:
702 * LOAD * [^ ]+ * 0x0+80000 * 0x0+80000 [^ ]+ * [^ ]+ * RW * 0x.*
703 * LOAD * [^ ]+ * 0x0+a0000 * 0x0+a0000 [^ ]+ * [^ ]+ * RW * 0x.*
704 * DYNAMIC * [^ ]+ * 0x0+42000 * 0x0+42000 .*
705+ * PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
706 * NULL * .*
707
708 *Section to Segment mapping:
709@@ -25,3 +26,4 @@ Program Headers:
710 *0*5 * \.got \.data \.bss *
711 *0*6 * \.dynamic *
712 *0*7 *
713+ *0*8 *
714--- binutils-2.22/ld/testsuite/ld-mips-elf/rel32-n32.d
715+++ binutils-2.22/ld/testsuite/ld-mips-elf/rel32-n32.d
716@@ -10,6 +10,6 @@ Relocation section '.rel.dyn' at offset .* contains 2 entries:
717 [0-9a-f ]+R_MIPS_REL32
718
719 Hex dump of section '.text':
720- 0x000002e0 00000000 00000000 00000000 00000000 ................
721- 0x000002f0 000002f0 00000000 00000000 00000000 ................
722 0x00000300 00000000 00000000 00000000 00000000 ................
723+ 0x00000310 00000310 00000000 00000000 00000000 ................
724+ 0x00000320 00000000 00000000 00000000 00000000 ................
725--- binutils-2.22/ld/testsuite/ld-mips-elf/rel32-o32.d
726+++ binutils-2.22/ld/testsuite/ld-mips-elf/rel32-o32.d
727@@ -10,6 +10,6 @@ Relocation section '.rel.dyn' at offset .* contains 2 entries:
728 [0-9a-f ]+R_MIPS_REL32
729
730 Hex dump of section '.text':
731- 0x000002e0 00000000 00000000 00000000 00000000 ................
732- 0x000002f0 000002f0 00000000 00000000 00000000 ................
733 0x00000300 00000000 00000000 00000000 00000000 ................
734+ 0x00000310 00000310 00000000 00000000 00000000 ................
735+ 0x00000320 00000000 00000000 00000000 00000000 ................
736--- binutils-2.22/ld/testsuite/ld-mips-elf/rel64.d
737+++ binutils-2.22/ld/testsuite/ld-mips-elf/rel64.d
738@@ -14,6 +14,6 @@ Relocation section '.rel.dyn' at offset .* contains 2 entries:
739 +Type3: R_MIPS_NONE
740
741 Hex dump of section '.text':
742- 0x00000450 00000000 00000000 00000000 00000000 ................
743- 0x00000460 00000000 00000460 00000000 00000000 ................
744- 0x00000470 00000000 00000000 00000000 00000000 ................
745+ 0x00000490 00000000 00000000 00000000 00000000 ................
746+ 0x000004a0 00000000 000004a0 00000000 00000000 ................
747+ 0x000004b0 00000000 00000000 00000000 00000000 ................
748--- binutils-2.22/ld/testsuite/ld-mips-elf/tlsbin-o32.d
749+++ binutils-2.22/ld/testsuite/ld-mips-elf/tlsbin-o32.d
750@@ -2,42 +2,42 @@
751
752 Disassembly of section .text:
753
754-004000d0 <__start>:
755- 4000d0: 3c1c0fc0 lui gp,0xfc0
756- 4000d4: 279c7f30 addiu gp,gp,32560
757- 4000d8: 0399e021 addu gp,gp,t9
758- 4000dc: 27bdfff0 addiu sp,sp,-16
759- 4000e0: afbe0008 sw s8,8\(sp\)
760- 4000e4: 03a0f021 move s8,sp
761- 4000e8: afbc0000 sw gp,0\(sp\)
762- 4000ec: 8f998018 lw t9,-32744\(gp\)
763- 4000f0: 27848028 addiu a0,gp,-32728
764- 4000f4: 0320f809 jalr t9
765- 4000f8: 00000000 nop
766- 4000fc: 8fdc0000 lw gp,0\(s8\)
767- 400100: 00000000 nop
768- 400104: 8f998018 lw t9,-32744\(gp\)
769- 400108: 27848020 addiu a0,gp,-32736
770- 40010c: 0320f809 jalr t9
771- 400110: 00000000 nop
772- 400114: 8fdc0000 lw gp,0\(s8\)
773- 400118: 00401021 move v0,v0
774- 40011c: 3c030000 lui v1,0x0
775- 400120: 24638000 addiu v1,v1,-32768
776- 400124: 00621821 addu v1,v1,v0
777- 400128: 7c02283b rdhwr v0,\$5
778- 40012c: 8f83801c lw v1,-32740\(gp\)
779- 400130: 00000000 nop
780- 400134: 00621821 addu v1,v1,v0
781- 400138: 7c02283b rdhwr v0,\$5
782- 40013c: 3c030000 lui v1,0x0
783- 400140: 24639004 addiu v1,v1,-28668
784- 400144: 00621821 addu v1,v1,v0
785- 400148: 03c0e821 move sp,s8
786- 40014c: 8fbe0008 lw s8,8\(sp\)
787- 400150: 03e00008 jr ra
788- 400154: 27bd0010 addiu sp,sp,16
789+00400[0-9a-f]{3} <__start>:
790+ 400[0-9a-f]{3}: 3c1c0fc0 lui gp,0xfc0
791+ 400[0-9a-f]{3}: 279c7f30 addiu gp,gp,32560
792+ 400[0-9a-f]{3}: 0399e021 addu gp,gp,t9
793+ 400[0-9a-f]{3}: 27bdfff0 addiu sp,sp,-16
794+ 400[0-9a-f]{3}: afbe0008 sw s8,8\(sp\)
795+ 400[0-9a-f]{3}: 03a0f021 move s8,sp
796+ 400[0-9a-f]{3}: afbc0000 sw gp,0\(sp\)
797+ 400[0-9a-f]{3}: 8f998018 lw t9,-32744\(gp\)
798+ 400[0-9a-f]{3}: 27848028 addiu a0,gp,-32728
799+ 400[0-9a-f]{3}: 0320f809 jalr t9
800+ 400[0-9a-f]{3}: 00000000 nop
801+ 400[0-9a-f]{3}: 8fdc0000 lw gp,0\(s8\)
802+ 400[0-9a-f]{3}: 00000000 nop
803+ 400[0-9a-f]{3}: 8f998018 lw t9,-32744\(gp\)
804+ 400[0-9a-f]{3}: 27848020 addiu a0,gp,-32736
805+ 400[0-9a-f]{3}: 0320f809 jalr t9
806+ 400[0-9a-f]{3}: 00000000 nop
807+ 400[0-9a-f]{3}: 8fdc0000 lw gp,0\(s8\)
808+ 400[0-9a-f]{3}: 00401021 move v0,v0
809+ 400[0-9a-f]{3}: 3c030000 lui v1,0x0
810+ 400[0-9a-f]{3}: 24638000 addiu v1,v1,-32768
811+ 400[0-9a-f]{3}: 00621821 addu v1,v1,v0
812+ 400[0-9a-f]{3}: 7c02283b rdhwr v0,\$5
813+ 400[0-9a-f]{3}: 8f83801c lw v1,-32740\(gp\)
814+ 400[0-9a-f]{3}: 00000000 nop
815+ 400[0-9a-f]{3}: 00621821 addu v1,v1,v0
816+ 400[0-9a-f]{3}: 7c02283b rdhwr v0,\$5
817+ 400[0-9a-f]{3}: 3c030000 lui v1,0x0
818+ 400[0-9a-f]{3}: 24639004 addiu v1,v1,-28668
819+ 400[0-9a-f]{3}: 00621821 addu v1,v1,v0
820+ 400[0-9a-f]{3}: 03c0e821 move sp,s8
821+ 400[0-9a-f]{3}: 8fbe0008 lw s8,8\(sp\)
822+ 400[0-9a-f]{3}: 03e00008 jr ra
823+ 400[0-9a-f]{3}: 27bd0010 addiu sp,sp,16
824
825-00400158 <__tls_get_addr>:
826- 400158: 03e00008 jr ra
827- 40015c: 00000000 nop
828+00400[0-9a-f]{3} <__tls_get_addr>:
829+ 400[0-9a-f]{3}: 03e00008 jr ra
830+ 400[0-9a-f]{3}: 00000000 nop
831--- binutils-2.22/ld/testsuite/ld-powerpc/tls.d
832+++ binutils-2.22/ld/testsuite/ld-powerpc/tls.d
833@@ -9,45 +9,45 @@
834
835 Disassembly of section \.text:
836
837-0+100000e8 <_start>:
838- 100000e8: 3c 6d 00 00 addis r3,r13,0
839- 100000ec: 60 00 00 00 nop
840- 100000f0: 38 63 90 78 addi r3,r3,-28552
841- 100000f4: 3c 6d 00 00 addis r3,r13,0
842- 100000f8: 60 00 00 00 nop
843- 100000fc: 38 63 10 00 addi r3,r3,4096
844- 10000100: 3c 6d 00 00 addis r3,r13,0
845- 10000104: 60 00 00 00 nop
846- 10000108: 38 63 90 40 addi r3,r3,-28608
847- 1000010c: 3c 6d 00 00 addis r3,r13,0
848- 10000110: 60 00 00 00 nop
849- 10000114: 38 63 10 00 addi r3,r3,4096
850- 10000118: 39 23 80 48 addi r9,r3,-32696
851- 1000011c: 3d 23 00 00 addis r9,r3,0
852- 10000120: 81 49 80 50 lwz r10,-32688\(r9\)
853- 10000124: e9 22 80 10 ld r9,-32752\(r2\)
854- 10000128: 7d 49 18 2a ldx r10,r9,r3
855- 1000012c: 3d 2d 00 00 addis r9,r13,0
856- 10000130: a1 49 90 60 lhz r10,-28576\(r9\)
857- 10000134: 89 4d 90 68 lbz r10,-28568\(r13\)
858- 10000138: 3d 2d 00 00 addis r9,r13,0
859- 1000013c: 99 49 90 70 stb r10,-28560\(r9\)
860- 10000140: 3c 6d 00 00 addis r3,r13,0
861- 10000144: 60 00 00 00 nop
862- 10000148: 38 63 90 00 addi r3,r3,-28672
863- 1000014c: 3c 6d 00 00 addis r3,r13,0
864- 10000150: 60 00 00 00 nop
865- 10000154: 38 63 10 00 addi r3,r3,4096
866- 10000158: f9 43 80 08 std r10,-32760\(r3\)
867- 1000015c: 3d 23 00 00 addis r9,r3,0
868- 10000160: 91 49 80 10 stw r10,-32752\(r9\)
869- 10000164: e9 22 80 08 ld r9,-32760\(r2\)
870- 10000168: 7d 49 19 2a stdx r10,r9,r3
871- 1000016c: 3d 2d 00 00 addis r9,r13,0
872- 10000170: b1 49 90 60 sth r10,-28576\(r9\)
873- 10000174: e9 4d 90 2a lwa r10,-28632\(r13\)
874- 10000178: 3d 2d 00 00 addis r9,r13,0
875- 1000017c: a9 49 90 30 lha r10,-28624\(r9\)
876+0+10000[0-9a-f]{3} <_start>:
877+ 10000[0-9a-f]{3}: 3c 6d 00 00 addis r3,r13,0
878+ 10000[0-9a-f]{3}: 60 00 00 00 nop
879+ 10000[0-9a-f]{3}: 38 63 90 78 addi r3,r3,-28552
880+ 10000[0-9a-f]{3}: 3c 6d 00 00 addis r3,r13,0
881+ 10000[0-9a-f]{3}: 60 00 00 00 nop
882+ 10000[0-9a-f]{3}: 38 63 10 00 addi r3,r3,4096
883+ 10000[0-9a-f]{3}: 3c 6d 00 00 addis r3,r13,0
884+ 10000[0-9a-f]{3}: 60 00 00 00 nop
885+ 10000[0-9a-f]{3}: 38 63 90 40 addi r3,r3,-28608
886+ 10000[0-9a-f]{3}: 3c 6d 00 00 addis r3,r13,0
887+ 10000[0-9a-f]{3}: 60 00 00 00 nop
888+ 10000[0-9a-f]{3}: 38 63 10 00 addi r3,r3,4096
889+ 10000[0-9a-f]{3}: 39 23 80 48 addi r9,r3,-32696
890+ 10000[0-9a-f]{3}: 3d 23 00 00 addis r9,r3,0
891+ 10000[0-9a-f]{3}: 81 49 80 50 lwz r10,-32688\(r9\)
892+ 10000[0-9a-f]{3}: e9 22 80 10 ld r9,-32752\(r2\)
893+ 10000[0-9a-f]{3}: 7d 49 18 2a ldx r10,r9,r3
894+ 10000[0-9a-f]{3}: 3d 2d 00 00 addis r9,r13,0
895+ 10000[0-9a-f]{3}: a1 49 90 60 lhz r10,-28576\(r9\)
896+ 10000[0-9a-f]{3}: 89 4d 90 68 lbz r10,-28568\(r13\)
897+ 10000[0-9a-f]{3}: 3d 2d 00 00 addis r9,r13,0
898+ 10000[0-9a-f]{3}: 99 49 90 70 stb r10,-28560\(r9\)
899+ 10000[0-9a-f]{3}: 3c 6d 00 00 addis r3,r13,0
900+ 10000[0-9a-f]{3}: 60 00 00 00 nop
901+ 10000[0-9a-f]{3}: 38 63 90 00 addi r3,r3,-28672
902+ 10000[0-9a-f]{3}: 3c 6d 00 00 addis r3,r13,0
903+ 10000[0-9a-f]{3}: 60 00 00 00 nop
904+ 10000[0-9a-f]{3}: 38 63 10 00 addi r3,r3,4096
905+ 10000[0-9a-f]{3}: f9 43 80 08 std r10,-32760\(r3\)
906+ 10000[0-9a-f]{3}: 3d 23 00 00 addis r9,r3,0
907+ 10000[0-9a-f]{3}: 91 49 80 10 stw r10,-32752\(r9\)
908+ 10000[0-9a-f]{3}: e9 22 80 08 ld r9,-32760\(r2\)
909+ 10000[0-9a-f]{3}: 7d 49 19 2a stdx r10,r9,r3
910+ 10000[0-9a-f]{3}: 3d 2d 00 00 addis r9,r13,0
911+ 10000[0-9a-f]{3}: b1 49 90 60 sth r10,-28576\(r9\)
912+ 10000[0-9a-f]{3}: e9 4d 90 2a lwa r10,-28632\(r13\)
913+ 10000[0-9a-f]{3}: 3d 2d 00 00 addis r9,r13,0
914+ 10000[0-9a-f]{3}: a9 49 90 30 lha r10,-28624\(r9\)
915
916-0+10000180 <\.__tls_get_addr>:
917- 10000180: 4e 80 00 20 blr
918+0+10000[0-9a-f]{3} <\.__tls_get_addr>:
919+ 10000[0-9a-f]{3}: 4e 80 00 20 blr
920--- binutils-2.22/ld/testsuite/ld-powerpc/tls.g
921+++ binutils-2.22/ld/testsuite/ld-powerpc/tls.g
922@@ -8,5 +8,5 @@
923 .*: +file format elf64-powerpc
924
925 Contents of section \.got:
926- 100101e0 00000000 100181e0 ffffffff ffff8018 .*
927- 100101f0 ffffffff ffff8058 .*
928+ 10010([0-9a-f]{3}) 00000000 10018\1 ffffffff ffff8018 .*
929+ 10010[0-9a-f]{3} ffffffff ffff8058 .*
930--- binutils-2.22/ld/testsuite/ld-powerpc/tls32.d
931+++ binutils-2.22/ld/testsuite/ld-powerpc/tls32.d
932@@ -9,42 +9,42 @@
933
934 Disassembly of section \.text:
935
936-0+1800094 <_start>:
937- 1800094: 3c 62 00 00 addis r3,r2,0
938- 1800098: 38 63 90 3c addi r3,r3,-28612
939- 180009c: 3c 62 00 00 addis r3,r2,0
940- 18000a0: 38 63 10 00 addi r3,r3,4096
941- 18000a4: 3c 62 00 00 addis r3,r2,0
942- 18000a8: 38 63 90 20 addi r3,r3,-28640
943- 18000ac: 3c 62 00 00 addis r3,r2,0
944- 18000b0: 38 63 10 00 addi r3,r3,4096
945- 18000b4: 39 23 80 24 addi r9,r3,-32732
946- 18000b8: 3d 23 00 00 addis r9,r3,0
947- 18000bc: 81 49 80 28 lwz r10,-32728\(r9\)
948- 18000c0: 3d 22 00 00 addis r9,r2,0
949- 18000c4: a1 49 90 30 lhz r10,-28624\(r9\)
950- 18000c8: 89 42 90 34 lbz r10,-28620\(r2\)
951- 18000cc: 3d 22 00 00 addis r9,r2,0
952- 18000d0: 99 49 90 38 stb r10,-28616\(r9\)
953- 18000d4: 3c 62 00 00 addis r3,r2,0
954- 18000d8: 38 63 90 00 addi r3,r3,-28672
955- 18000dc: 3c 62 00 00 addis r3,r2,0
956- 18000e0: 38 63 10 00 addi r3,r3,4096
957- 18000e4: 91 43 80 04 stw r10,-32764\(r3\)
958- 18000e8: 3d 23 00 00 addis r9,r3,0
959- 18000ec: 91 49 80 08 stw r10,-32760\(r9\)
960- 18000f0: 3d 22 00 00 addis r9,r2,0
961- 18000f4: b1 49 90 30 sth r10,-28624\(r9\)
962- 18000f8: a1 42 90 14 lhz r10,-28652\(r2\)
963- 18000fc: 3d 22 00 00 addis r9,r2,0
964- 1800100: a9 49 90 18 lha r10,-28648\(r9\)
965+0+1800[0-9a-f]{3} <_start>:
966+ 1800[0-9a-f]{3}: 3c 62 00 00 addis r3,r2,0
967+ 1800[0-9a-f]{3}: 38 63 90 3c addi r3,r3,-28612
968+ 1800[0-9a-f]{3}: 3c 62 00 00 addis r3,r2,0
969+ 1800[0-9a-f]{3}: 38 63 10 00 addi r3,r3,4096
970+ 1800[0-9a-f]{3}: 3c 62 00 00 addis r3,r2,0
971+ 1800[0-9a-f]{3}: 38 63 90 20 addi r3,r3,-28640
972+ 1800[0-9a-f]{3}: 3c 62 00 00 addis r3,r2,0
973+ 1800[0-9a-f]{3}: 38 63 10 00 addi r3,r3,4096
974+ 1800[0-9a-f]{3}: 39 23 80 24 addi r9,r3,-32732
975+ 1800[0-9a-f]{3}: 3d 23 00 00 addis r9,r3,0
976+ 1800[0-9a-f]{3}: 81 49 80 28 lwz r10,-32728\(r9\)
977+ 1800[0-9a-f]{3}: 3d 22 00 00 addis r9,r2,0
978+ 1800[0-9a-f]{3}: a1 49 90 30 lhz r10,-28624\(r9\)
979+ 1800[0-9a-f]{3}: 89 42 90 34 lbz r10,-28620\(r2\)
980+ 1800[0-9a-f]{3}: 3d 22 00 00 addis r9,r2,0
981+ 1800[0-9a-f]{3}: 99 49 90 38 stb r10,-28616\(r9\)
982+ 1800[0-9a-f]{3}: 3c 62 00 00 addis r3,r2,0
983+ 1800[0-9a-f]{3}: 38 63 90 00 addi r3,r3,-28672
984+ 1800[0-9a-f]{3}: 3c 62 00 00 addis r3,r2,0
985+ 1800[0-9a-f]{3}: 38 63 10 00 addi r3,r3,4096
986+ 1800[0-9a-f]{3}: 91 43 80 04 stw r10,-32764\(r3\)
987+ 1800[0-9a-f]{3}: 3d 23 00 00 addis r9,r3,0
988+ 1800[0-9a-f]{3}: 91 49 80 08 stw r10,-32760\(r9\)
989+ 1800[0-9a-f]{3}: 3d 22 00 00 addis r9,r2,0
990+ 1800[0-9a-f]{3}: b1 49 90 30 sth r10,-28624\(r9\)
991+ 1800[0-9a-f]{3}: a1 42 90 14 lhz r10,-28652\(r2\)
992+ 1800[0-9a-f]{3}: 3d 22 00 00 addis r9,r2,0
993+ 1800[0-9a-f]{3}: a9 49 90 18 lha r10,-28648\(r9\)
994
995-0+1800104 <__tls_get_addr>:
996- 1800104: 4e 80 00 20 blr
997+0+1800[0-9a-f]{3} <__tls_get_addr>:
998+ 1800[0-9a-f]{3}: 4e 80 00 20 blr
999 Disassembly of section \.got:
1000
1001-0+1810128 <_GLOBAL_OFFSET_TABLE_-0x4>:
1002- 1810128: 4e 80 00 21 blrl
1003+0+1810[0-9a-f]{3} <_GLOBAL_OFFSET_TABLE_-0x4>:
1004+ 1810[0-9a-f]{3}: 4e 80 00 21 blrl
1005
1006-0+181012c <_GLOBAL_OFFSET_TABLE_>:
1007+0+1810[0-9a-f]{3} <_GLOBAL_OFFSET_TABLE_>:
1008 \.\.\.
1009--- binutils-2.22/ld/testsuite/ld-powerpc/tls32.g
1010+++ binutils-2.22/ld/testsuite/ld-powerpc/tls32.g
1011@@ -8,4 +8,4 @@
1012 .*: +file format elf32-powerpc
1013
1014 Contents of section \.got:
1015- 1810128 4e800021 00000000 00000000 00000000 .*
1016+ 18101[0-9a-f]{2} 4e800021 00000000 00000000 00000000 .*
1017--- binutils-2.22/ld/testsuite/ld-powerpc/tls32.t
1018+++ binutils-2.22/ld/testsuite/ld-powerpc/tls32.t
1019@@ -8,5 +8,5 @@
1020 .*: +file format elf32-powerpc
1021
1022 Contents of section \.tdata:
1023- 1810108 12345678 23456789 3456789a 456789ab .*
1024- 1810118 56789abc 6789abcd 789abcde 00c0ffee .*
1025+ 18101[0-9a-f]{2} 12345678 23456789 3456789a 456789ab .*
1026+ 18101[0-9a-f]{2} 56789abc 6789abcd 789abcde 00c0ffee .*
1027--- binutils-2.22/ld/testsuite/ld-powerpc/tlsexe32.d
1028+++ binutils-2.22/ld/testsuite/ld-powerpc/tlsexe32.d
1029@@ -44,4 +44,4 @@ Disassembly of section \.got:
1030 .*: 4e 80 00 21 blrl
1031
1032 .* <_GLOBAL_OFFSET_TABLE_>:
1033-.*: 01 81 02 b8 00 00 00 00 00 00 00 00 .*
1034+.*: 01 81 02 [bd]8 00 00 00 00 00 00 00 00 .*
1035--- binutils-2.22/ld/testsuite/ld-powerpc/tlsexe32.g
1036+++ binutils-2.22/ld/testsuite/ld-powerpc/tlsexe32.g
1037@@ -8,4 +8,4 @@
1038
1039 Contents of section \.got:
1040 .* 00000000 00000000 00000000 4e800021 .*
1041-.* 018102b8 00000000 00000000 .*
1042+.* 018102[bd]8 00000000 00000000 .*
1043--- binutils-2.22/ld/testsuite/ld-powerpc/tlsexe32.r
1044+++ binutils-2.22/ld/testsuite/ld-powerpc/tlsexe32.r
1045@@ -33,13 +33,14 @@ There are [0-9]+ program headers, starting at offset [0-9]+
1046
1047 Program Headers:
1048 +Type +Offset +VirtAddr +PhysAddr +FileSiz MemSiz +Flg Align
1049- +PHDR +0x000034 0x01800034 0x01800034 0x000c0 0x000c0 R E 0x4
1050- +INTERP +0x0000f4 0x018000f4 0x018000f4 0x00011 0x00011 R +0x1
1051+ +PHDR +0x000034 0x01800034 0x01800034 (0x000[0-9a-f]{2}) \1 R E 0x4
1052+ +INTERP +0x000([0-9a-f]{3}) 0x01800\1 0x01800\1 0x00011 0x00011 R +0x1
1053 +\[Requesting program interpreter: .*\]
1054 +LOAD .* R E 0x10000
1055 +LOAD .* RWE 0x10000
1056 +DYNAMIC .* RW +0x4
1057 +TLS .* 0x0001c 0x00038 R +0x4
1058+ +PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
1059
1060 Section to Segment mapping:
1061 +Segment Sections\.\.\.
1062@@ -49,6 +50,7 @@ Program Headers:
1063 +03 +\.tdata \.dynamic \.got \.plt
1064 +04 +\.dynamic
1065 +05 +\.tdata \.tbss
1066+ +06 +
1067
1068 Relocation section '\.rela\.dyn' at offset .* contains 2 entries:
1069 Offset +Info +Type +Sym\. Value +Symbol's Name \+ Addend
1070--- binutils-2.22/ld/testsuite/ld-powerpc/tlsmark.d
1071+++ binutils-2.22/ld/testsuite/ld-powerpc/tlsmark.d
1072@@ -9,29 +9,29 @@
1073
1074 Disassembly of section \.text:
1075
1076-0+100000e8 <_start>:
1077- 100000e8: 48 00 00 18 b 10000100 <_start\+0x18>
1078- 100000ec: 60 00 00 00 nop
1079- 100000f0: 38 63 90 00 addi r3,r3,-28672
1080- 100000f4: e8 83 00 00 ld r4,0\(r3\)
1081- 100000f8: 3c 6d 00 00 addis r3,r13,0
1082- 100000fc: 48 00 00 0c b 10000108 <_start\+0x20>
1083- 10000100: 3c 6d 00 00 addis r3,r13,0
1084- 10000104: 4b ff ff e8 b 100000ec <_start\+0x4>
1085- 10000108: 60 00 00 00 nop
1086- 1000010c: 38 63 10 00 addi r3,r3,4096
1087- 10000110: e8 83 80 00 ld r4,-32768\(r3\)
1088- 10000114: 3c 6d 00 00 addis r3,r13,0
1089- 10000118: 48 00 00 0c b 10000124 <_start\+0x3c>
1090- 1000011c: 3c 6d 00 00 addis r3,r13,0
1091- 10000120: 48 00 00 14 b 10000134 <_start\+0x4c>
1092- 10000124: 60 00 00 00 nop
1093- 10000128: 38 63 90 04 addi r3,r3,-28668
1094- 1000012c: e8 a3 00 00 ld r5,0\(r3\)
1095- 10000130: 4b ff ff ec b 1000011c <_start\+0x34>
1096- 10000134: 60 00 00 00 nop
1097- 10000138: 38 63 10 00 addi r3,r3,4096
1098- 1000013c: e8 a3 80 04 ld r5,-32764\(r3\)
1099+0+10000[0-9a-f]{3} <_start>:
1100+ 10000[0-9a-f]{3}: 48 00 00 18 b 10000[0-9a-f]{3} <_start\+0x18>
1101+ 10000[0-9a-f]{3}: 60 00 00 00 nop
1102+ 10000[0-9a-f]{3}: 38 63 90 00 addi r3,r3,-28672
1103+ 10000[0-9a-f]{3}: e8 83 00 00 ld r4,0\(r3\)
1104+ 10000[0-9a-f]{3}: 3c 6d 00 00 addis r3,r13,0
1105+ 10000[0-9a-f]{3}: 48 00 00 0c b 10000[0-9a-f]{3} <_start\+0x20>
1106+ 10000[0-9a-f]{3}: 3c 6d 00 00 addis r3,r13,0
1107+ 10000[0-9a-f]{3}: 4b ff ff e8 b 10000[0-9a-f]{3} <_start\+0x4>
1108+ 10000[0-9a-f]{3}: 60 00 00 00 nop
1109+ 10000[0-9a-f]{3}: 38 63 10 00 addi r3,r3,4096
1110+ 10000[0-9a-f]{3}: e8 83 80 00 ld r4,-32768\(r3\)
1111+ 10000[0-9a-f]{3}: 3c 6d 00 00 addis r3,r13,0
1112+ 10000[0-9a-f]{3}: 48 00 00 0c b 10000[0-9a-f]{3} <_start\+0x3c>
1113+ 10000[0-9a-f]{3}: 3c 6d 00 00 addis r3,r13,0
1114+ 10000[0-9a-f]{3}: 48 00 00 14 b 10000[0-9a-f]{3} <_start\+0x4c>
1115+ 10000[0-9a-f]{3}: 60 00 00 00 nop
1116+ 10000[0-9a-f]{3}: 38 63 90 04 addi r3,r3,-28668
1117+ 10000[0-9a-f]{3}: e8 a3 00 00 ld r5,0\(r3\)
1118+ 10000[0-9a-f]{3}: 4b ff ff ec b 10000[0-9a-f]{3} <_start\+0x34>
1119+ 10000[0-9a-f]{3}: 60 00 00 00 nop
1120+ 10000[0-9a-f]{3}: 38 63 10 00 addi r3,r3,4096
1121+ 10000[0-9a-f]{3}: e8 a3 80 04 ld r5,-32764\(r3\)
1122
1123-0+10000140 <\.__tls_get_addr>:
1124- 10000140: 4e 80 00 20 blr
1125+0+10000[0-9a-f]{3} <\.__tls_get_addr>:
1126+ 10000[0-9a-f]{3}: 4e 80 00 20 blr
1127--- binutils-2.22/ld/testsuite/ld-powerpc/tlsmark32.d
1128+++ binutils-2.22/ld/testsuite/ld-powerpc/tlsmark32.d
1129@@ -9,17 +9,17 @@
1130
1131 Disassembly of section \.text:
1132
1133-0+1800094 <_start>:
1134- 1800094: 48 00 00 14 b 18000a8 <_start\+0x14>
1135- 1800098: 38 63 90 00 addi r3,r3,-28672
1136- 180009c: 80 83 00 00 lwz r4,0\(r3\)
1137- 18000a0: 3c 62 00 00 addis r3,r2,0
1138- 18000a4: 48 00 00 0c b 18000b0 <_start\+0x1c>
1139- 18000a8: 3c 62 00 00 addis r3,r2,0
1140- 18000ac: 4b ff ff ec b 1800098 <_start\+0x4>
1141- 18000b0: 38 63 10 00 addi r3,r3,4096
1142- 18000b4: 80 83 80 00 lwz r4,-32768\(r3\)
1143+0+18000[0-9a-f]{2} <_start>:
1144+ 18000[0-9a-f]{2}: 48 00 00 14 b 18000[0-9a-f]{2} <_start\+0x14>
1145+ 18000[0-9a-f]{2}: 38 63 90 00 addi r3,r3,-28672
1146+ 18000[0-9a-f]{2}: 80 83 00 00 lwz r4,0\(r3\)
1147+ 18000[0-9a-f]{2}: 3c 62 00 00 addis r3,r2,0
1148+ 18000[0-9a-f]{2}: 48 00 00 0c b 18000[0-9a-f]{2} <_start\+0x1c>
1149+ 18000[0-9a-f]{2}: 3c 62 00 00 addis r3,r2,0
1150+ 18000[0-9a-f]{2}: 4b ff ff ec b 18000[0-9a-f]{2} <_start\+0x4>
1151+ 18000[0-9a-f]{2}: 38 63 10 00 addi r3,r3,4096
1152+ 18000[0-9a-f]{2}: 80 83 80 00 lwz r4,-32768\(r3\)
1153
1154-0+18000b8 <__tls_get_addr>:
1155- 18000b8: 4e 80 00 20 blr
1156-#pass
1157\ No newline at end of file
1158+0+18000[0-9a-f]{2} <__tls_get_addr>:
1159+ 18000[0-9a-f]{2}: 4e 80 00 20 blr
1160+#pass
1161--- binutils-2.22/ld/testsuite/ld-powerpc/tlsopt1.d
1162+++ binutils-2.22/ld/testsuite/ld-powerpc/tlsopt1.d
1163@@ -9,17 +9,17 @@
1164
1165 Disassembly of section \.text:
1166
1167-0+100000e8 <\.__tls_get_addr>:
1168- 100000e8: 4e 80 00 20 blr
1169+0+10000[0-9a-f]{3} <\.__tls_get_addr>:
1170+ 10000[0-9a-f]{3}: 4e 80 00 20 blr
1171
1172 Disassembly of section \.no_opt1:
1173
1174-0+100000ec <\.no_opt1>:
1175- 100000ec: 38 62 80 08 addi r3,r2,-32760
1176- 100000f0: 2c 24 00 00 cmpdi r4,0
1177- 100000f4: 41 82 00 10 beq- .*
1178- 100000f8: 4b ff ff f1 bl 100000e8 <\.__tls_get_addr>
1179- 100000fc: 60 00 00 00 nop
1180- 10000100: 48 00 00 0c b .*
1181- 10000104: 4b ff ff e5 bl 100000e8 <\.__tls_get_addr>
1182- 10000108: 60 00 00 00 nop
1183+0+10000[0-9a-f]{3} <\.no_opt1>:
1184+ 10000[0-9a-f]{3}: 38 62 80 08 addi r3,r2,-32760
1185+ 10000[0-9a-f]{3}: 2c 24 00 00 cmpdi r4,0
1186+ 10000[0-9a-f]{3}: 41 82 00 10 beq- .*
1187+ 10000[0-9a-f]{3}: 4b ff ff f1 bl 10000[0-9a-f]{3} <\.__tls_get_addr>
1188+ 10000[0-9a-f]{3}: 60 00 00 00 nop
1189+ 10000[0-9a-f]{3}: 48 00 00 0c b .*
1190+ 10000[0-9a-f]{3}: 4b ff ff e5 bl 10000[0-9a-f]{3} <\.__tls_get_addr>
1191+ 10000[0-9a-f]{3}: 60 00 00 00 nop
1192--- binutils-2.22/ld/testsuite/ld-powerpc/tlsopt1_32.d
1193+++ binutils-2.22/ld/testsuite/ld-powerpc/tlsopt1_32.d
1194@@ -9,16 +9,16 @@
1195
1196 Disassembly of section \.text:
1197
1198-0+1800094 <__tls_get_addr>:
1199- 1800094: 4e 80 00 20 blr
1200+0+18000[0-9a-f]{2} <__tls_get_addr>:
1201+ 18000[0-9a-f]{2}: 4e 80 00 20 blr
1202
1203 Disassembly of section \.no_opt1:
1204
1205-0+1800098 <\.no_opt1>:
1206- 1800098: 38 6d ff f4 addi r3,r13,-12
1207- 180009c: 2c 04 00 00 cmpwi r4,0
1208- 18000a0: 41 82 00 0c beq- .*
1209- 18000a4: 4b ff ff f1 bl 1800094 <__tls_get_addr>
1210- 18000a8: 48 00 00 08 b .*
1211- 18000ac: 4b ff ff e9 bl 1800094 <__tls_get_addr>
1212+0+18000[0-9a-f]{2} <\.no_opt1>:
1213+ 18000[0-9a-f]{2}: 38 6d ff f4 addi r3,r13,-12
1214+ 18000[0-9a-f]{2}: 2c 04 00 00 cmpwi r4,0
1215+ 18000[0-9a-f]{2}: 41 82 00 0c beq- .*
1216+ 18000[0-9a-f]{2}: 4b ff ff f1 bl 18000[0-9a-f]{2} <__tls_get_addr>
1217+ 18000[0-9a-f]{2}: 48 00 00 08 b .*
1218+ 18000[0-9a-f]{2}: 4b ff ff e9 bl 18000[0-9a-f]{2} <__tls_get_addr>
1219 #pass
1220--- binutils-2.22/ld/testsuite/ld-powerpc/tlsopt2.d
1221+++ binutils-2.22/ld/testsuite/ld-powerpc/tlsopt2.d
1222@@ -9,15 +9,15 @@
1223
1224 Disassembly of section \.text:
1225
1226-0+100000e8 <\.__tls_get_addr>:
1227- 100000e8: 4e 80 00 20 blr
1228+0+10000[0-9a-f]{3} <\.__tls_get_addr>:
1229+ 10000[0-9a-f]{3}: 4e 80 00 20 blr
1230
1231 Disassembly of section \.no_opt2:
1232
1233-0+100000ec <\.no_opt2>:
1234- 100000ec: 38 62 80 08 addi r3,r2,-32760
1235- 100000f0: 2c 24 00 00 cmpdi r4,0
1236- 100000f4: 41 82 00 08 beq- .*
1237- 100000f8: 38 62 80 08 addi r3,r2,-32760
1238- 100000fc: 4b ff ff ed bl 100000e8 <\.__tls_get_addr>
1239- 10000100: 60 00 00 00 nop
1240+0+10000[0-9a-f]{3} <\.no_opt2>:
1241+ 10000[0-9a-f]{3}: 38 62 80 08 addi r3,r2,-32760
1242+ 10000[0-9a-f]{3}: 2c 24 00 00 cmpdi r4,0
1243+ 10000[0-9a-f]{3}: 41 82 00 08 beq- .*
1244+ 10000[0-9a-f]{3}: 38 62 80 08 addi r3,r2,-32760
1245+ 10000[0-9a-f]{3}: 4b ff ff ed bl 10000[0-9a-f]{3} <\.__tls_get_addr>
1246+ 10000[0-9a-f]{3}: 60 00 00 00 nop
1247--- binutils-2.22/ld/testsuite/ld-powerpc/tlsopt2_32.d
1248+++ binutils-2.22/ld/testsuite/ld-powerpc/tlsopt2_32.d
1249@@ -9,15 +9,15 @@
1250
1251 Disassembly of section \.text:
1252
1253-0+1800094 <__tls_get_addr>:
1254- 1800094: 4e 80 00 20 blr
1255+0+18000[0-9a-f]{2} <__tls_get_addr>:
1256+ 18000[0-9a-f]{2}: 4e 80 00 20 blr
1257
1258 Disassembly of section \.no_opt2:
1259
1260-0+1800098 <\.no_opt2>:
1261- 1800098: 38 6d ff f4 addi r3,r13,-12
1262- 180009c: 2c 04 00 00 cmpwi r4,0
1263- 18000a0: 41 82 00 08 beq- .*
1264- 18000a4: 38 6d ff f4 addi r3,r13,-12
1265- 18000a8: 4b ff ff ed bl 1800094 <__tls_get_addr>
1266+0+18000[0-9a-f]{2} <\.no_opt2>:
1267+ 18000[0-9a-f]{2}: 38 6d ff f4 addi r3,r13,-12
1268+ 18000[0-9a-f]{2}: 2c 04 00 00 cmpwi r4,0
1269+ 18000[0-9a-f]{2}: 41 82 00 08 beq- .*
1270+ 18000[0-9a-f]{2}: 38 6d ff f4 addi r3,r13,-12
1271+ 18000[0-9a-f]{2}: 4b ff ff ed bl 18000[0-9a-f]{2} <__tls_get_addr>
1272 #pass
1273--- binutils-2.22/ld/testsuite/ld-powerpc/tlsopt3.d
1274+++ binutils-2.22/ld/testsuite/ld-powerpc/tlsopt3.d
1275@@ -9,18 +9,18 @@
1276
1277 Disassembly of section \.text:
1278
1279-00000000100000e8 <\.__tls_get_addr>:
1280- 100000e8: 4e 80 00 20 blr
1281+0000000010000[0-9a-f]{3} <\.__tls_get_addr>:
1282+ 10000[0-9a-f]{3}: 4e 80 00 20 blr
1283
1284 Disassembly of section \.no_opt3:
1285
1286-00000000100000ec <\.no_opt3>:
1287- 100000ec: 38 62 80 08 addi r3,r2,-32760
1288- 100000f0: 48 00 00 0c b .*
1289- 100000f4: 38 62 80 18 addi r3,r2,-32744
1290- 100000f8: 48 00 00 10 b .*
1291- 100000fc: 4b ff ff ed bl 100000e8 <\.__tls_get_addr>
1292- 10000100: 60 00 00 00 nop
1293- 10000104: 48 00 00 0c b .*
1294- 10000108: 4b ff ff e1 bl 100000e8 <\.__tls_get_addr>
1295- 1000010c: 60 00 00 00 nop
1296+0000000010000[0-9a-f]{3} <\.no_opt3>:
1297+ 10000[0-9a-f]{3}: 38 62 80 08 addi r3,r2,-32760
1298+ 10000[0-9a-f]{3}: 48 00 00 0c b .*
1299+ 10000[0-9a-f]{3}: 38 62 80 18 addi r3,r2,-32744
1300+ 10000[0-9a-f]{3}: 48 00 00 10 b .*
1301+ 10000[0-9a-f]{3}: 4b ff ff ed bl 10000[0-9a-f]{3} <\.__tls_get_addr>
1302+ 10000[0-9a-f]{3}: 60 00 00 00 nop
1303+ 10000[0-9a-f]{3}: 48 00 00 0c b .*
1304+ 10000[0-9a-f]{3}: 4b ff ff e1 bl 10000[0-9a-f]{3} <\.__tls_get_addr>
1305+ 10000[0-9a-f]{3}: 60 00 00 00 nop
1306--- binutils-2.22/ld/testsuite/ld-powerpc/tlsopt3_32.d
1307+++ binutils-2.22/ld/testsuite/ld-powerpc/tlsopt3_32.d
1308@@ -9,17 +9,17 @@
1309
1310 Disassembly of section \.text:
1311
1312-0+1800094 <__tls_get_addr>:
1313- 1800094: 4e 80 00 20 blr
1314+0+18000[0-9a-f]{2} <__tls_get_addr>:
1315+ 18000[0-9a-f]{2}: 4e 80 00 20 blr
1316
1317 Disassembly of section \.no_opt3:
1318
1319-0+1800098 <\.no_opt3>:
1320- 1800098: 38 6d ff ec addi r3,r13,-20
1321- 180009c: 48 00 00 0c b .*
1322- 18000a0: 38 6d ff f4 addi r3,r13,-12
1323- 18000a4: 48 00 00 0c b .*
1324- 18000a8: 4b ff ff ed bl 1800094 <__tls_get_addr>
1325- 18000ac: 48 00 00 08 b .*
1326- 18000b0: 4b ff ff e5 bl 1800094 <__tls_get_addr>
1327+0+18000[0-9a-f]{2} <\.no_opt3>:
1328+ 18000[0-9a-f]{2}: 38 6d ff ec addi r3,r13,-20
1329+ 18000[0-9a-f]{2}: 48 00 00 0c b .*
1330+ 18000[0-9a-f]{2}: 38 6d ff f4 addi r3,r13,-12
1331+ 18000[0-9a-f]{2}: 48 00 00 0c b .*
1332+ 18000[0-9a-f]{2}: 4b ff ff ed bl 18000[0-9a-f]{2} <__tls_get_addr>
1333+ 18000[0-9a-f]{2}: 48 00 00 08 b .*
1334+ 18000[0-9a-f]{2}: 4b ff ff e5 bl 18000[0-9a-f]{2} <__tls_get_addr>
1335 #pass
1336--- binutils-2.22/ld/testsuite/ld-powerpc/tlsopt4.d
1337+++ binutils-2.22/ld/testsuite/ld-powerpc/tlsopt4.d
1338@@ -9,40 +9,40 @@
1339
1340 Disassembly of section \.text:
1341
1342-0+100000e8 <\.__tls_get_addr>:
1343- 100000e8: 4e 80 00 20 blr
1344+0+10000[0-9a-f]{3} <\.__tls_get_addr>:
1345+ 10000[0-9a-f]{3}: 4e 80 00 20 blr
1346
1347 Disassembly of section \.opt1:
1348
1349-0+100000ec <\.opt1>:
1350- 100000ec: 3c 6d 00 00 addis r3,r13,0
1351- 100000f0: 2c 24 00 00 cmpdi r4,0
1352- 100000f4: 41 82 00 10 beq- .*
1353- 100000f8: 60 00 00 00 nop
1354- 100000fc: 38 63 90 10 addi r3,r3,-28656
1355- 10000100: 48 00 00 0c b .*
1356- 10000104: 60 00 00 00 nop
1357- 10000108: 38 63 90 10 addi r3,r3,-28656
1358+0+10000[0-9a-f]{3} <\.opt1>:
1359+ 10000[0-9a-f]{3}: 3c 6d 00 00 addis r3,r13,0
1360+ 10000[0-9a-f]{3}: 2c 24 00 00 cmpdi r4,0
1361+ 10000[0-9a-f]{3}: 41 82 00 10 beq- .*
1362+ 10000[0-9a-f]{3}: 60 00 00 00 nop
1363+ 10000[0-9a-f]{3}: 38 63 90 10 addi r3,r3,-28656
1364+ 10000[0-9a-f]{3}: 48 00 00 0c b .*
1365+ 10000[0-9a-f]{3}: 60 00 00 00 nop
1366+ 10000[0-9a-f]{3}: 38 63 90 10 addi r3,r3,-28656
1367
1368 Disassembly of section \.opt2:
1369
1370-0+1000010c <\.opt2>:
1371- 1000010c: 3c 6d 00 00 addis r3,r13,0
1372- 10000110: 2c 24 00 00 cmpdi r4,0
1373- 10000114: 41 82 00 08 beq- .*
1374- 10000118: 3c 6d 00 00 addis r3,r13,0
1375- 1000011c: 60 00 00 00 nop
1376- 10000120: 38 63 90 10 addi r3,r3,-28656
1377+0+10000[0-9a-f]{3} <\.opt2>:
1378+ 10000[0-9a-f]{3}: 3c 6d 00 00 addis r3,r13,0
1379+ 10000[0-9a-f]{3}: 2c 24 00 00 cmpdi r4,0
1380+ 10000[0-9a-f]{3}: 41 82 00 08 beq- .*
1381+ 10000[0-9a-f]{3}: 3c 6d 00 00 addis r3,r13,0
1382+ 10000[0-9a-f]{3}: 60 00 00 00 nop
1383+ 10000[0-9a-f]{3}: 38 63 90 10 addi r3,r3,-28656
1384
1385 Disassembly of section \.opt3:
1386
1387-0+10000124 <\.opt3>:
1388- 10000124: 3c 6d 00 00 addis r3,r13,0
1389- 10000128: 48 00 00 0c b .*
1390- 1000012c: 3c 6d 00 00 addis r3,r13,0
1391- 10000130: 48 00 00 10 b .*
1392- 10000134: 60 00 00 00 nop
1393- 10000138: 38 63 90 10 addi r3,r3,-28656
1394- 1000013c: 48 00 00 0c b .*
1395- 10000140: 60 00 00 00 nop
1396- 10000144: 38 63 90 08 addi r3,r3,-28664
1397+0+10000[0-9a-f]{3} <\.opt3>:
1398+ 10000[0-9a-f]{3}: 3c 6d 00 00 addis r3,r13,0
1399+ 10000[0-9a-f]{3}: 48 00 00 0c b .*
1400+ 10000[0-9a-f]{3}: 3c 6d 00 00 addis r3,r13,0
1401+ 10000[0-9a-f]{3}: 48 00 00 10 b .*
1402+ 10000[0-9a-f]{3}: 60 00 00 00 nop
1403+ 10000[0-9a-f]{3}: 38 63 90 10 addi r3,r3,-28656
1404+ 10000[0-9a-f]{3}: 48 00 00 0c b .*
1405+ 10000[0-9a-f]{3}: 60 00 00 00 nop
1406+ 10000[0-9a-f]{3}: 38 63 90 08 addi r3,r3,-28664
1407--- binutils-2.22/ld/testsuite/ld-powerpc/tlsopt4_32.d
1408+++ binutils-2.22/ld/testsuite/ld-powerpc/tlsopt4_32.d
1409@@ -9,36 +9,36 @@
1410
1411 Disassembly of section \.text:
1412
1413-0+1800094 <__tls_get_addr>:
1414- 1800094: 4e 80 00 20 blr
1415+0+18000[0-9a-f]{2} <__tls_get_addr>:
1416+ 18000[0-9a-f]{2}: 4e 80 00 20 blr
1417
1418 Disassembly of section \.opt1:
1419
1420-0+1800098 <\.opt1>:
1421- 1800098: 3c 62 00 00 addis r3,r2,0
1422- 180009c: 2c 04 00 00 cmpwi r4,0
1423- 18000a0: 41 82 00 0c beq- .*
1424- 18000a4: 38 63 90 10 addi r3,r3,-28656
1425- 18000a8: 48 00 00 08 b .*
1426- 18000ac: 38 63 90 10 addi r3,r3,-28656
1427+0+18000[0-9a-f]{2} <\.opt1>:
1428+ 18000[0-9a-f]{2}: 3c 62 00 00 addis r3,r2,0
1429+ 18000[0-9a-f]{2}: 2c 04 00 00 cmpwi r4,0
1430+ 18000[0-9a-f]{2}: 41 82 00 0c beq- .*
1431+ 18000[0-9a-f]{2}: 38 63 90 10 addi r3,r3,-28656
1432+ 18000[0-9a-f]{2}: 48 00 00 08 b .*
1433+ 18000[0-9a-f]{2}: 38 63 90 10 addi r3,r3,-28656
1434
1435 Disassembly of section \.opt2:
1436
1437-0+18000b0 <\.opt2>:
1438- 18000b0: 3c 62 00 00 addis r3,r2,0
1439- 18000b4: 2c 04 00 00 cmpwi r4,0
1440- 18000b8: 41 82 00 08 beq- .*
1441- 18000bc: 3c 62 00 00 addis r3,r2,0
1442- 18000c0: 38 63 90 10 addi r3,r3,-28656
1443+0+18000[0-9a-f]{2} <\.opt2>:
1444+ 18000[0-9a-f]{2}: 3c 62 00 00 addis r3,r2,0
1445+ 18000[0-9a-f]{2}: 2c 04 00 00 cmpwi r4,0
1446+ 18000[0-9a-f]{2}: 41 82 00 08 beq- .*
1447+ 18000[0-9a-f]{2}: 3c 62 00 00 addis r3,r2,0
1448+ 18000[0-9a-f]{2}: 38 63 90 10 addi r3,r3,-28656
1449
1450 Disassembly of section \.opt3:
1451
1452-0+18000c4 <\.opt3>:
1453- 18000c4: 3c 62 00 00 addis r3,r2,0
1454- 18000c8: 48 00 00 0c b .*
1455- 18000cc: 3c 62 00 00 addis r3,r2,0
1456- 18000d0: 48 00 00 0c b .*
1457- 18000d4: 38 63 90 10 addi r3,r3,-28656
1458- 18000d8: 48 00 00 08 b .*
1459- 18000dc: 38 63 90 08 addi r3,r3,-28664
1460+0+18000[0-9a-f]{2} <\.opt3>:
1461+ 18000[0-9a-f]{2}: 3c 62 00 00 addis r3,r2,0
1462+ 18000[0-9a-f]{2}: 48 00 00 0c b .*
1463+ 18000[0-9a-f]{2}: 3c 62 00 00 addis r3,r2,0
1464+ 18000[0-9a-f]{2}: 48 00 00 0c b .*
1465+ 18000[0-9a-f]{2}: 38 63 90 10 addi r3,r3,-28656
1466+ 18000[0-9a-f]{2}: 48 00 00 08 b .*
1467+ 18000[0-9a-f]{2}: 38 63 90 08 addi r3,r3,-28664
1468 #pass
0f64d6ce
MT		 1469--- binutils-2.22/ld/testsuite/ld-powerpc/tlsso32.g
1470+++ binutils-2.22/ld/testsuite/ld-powerpc/tlsso32.g
1471@@ -9,5 +9,5 @@
1472 Contents of section \.got:
1473 .* 00000000 00000000 00000000 00000000 .*
1474 .* 00000000 00000000 00000000 00000000 .*
1475-.* 00000000 4e800021 000103ec 00000000 .*
1476+.* 00000000 4e800021 00010[0-9a-f]{3} 00000000 .*
1477 .* 00000000 .*
0f64d6ce
MT		 1478--- binutils-2.22/ld/testsuite/ld-powerpc/tlstoc.g
1479+++ binutils-2.22/ld/testsuite/ld-powerpc/tlstoc.g
1480@@ -8,8 +8,8 @@
1481 .*: +file format elf64-powerpc
1482
1483 Contents of section \.got:
1484- 100101a0 00000000 00000001 00000000 00000000 .*
1485- 100101b0 00000000 00000001 00000000 00000000 .*
1486- 100101c0 00000000 00000001 00000000 00000000 .*
1487- 100101d0 00000000 00000001 00000000 00000000 .*
1488- 100101e0 ffffffff ffff8060 00000000 00000000 .*
1489+ 10010[0-9a-f]{3} 00000000 00000001 00000000 00000000 .*
1490+ 10010[0-9a-f]{3} 00000000 00000001 00000000 00000000 .*
1491+ 10010[0-9a-f]{3} 00000000 00000001 00000000 00000000 .*
1492+ 10010[0-9a-f]{3} 00000000 00000001 00000000 00000000 .*
1493+ 10010[0-9a-f]{3} ffffffff ffff8060 00000000 00000000 .*
1494--- binutils-2.22/ld/testsuite/ld-powerpc/tlstoc.t
1495+++ binutils-2.22/ld/testsuite/ld-powerpc/tlstoc.t
1496@@ -8,7 +8,7 @@
1497 .*: +file format elf64-powerpc
1498
1499 Contents of section \.tdata:
1500- 10010148 00c0ffee 00000000 12345678 9abcdef0 .*
1501- 10010158 23456789 abcdef01 3456789a bcdef012 .*
1502- 10010168 456789ab cdef0123 56789abc def01234 .*
1503- 10010178 6789abcd ef012345 789abcde f0123456 .*
1504+ 10010180 00c0ffee 00000000 12345678 9abcdef0 .*
1505+ 10010190 23456789 abcdef01 3456789a bcdef012 .*
1506+ 100101a0 456789ab cdef0123 56789abc def01234 .*
1507+ 100101b0 6789abcd ef012345 789abcde f0123456 .*
1508--- binutils-2.22/ld/testsuite/ld-powerpc/tlstocso.g
1509+++ binutils-2.22/ld/testsuite/ld-powerpc/tlstocso.g
1510@@ -7,7 +7,7 @@
1511 .*: +file format elf64-powerpc
1512
1513 Contents of section \.got:
1514-.* 00000000 000186c0 00000000 00000000 .*
1515+.* 00000000 000186f8 00000000 00000000 .*
1516 .* 00000000 00000000 00000000 00000000 .*
1517 .* 00000000 00000000 00000000 00000000 .*
1518 .* 00000000 00000000 00000000 00000000 .*
1519--- binutils-2.22/ld/testsuite/ld-s390/tlsbin.rd
1520+++ binutils-2.22/ld/testsuite/ld-s390/tlsbin.rd
1521@@ -36,13 +36,14 @@ There are [0-9]+ program headers, starting at offset [0-9]+
1522
1523 Program Headers:
1524 +Type +Offset +VirtAddr +PhysAddr +FileSiz +MemSiz +Flg Align
1525- +PHDR +0x0+34 0x0+400034 0x0+400034 0x0+c0 0x0+c0 R E 0x4
1526- +INTERP +0x0+f4 0x0+4000f4 0x0+4000f4 0x0+11 0x0+11 R +0x1
1527+ +PHDR +0x0+34 0x0+400034 0x0+400034 0x0+e0 0x0+e0 R E 0x4
1528+ +INTERP +0x0+114 0x0+400114 0x0+400114 0x0+11 0x0+11 R +0x1
1529 .*Requesting program interpreter.*
1530 +LOAD .* R E 0x1000
1531 +LOAD .* RW +0x1000
1532 +DYNAMIC .* RW +0x4
1533 +TLS .* 0x0+60 0x0+a0 R +0x20
1534+ +PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
1535
1536 Section to Segment mapping:
1537 +Segment Sections...
1538@@ -52,6 +53,7 @@ Program Headers:
1539 +03 +.tdata .dynamic .got *
1540 +04 +.dynamic *
1541 +05 +.tdata .tbss *
1542+ +06 +
1543
1544 Relocation section '.rela.dyn' at offset .* contains 4 entries:
1545 Offset +Info +Type +Sym.Value +Sym. Name \+ Addend
1546--- binutils-2.22/ld/testsuite/ld-s390/tlsbin_64.rd
1547+++ binutils-2.22/ld/testsuite/ld-s390/tlsbin_64.rd
1548@@ -36,13 +36,14 @@ There are [0-9]+ program headers, starting at offset [0-9]+
1549
1550 Program Headers:
1551 +Type +Offset +VirtAddr +PhysAddr +FileSiz +MemSiz +Flg Align
1552- +PHDR +0x0+40 0x0+80000040 0x0+80000040 0x0+150 0x0+150 R E 0x8
1553- +INTERP +0x0+190 0x0+80000190 0x0+80000190 0x0+11 0x0+11 R +0x1
1554+ +PHDR +0x0+40 0x0+80000040 0x0+80000040 0x0+188 0x0+188 R E 0x8
1555+ +INTERP +0x0+1c8 0x0+800001c8 0x0+800001c8 0x0+11 0x0+11 R +0x1
1556 .*Requesting program interpreter.*
1557 +LOAD .* R E 0x1000
1558 +LOAD .* RW +0x1000
1559 +DYNAMIC .* RW +0x8
1560 +TLS .* 0x0+60 0x0+a0 R +0x20
1561+ +PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
1562
1563 Section to Segment mapping:
1564 +Segment Sections...
1565@@ -52,6 +53,7 @@ Program Headers:
1566 +03 +.tdata .dynamic .got *
1567 +04 +.dynamic *
1568 +05 +.tdata .tbss *
1569+ +06 +
1570
1571 Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 4 entries:
1572 +Offset +Info +Type +Symbol's Value +Symbol's Name \+ Addend
1573--- binutils-2.22/ld/testsuite/ld-s390/tlspic.rd
1574+++ binutils-2.22/ld/testsuite/ld-s390/tlspic.rd
1575@@ -39,6 +39,7 @@ Program Headers:
1576 +LOAD .* RW +0x1000
1577 +DYNAMIC .* RW +0x4
1578 +TLS .* 0x0+60 0x0+80 R +0x20
1579+ +PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
1580
1581 Section to Segment mapping:
1582 +Segment Sections...
1583@@ -46,6 +47,7 @@ Program Headers:
1584 +01 +.tdata .dynamic .got
1585 +02 +.dynamic
1586 +03 +.tdata .tbss
1587+ +04 +
1588
1589 Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 14 entries:
1590 Offset +Info +Type +Sym.Value +Sym. Name \+ Addend
1591--- binutils-2.22/ld/testsuite/ld-s390/tlspic_64.rd
1592+++ binutils-2.22/ld/testsuite/ld-s390/tlspic_64.rd
1593@@ -39,6 +39,7 @@ Program Headers:
1594 +LOAD .* RW +0x1000
1595 +DYNAMIC .* RW +0x8
1596 +TLS .* 0x0+60 0x0+80 R +0x20
1597+ +PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
1598
1599 Section to Segment mapping:
1600 +Segment Sections...
1601@@ -46,6 +47,7 @@ Program Headers:
1602 +01 +.tdata .dynamic .got *
1603 +02 +.dynamic *
1604 +03 +.tdata .tbss *
1605+ +04 +
1606
1607 Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 14 entries:
1608 +Offset +Info +Type +Symbol's Value +Symbol's Name \+ Addend
1609--- binutils-2.22/ld/testsuite/ld-scripts/empty-aligned.d
1610+++ binutils-2.22/ld/testsuite/ld-scripts/empty-aligned.d
1611@@ -8,7 +8,9 @@
1612 Program Headers:
1613 +Type +Offset +VirtAddr +PhysAddr +FileSiz +MemSiz +Flg +Align
1614 +LOAD +0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ [RWE ]+ +0x[0-9a-f]+
1615+ +PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
1616
1617 Section to Segment mapping:
1618 +Segment Sections\.\.\.
1619 +00 +.text
1620+ +01 +
1621--- binutils-2.22/ld/testsuite/ld-sh/tlsbin-2.d
1622+++ binutils-2.22/ld/testsuite/ld-sh/tlsbin-2.d
1623@@ -44,6 +44,7 @@ Program Headers:
1624 +LOAD.*
1625 +DYNAMIC.*
1626 +TLS +0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x0+18 0x0+28 R +0x4
1627+ +PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
1628
1629 Section to Segment mapping:
1630 +Segment Sections\.\.\.
1631@@ -53,6 +54,7 @@ Program Headers:
1632 +03 +\.tdata \.dynamic \.got *
1633 +04 +\.dynamic *
1634 +05 +\.tdata \.tbss *
1635+ +06 +
1636
1637 Relocation section '\.rela\.dyn' at offset 0x[0-9a-f]+ contains 4 entries:
1638 Offset +Info +Type +Sym\.Value +Sym\. Name \+ Addend
1639--- binutils-2.22/ld/testsuite/ld-sh/tlspic-2.d
1640+++ binutils-2.22/ld/testsuite/ld-sh/tlspic-2.d
1641@@ -32,7 +32,7 @@ Key to Flags:
1642
1643 Elf file type is DYN \(Shared object file\)
1644 Entry point 0x[0-9a-f]+
1645-There are 4 program headers, starting at offset [0-9]+
1646+There are [0-9] program headers, starting at offset [0-9]+
1647
1648 Program Headers:
1649 +Type +Offset +VirtAddr +PhysAddr +FileSiz +MemSiz +Flg Align
1650@@ -40,6 +40,7 @@ Program Headers:
1651 +LOAD.*
1652 +DYNAMIC.*
1653 +TLS .* 0x0+18 0x0+20 R +0x4
1654+ +PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
1655
1656 Section to Segment mapping:
1657 +Segment Sections\.\.\.
1658@@ -47,6 +48,7 @@ Program Headers:
1659 +01 +\.tdata \.dynamic \.got *
1660 +02 +\.dynamic *
1661 +03 +\.tdata \.tbss *
1662+ +04 +
1663
1664 Relocation section '\.rela\.dyn' at offset 0x[0-9a-f]+ contains 10 entries:
1665 Offset +Info +Type +Sym\.Value +Sym\. Name \+ Addend
1666--- binutils-2.22/ld/testsuite/ld-sparc/gotop32.rd
1667+++ binutils-2.22/ld/testsuite/ld-sparc/gotop32.rd
1668@@ -31,6 +31,7 @@ Program Headers:
1669 +LOAD +0x0+ 0x0+ 0x0+ 0x0+2000 0x0+2000 R E 0x10000
1670 +LOAD +0x0+2000 0x0+12000 0x0+12000 0x0+2000 0x0+2000 RW +0x10000
1671 +DYNAMIC +0x0+2000 0x0+12000 0x0+12000 0x0+70 0x0+70 RW +0x4
1672+ +PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
1673 #...
1674
1675 Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 1 entries:
1676--- binutils-2.22/ld/testsuite/ld-sparc/gotop64.rd
1677+++ binutils-2.22/ld/testsuite/ld-sparc/gotop64.rd
1678@@ -31,6 +31,7 @@ Program Headers:
1679 +LOAD +0x0+ 0x0+ 0x0+ 0x0+2000 0x0+2000 R E 0x100000
1680 +LOAD +0x0+2000 0x0+102000 0x0+102000 0x0+2000 0x0+2000 RW +0x100000
1681 +DYNAMIC +0x0+2000 0x0+102000 0x0+102000 0x0+e0 0x0+e0 RW +0x8
1682+ +PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
1683 #...
1684
1685 Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 1 entries:
1686--- binutils-2.22/ld/testsuite/ld-sparc/tlssunbin32.rd
1687+++ binutils-2.22/ld/testsuite/ld-sparc/tlssunbin32.rd
1688@@ -30,13 +30,14 @@ There are [0-9]+ program headers, starting at offset [0-9]+
1689
1690 Program Headers:
1691 +Type +Offset +VirtAddr +PhysAddr +FileSiz MemSiz +Flg Align
1692- +PHDR +0x0+34 0x0+10034 0x0+10034 0x0+c0 0x0+c0 R E 0x4
1693- +INTERP +0x0+f4 0x0+100f4 0x0+100f4 0x0+11 0x0+11 R +0x1
1694+ +PHDR +0x0+34 0x0+10034 0x0+10034 (0x[0-9a-f]+) \1 R E 0x4
1695+ +INTERP +(0x[0-9a-f]+ ){3}0x0+11 0x0+11 R +0x1
1696 .*Requesting program interpreter.*
1697 +LOAD .* R E 0x10000
1698 +LOAD .* RW +0x10000
1699 +DYNAMIC .* RW +0x4
1700 +TLS .* 0x0+1060 0x0+10a0 R +0x4
1701+ +PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
1702 #...
1703
1704 Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 4 entries:
1705--- binutils-2.22/ld/testsuite/ld-sparc/tlssunbin64.rd
1706+++ binutils-2.22/ld/testsuite/ld-sparc/tlssunbin64.rd
1707@@ -30,13 +30,14 @@ There are [0-9]+ program headers, starting at offset [0-9]+
1708
1709 Program Headers:
1710 +Type +Offset +VirtAddr +PhysAddr +FileSiz +MemSiz +Flg Align
1711- +PHDR +0x0+40 0x0+100040 0x0+100040 0x0+150 0x0+150 R E 0x8
1712- +INTERP +0x0+190 0x0+100190 0x0+100190 0x0+19 0x0+19 R +0x1
1713+ +PHDR +0x0+40 0x0+100040 0x0+100040 (0x[0-9a-f]+) \1 R E 0x8
1714+ +INTERP +0x0+([0-9a-f]+) (0x0+10+\1) \2 0x0+19 0x0+19 R +0x1
1715 .*Requesting program interpreter.*
1716 +LOAD .* R E 0x100000
1717 +LOAD .* RW +0x100000
1718 +DYNAMIC .* RW +0x8
1719 +TLS .* 0x0+60 0x0+a0 R +0x4
1720+ +PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
1721 #...
1722
1723 Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 4 entries:
1724--- binutils-2.22/ld/testsuite/ld-sparc/tlssunnopic32.rd
1725+++ binutils-2.22/ld/testsuite/ld-sparc/tlssunnopic32.rd
1726@@ -32,6 +32,7 @@ Program Headers:
1727 +LOAD .* RW +0x10000
1728 +DYNAMIC .* RW +0x4
1729 +TLS .* 0x0+ 0x0+24 R +0x4
1730+ +PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
1731 #...
1732
1733 Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 12 entries:
1734--- binutils-2.22/ld/testsuite/ld-sparc/tlssunnopic64.rd
1735+++ binutils-2.22/ld/testsuite/ld-sparc/tlssunnopic64.rd
1736@@ -32,6 +32,7 @@ Program Headers:
1737 +LOAD .* RW +0x100000
1738 +DYNAMIC .* RW +0x8
1739 +TLS .* 0x0+ 0x0+24 R +0x4
1740+ +PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
1741 #...
1742
1743 Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 14 entries:
1744--- binutils-2.22/ld/testsuite/ld-sparc/tlssunpic32.rd
1745+++ binutils-2.22/ld/testsuite/ld-sparc/tlssunpic32.rd
1746@@ -36,6 +36,7 @@ Program Headers:
1747 +LOAD +0x0+2000 0x0+12000 0x0+12000 0x0+184 0x0+184 RWE 0x10000
1748 +DYNAMIC +0x0+2060 0x0+12060 0x0+12060 0x0+98 0x0+98 RW +0x4
1749 +TLS +0x0+2000 0x0+12000 0x0+12000 0x0+60 0x0+80 R +0x4
1750+ +PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
1751 #...
1752
1753 Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 14 entries:
1754--- binutils-2.22/ld/testsuite/ld-sparc/tlssunpic64.rd
1755+++ binutils-2.22/ld/testsuite/ld-sparc/tlssunpic64.rd
1756@@ -36,6 +36,7 @@ Program Headers:
1757 +LOAD +0x0+2000 0x0+102000 0x0+102000 0x0+3a0 0x0+3a0 RWE 0x100000
1758 +DYNAMIC +0x0+2060 0x0+102060 0x0+102060 0x0+130 0x0+130 RW +0x8
1759 +TLS +0x0+2000 0x0+102000 0x0+102000 0x0+60 0x0+80 R +0x4
1760+ +PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
1761 #...
1762
1763 Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 14 entries:
0f64d6ce
MT		 1764--- binutils-2.22/ld/testsuite/ld-x86-64/tlsgdesc.rd
1765+++ binutils-2.22/ld/testsuite/ld-x86-64/tlsgdesc.rd
1766@@ -36,12 +36,14 @@ Program Headers:
1767 +LOAD.*
1768 +LOAD.*
1769 +DYNAMIC.*
1770+ +PAX_FLAGS.*
1771
1772 Section to Segment mapping:
1773 +Segment Sections...
1774 +00 +.hash .dynsym .dynstr .rela.dyn .rela.plt .plt .text *
1775 +01 +.dynamic .got .got.plt *
1776 +02 +.dynamic *
1777+ +03 +
1778
1779 Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 8 entries:
1780 +Offset +Info +Type +Symbol's Value +Symbol's Name \+ Addend
1781--- binutils-2.22/ld/testsuite/ld-x86-64/tlspic.rd
1782+++ binutils-2.22/ld/testsuite/ld-x86-64/tlspic.rd
1783@@ -40,6 +40,7 @@ Program Headers:
1784 +LOAD +0x0+11ac 0x0+2011ac 0x0+2011ac 0x0+244 0x0+244 RW +0x200000
1785 +DYNAMIC +0x0+1210 0x0+201210 0x0+201210 0x0+130 0x0+130 RW +0x8
1786 +TLS +0x0+11ac 0x0+2011ac 0x0+2011ac 0x0+60 0x0+80 R +0x1
1787+ +PAX_FLAGS +0x0+ 0x0+ 0x0+ 0x0+ 0x0+ +0x[48]
1788
1789 Section to Segment mapping:
1790 +Segment Sections...
1791@@ -47,6 +48,7 @@ Program Headers:
1792 +01 +.tdata .dynamic .got .got.plt *
1793 +02 +.dynamic *
1794 +03 +.tdata .tbss *
1795+ +04 +
1796
1797 Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 14 entries:
1798 +Offset +Info +Type +Symbol's Value +Symbol's Name \+ Addend
Alex's tree of IPFire 3.x