[people/arne_f/kernel.git] / arch / arm / boot / dts / imx23.dtsi

/*
 * Copyright 2012 Freescale Semiconductor, Inc.
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

#include "skeleton.dtsi"
#include "imx23-pinfunc.h"

/ {
	interrupt-parent = <&icoll>;

	aliases {
		gpio0 = &gpio0;
		gpio1 = &gpio1;
		gpio2 = &gpio2;
		serial0 = &auart0;
		serial1 = &auart1;
		spi0 = &ssp0;
		spi1 = &ssp1;
	};

	cpus {
		#address-cells = <0>;
		#size-cells = <0>;

		cpu {
			compatible = "arm,arm926ej-s";
			device_type = "cpu";
		};
	};

	apb@80000000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x80000000 0x80000>;
		ranges;

		apbh@80000000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80000000 0x40000>;
			ranges;

			icoll: interrupt-controller@80000000 {
				compatible = "fsl,imx23-icoll", "fsl,icoll";
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x80000000 0x2000>;
			};

			dma_apbh: dma-apbh@80004000 {
				compatible = "fsl,imx23-dma-apbh";
				reg = <0x80004000 0x2000>;
				interrupts = <0 14 20 0
					      13 13 13 13>;
				interrupt-names = "empty", "ssp0", "ssp1", "empty",
						  "gpmi0", "gpmi1", "gpmi2", "gpmi3";
				#dma-cells = <1>;
				dma-channels = <8>;
				clocks = <&clks 15>;
			};

			ecc@80008000 {
				reg = <0x80008000 0x2000>;
				status = "disabled";
			};

			gpmi-nand@8000c000 {
				compatible = "fsl,imx23-gpmi-nand";
				#address-cells = <1>;
				#size-cells = <1>;
				reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
				reg-names = "gpmi-nand", "bch";
				interrupts = <56>;
				interrupt-names = "bch";
				clocks = <&clks 34>;
				clock-names = "gpmi_io";
				dmas = <&dma_apbh 4>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			ssp0: ssp@80010000 {
				reg = <0x80010000 0x2000>;
				interrupts = <15>;
				clocks = <&clks 33>;
				dmas = <&dma_apbh 1>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			etm@80014000 {
				reg = <0x80014000 0x2000>;
				status = "disabled";
			};

			pinctrl@80018000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx23-pinctrl", "simple-bus";
				reg = <0x80018000 0x2000>;

				gpio0: gpio@0 {
					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
					interrupts = <16>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio1: gpio@1 {
					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
					interrupts = <17>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio2: gpio@2 {
					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
					interrupts = <18>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				duart_pins_a: duart@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_PWM0__DUART_RX
						MX23_PAD_PWM1__DUART_TX
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				auart0_pins_a: auart0@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_AUART1_RX__AUART1_RX
						MX23_PAD_AUART1_TX__AUART1_TX
						MX23_PAD_AUART1_CTS__AUART1_CTS
						MX23_PAD_AUART1_RTS__AUART1_RTS
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				auart0_2pins_a: auart0-2pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_I2C_SCL__AUART1_TX
						MX23_PAD_I2C_SDA__AUART1_RX
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				gpmi_pins_a: gpmi-nand@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_GPMI_D00__GPMI_D00
						MX23_PAD_GPMI_D01__GPMI_D01
						MX23_PAD_GPMI_D02__GPMI_D02
						MX23_PAD_GPMI_D03__GPMI_D03
						MX23_PAD_GPMI_D04__GPMI_D04
						MX23_PAD_GPMI_D05__GPMI_D05
						MX23_PAD_GPMI_D06__GPMI_D06
						MX23_PAD_GPMI_D07__GPMI_D07
						MX23_PAD_GPMI_CLE__GPMI_CLE
						MX23_PAD_GPMI_ALE__GPMI_ALE
						MX23_PAD_GPMI_RDY0__GPMI_RDY0
						MX23_PAD_GPMI_RDY1__GPMI_RDY1
						MX23_PAD_GPMI_WPN__GPMI_WPN
						MX23_PAD_GPMI_WRN__GPMI_WRN
						MX23_PAD_GPMI_RDN__GPMI_RDN
						MX23_PAD_GPMI_CE1N__GPMI_CE1N
						MX23_PAD_GPMI_CE0N__GPMI_CE0N
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				gpmi_pins_fixup: gpmi-pins-fixup {
					fsl,pinmux-ids = <
						MX23_PAD_GPMI_WPN__GPMI_WPN
						MX23_PAD_GPMI_WRN__GPMI_WRN
						MX23_PAD_GPMI_RDN__GPMI_RDN
					>;
					fsl,drive-strength = <MXS_DRIVE_12mA>;
				};

				mmc0_4bit_pins_a: mmc0-4bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_SSP1_DATA0__SSP1_DATA0
						MX23_PAD_SSP1_DATA1__SSP1_DATA1
						MX23_PAD_SSP1_DATA2__SSP1_DATA2
						MX23_PAD_SSP1_DATA3__SSP1_DATA3
						MX23_PAD_SSP1_CMD__SSP1_CMD
						MX23_PAD_SSP1_SCK__SSP1_SCK
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				mmc0_8bit_pins_a: mmc0-8bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_SSP1_DATA0__SSP1_DATA0
						MX23_PAD_SSP1_DATA1__SSP1_DATA1
						MX23_PAD_SSP1_DATA2__SSP1_DATA2
						MX23_PAD_SSP1_DATA3__SSP1_DATA3
						MX23_PAD_GPMI_D08__SSP1_DATA4
						MX23_PAD_GPMI_D09__SSP1_DATA5
						MX23_PAD_GPMI_D10__SSP1_DATA6
						MX23_PAD_GPMI_D11__SSP1_DATA7
						MX23_PAD_SSP1_CMD__SSP1_CMD
						MX23_PAD_SSP1_DETECT__SSP1_DETECT
						MX23_PAD_SSP1_SCK__SSP1_SCK
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				mmc0_pins_fixup: mmc0-pins-fixup {
					fsl,pinmux-ids = <
						MX23_PAD_SSP1_DETECT__SSP1_DETECT
						MX23_PAD_SSP1_SCK__SSP1_SCK
					>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				pwm2_pins_a: pwm2@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_PWM2__PWM2
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				lcdif_24bit_pins_a: lcdif-24bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_LCD_D00__LCD_D00
						MX23_PAD_LCD_D01__LCD_D01
						MX23_PAD_LCD_D02__LCD_D02
						MX23_PAD_LCD_D03__LCD_D03
						MX23_PAD_LCD_D04__LCD_D04
						MX23_PAD_LCD_D05__LCD_D05
						MX23_PAD_LCD_D06__LCD_D06
						MX23_PAD_LCD_D07__LCD_D07
						MX23_PAD_LCD_D08__LCD_D08
						MX23_PAD_LCD_D09__LCD_D09
						MX23_PAD_LCD_D10__LCD_D10
						MX23_PAD_LCD_D11__LCD_D11
						MX23_PAD_LCD_D12__LCD_D12
						MX23_PAD_LCD_D13__LCD_D13
						MX23_PAD_LCD_D14__LCD_D14
						MX23_PAD_LCD_D15__LCD_D15
						MX23_PAD_LCD_D16__LCD_D16
						MX23_PAD_LCD_D17__LCD_D17
						MX23_PAD_GPMI_D08__LCD_D18
						MX23_PAD_GPMI_D09__LCD_D19
						MX23_PAD_GPMI_D10__LCD_D20
						MX23_PAD_GPMI_D11__LCD_D21
						MX23_PAD_GPMI_D12__LCD_D22
						MX23_PAD_GPMI_D13__LCD_D23
						MX23_PAD_LCD_DOTCK__LCD_DOTCK
						MX23_PAD_LCD_ENABLE__LCD_ENABLE
						MX23_PAD_LCD_HSYNC__LCD_HSYNC
						MX23_PAD_LCD_VSYNC__LCD_VSYNC
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				spi2_pins_a: spi2@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_GPMI_WRN__SSP2_SCK
						MX23_PAD_GPMI_RDY1__SSP2_CMD
						MX23_PAD_GPMI_D00__SSP2_DATA0
						MX23_PAD_GPMI_D03__SSP2_DATA3
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};
			};

			digctl@8001c000 {
				compatible = "fsl,imx23-digctl";
				reg = <0x8001c000 2000>;
				status = "disabled";
			};

			emi@80020000 {
				reg = <0x80020000 0x2000>;
				status = "disabled";
			};

			dma_apbx: dma-apbx@80024000 {
				compatible = "fsl,imx23-dma-apbx";
				reg = <0x80024000 0x2000>;
				interrupts = <7 5 9 26
					      19 0 25 23
					      60 58 9 0
					      0 0 0 0>;
				interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c",
						  "saif0", "empty", "auart0-rx", "auart0-tx",
						  "auart1-rx", "auart1-tx", "saif1", "empty",
						  "empty", "empty", "empty", "empty";
				#dma-cells = <1>;
				dma-channels = <16>;
				clocks = <&clks 16>;
			};

			dcp@80028000 {
				compatible = "fsl,imx23-dcp";
				reg = <0x80028000 0x2000>;
				interrupts = <53 54>;
				status = "okay";
			};

			pxp@8002a000 {
				reg = <0x8002a000 0x2000>;
				status = "disabled";
			};

			ocotp@8002c000 {
				compatible = "fsl,ocotp";
				reg = <0x8002c000 0x2000>;
				status = "disabled";
			};

			axi-ahb@8002e000 {
				reg = <0x8002e000 0x2000>;
				status = "disabled";
			};

			lcdif@80030000 {
				compatible = "fsl,imx23-lcdif";
				reg = <0x80030000 2000>;
				interrupts = <46 45>;
				clocks = <&clks 38>;
				status = "disabled";
			};

			ssp1: ssp@80034000 {
				reg = <0x80034000 0x2000>;
				interrupts = <2>;
				clocks = <&clks 33>;
				dmas = <&dma_apbh 2>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			tvenc@80038000 {
				reg = <0x80038000 0x2000>;
				status = "disabled";
			};
                };

		apbx@80040000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80040000 0x40000>;
			ranges;

			clks: clkctrl@80040000 {
				compatible = "fsl,imx23-clkctrl", "fsl,clkctrl";
				reg = <0x80040000 0x2000>;
				#clock-cells = <1>;
			};

			saif0: saif@80042000 {
				reg = <0x80042000 0x2000>;
				dmas = <&dma_apbx 4>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			power@80044000 {
				reg = <0x80044000 0x2000>;
				status = "disabled";
			};

			saif1: saif@80046000 {
				reg = <0x80046000 0x2000>;
				dmas = <&dma_apbx 10>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			audio-out@80048000 {
				reg = <0x80048000 0x2000>;
				dmas = <&dma_apbx 1>;
				dma-names = "tx";
				status = "disabled";
			};

			audio-in@8004c000 {
				reg = <0x8004c000 0x2000>;
				dmas = <&dma_apbx 0>;
				dma-names = "rx";
				status = "disabled";
			};

			lradc@80050000 {
				compatible = "fsl,imx23-lradc";
				reg = <0x80050000 0x2000>;
				interrupts = <36 37 38 39 40 41 42 43 44>;
				status = "disabled";
				clocks = <&clks 26>;
			};

			spdif@80054000 {
				reg = <0x80054000 2000>;
				dmas = <&dma_apbx 2>;
				dma-names = "tx";
				status = "disabled";
			};

			i2c@80058000 {
				reg = <0x80058000 0x2000>;
				dmas = <&dma_apbx 3>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			rtc@8005c000 {
				compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
				reg = <0x8005c000 0x2000>;
				interrupts = <22>;
			};

			pwm: pwm@80064000 {
				compatible = "fsl,imx23-pwm";
				reg = <0x80064000 0x2000>;
				clocks = <&clks 30>;
				#pwm-cells = <2>;
				fsl,pwm-number = <5>;
				status = "disabled";
			};

			timrot@80068000 {
				compatible = "fsl,imx23-timrot", "fsl,timrot";
				reg = <0x80068000 0x2000>;
				interrupts = <28 29 30 31>;
				clocks = <&clks 28>;
			};

			auart0: serial@8006c000 {
				compatible = "fsl,imx23-auart";
				reg = <0x8006c000 0x2000>;
				interrupts = <24>;
				clocks = <&clks 32>;
				dmas = <&dma_apbx 6>, <&dma_apbx 7>;
				dma-names = "rx", "tx";
				status = "disabled";
			};

			auart1: serial@8006e000 {
				compatible = "fsl,imx23-auart";
				reg = <0x8006e000 0x2000>;
				interrupts = <59>;
				clocks = <&clks 32>;
				dmas = <&dma_apbx 8>, <&dma_apbx 9>;
				dma-names = "rx", "tx";
				status = "disabled";
			};

			duart: serial@80070000 {
				compatible = "arm,pl011", "arm,primecell";
				reg = <0x80070000 0x2000>;
				interrupts = <0>;
				clocks = <&clks 32>, <&clks 16>;
				clock-names = "uart", "apb_pclk";
				status = "disabled";
			};

			usbphy0: usbphy@8007c000 {
				compatible = "fsl,imx23-usbphy";
				reg = <0x8007c000 0x2000>;
				clocks = <&clks 41>;
				status = "disabled";
			};
		};
	};

	ahb@80080000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x80080000 0x80000>;
		ranges;

		usb0: usb@80080000 {
			compatible = "fsl,imx23-usb", "fsl,imx27-usb";
			reg = <0x80080000 0x40000>;
			interrupts = <11>;
			fsl,usbphy = <&usbphy0>;
			clocks = <&clks 40>;
			status = "disabled";
		};
	};
};
Commit	Line	Data
2954ff39 SG	1	/*
	2	* Copyright 2012 Freescale Semiconductor, Inc.
	3	*
	4	* The code contained herein is licensed under the GNU General Public
	5	* License. You may obtain a copy of the GNU General Public License
	6	* Version 2 or later at the following locations:
	7	*
	8	* http://www.opensource.org/licenses/gpl-license.html
	9	* http://www.gnu.org/copyleft/gpl.html
	10	*/
	11
bc3875f1 LW	12	#include "skeleton.dtsi"
bc3875f1 LW	13	#include "imx23-pinfunc.h"
2954ff39 SG	14
	15	/ {
	16	interrupt-parent = <&icoll>;
	17
ce4c6f9b SG	18	aliases {
	19	gpio0 = &gpio0;
	20	gpio1 = &gpio1;
	21	gpio2 = &gpio2;
a4508394 SG	22	serial0 = &auart0;
a4508394 SG	23	serial1 = &auart1;
6bf6eb09 FE	24	spi0 = &ssp0;
6bf6eb09 FE	25	spi1 = &ssp1;
ce4c6f9b SG	26	};
ce4c6f9b SG	27
2954ff39	28	cpus {
7925e89f LP	29	#address-cells = <0>;
	30	#size-cells = <0>;
	31
	32	cpu {
	33	compatible = "arm,arm926ej-s";
	34	device_type = "cpu";
2954ff39 SG	35	};
	36	};
	37
	38	apb@80000000 {
	39	compatible = "simple-bus";
	40	#address-cells = <1>;
	41	#size-cells = <1>;
	42	reg = <0x80000000 0x80000>;
	43	ranges;
	44
	45	apbh@80000000 {
	46	compatible = "simple-bus";
	47	#address-cells = <1>;
	48	#size-cells = <1>;
	49	reg = <0x80000000 0x40000>;
	50	ranges;
	51
	52	icoll: interrupt-controller@80000000 {
83a84efc	53	compatible = "fsl,imx23-icoll", "fsl,icoll";
2954ff39 SG	54	interrupt-controller;
	55	#interrupt-cells = <1>;
	56	reg = <0x80000000 0x2000>;
	57	};
	58
f30fb03d	59	dma_apbh: dma-apbh@80004000 {
84f3570a	60	compatible = "fsl,imx23-dma-apbh";
640bf060	61	reg = <0x80004000 0x2000>;
f30fb03d SG	62	interrupts = <0 14 20 0
	63	13 13 13 13>;
	64	interrupt-names = "empty", "ssp0", "ssp1", "empty",
	65	"gpmi0", "gpmi1", "gpmi2", "gpmi3";
	66	#dma-cells = <1>;
	67	dma-channels = <8>;
53f9443d	68	clocks = <&clks 15>;
2954ff39 SG	69	};
	70
	71	ecc@80008000 {
640bf060	72	reg = <0x80008000 0x2000>;
2954ff39 SG	73	status = "disabled";
	74	};
	75
a217c46c	76	gpmi-nand@8000c000 {
b9f25f86 HS	77	compatible = "fsl,imx23-gpmi-nand";
	78	#address-cells = <1>;
	79	#size-cells = <1>;
640bf060	80	reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
b9f25f86	81	reg-names = "gpmi-nand", "bch";
7f2b9288 SG	82	interrupts = <56>;
7f2b9288 SG	83	interrupt-names = "bch";
53f9443d	84	clocks = <&clks 34>;
b6442559	85	clock-names = "gpmi_io";
f30fb03d SG	86	dmas = <&dma_apbh 4>;
f30fb03d SG	87	dma-names = "rx-tx";
2954ff39 SG	88	status = "disabled";
	89	};
	90
	91	ssp0: ssp@80010000 {
640bf060	92	reg = <0x80010000 0x2000>;
7f2b9288	93	interrupts = <15>;
53f9443d	94	clocks = <&clks 33>;
f30fb03d SG	95	dmas = <&dma_apbh 1>;
f30fb03d SG	96	dma-names = "rx-tx";
2954ff39 SG	97	status = "disabled";
	98	};
	99
	100	etm@80014000 {
640bf060	101	reg = <0x80014000 0x2000>;
2954ff39 SG	102	status = "disabled";
	103	};
	104
	105	pinctrl@80018000 {
	106	#address-cells = <1>;
	107	#size-cells = <0>;
ce4c6f9b	108	compatible = "fsl,imx23-pinctrl", "simple-bus";
640bf060	109	reg = <0x80018000 0x2000>;
2954ff39	110
ce4c6f9b SG	111	gpio0: gpio@0 {
	112	compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
	113	interrupts = <16>;
	114	gpio-controller;
	115	#gpio-cells = <2>;
	116	interrupt-controller;
	117	#interrupt-cells = <2>;
	118	};
	119
	120	gpio1: gpio@1 {
	121	compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
	122	interrupts = <17>;
	123	gpio-controller;
	124	#gpio-cells = <2>;
	125	interrupt-controller;
	126	#interrupt-cells = <2>;
	127	};
	128
	129	gpio2: gpio@2 {
	130	compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
	131	interrupts = <18>;
	132	gpio-controller;
	133	#gpio-cells = <2>;
	134	interrupt-controller;
	135	#interrupt-cells = <2>;
	136	};
	137
2954ff39 SG	138	duart_pins_a: duart@0 {
2954ff39 SG	139	reg = <0>;
f14da767	140	fsl,pinmux-ids = <
bc3875f1 LW	141	MX23_PAD_PWM0__DUART_RX
bc3875f1 LW	142	MX23_PAD_PWM1__DUART_TX
f14da767	143	>;
4191c340 LW	144	fsl,drive-strength = <MXS_DRIVE_4mA>;
	145	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	146	fsl,pull-up = <MXS_PULL_DISABLE>;
2954ff39	147	};
be1ce308	148
a4508394 SG	149	auart0_pins_a: auart0@0 {
	150	reg = <0>;
	151	fsl,pinmux-ids = <
bc3875f1 LW	152	MX23_PAD_AUART1_RX__AUART1_RX
	153	MX23_PAD_AUART1_TX__AUART1_TX
	154	MX23_PAD_AUART1_CTS__AUART1_CTS
	155	MX23_PAD_AUART1_RTS__AUART1_RTS
a4508394	156	>;
4191c340 LW	157	fsl,drive-strength = <MXS_DRIVE_4mA>;
	158	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	159	fsl,pull-up = <MXS_PULL_DISABLE>;
a4508394 SG	160	};
a4508394 SG	161
98916a2f FE	162	auart0_2pins_a: auart0-2pins@0 {
	163	reg = <0>;
	164	fsl,pinmux-ids = <
bc3875f1 LW	165	MX23_PAD_I2C_SCL__AUART1_TX
bc3875f1 LW	166	MX23_PAD_I2C_SDA__AUART1_RX
98916a2f	167	>;
4191c340 LW	168	fsl,drive-strength = <MXS_DRIVE_4mA>;
	169	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	170	fsl,pull-up = <MXS_PULL_DISABLE>;
98916a2f FE	171	};
98916a2f FE	172
b9f25f86 HS	173	gpmi_pins_a: gpmi-nand@0 {
	174	reg = <0>;
	175	fsl,pinmux-ids = <
bc3875f1 LW	176	MX23_PAD_GPMI_D00__GPMI_D00
	177	MX23_PAD_GPMI_D01__GPMI_D01
	178	MX23_PAD_GPMI_D02__GPMI_D02
	179	MX23_PAD_GPMI_D03__GPMI_D03
	180	MX23_PAD_GPMI_D04__GPMI_D04
	181	MX23_PAD_GPMI_D05__GPMI_D05
	182	MX23_PAD_GPMI_D06__GPMI_D06
	183	MX23_PAD_GPMI_D07__GPMI_D07
	184	MX23_PAD_GPMI_CLE__GPMI_CLE
	185	MX23_PAD_GPMI_ALE__GPMI_ALE
	186	MX23_PAD_GPMI_RDY0__GPMI_RDY0
	187	MX23_PAD_GPMI_RDY1__GPMI_RDY1
	188	MX23_PAD_GPMI_WPN__GPMI_WPN
	189	MX23_PAD_GPMI_WRN__GPMI_WRN
	190	MX23_PAD_GPMI_RDN__GPMI_RDN
	191	MX23_PAD_GPMI_CE1N__GPMI_CE1N
	192	MX23_PAD_GPMI_CE0N__GPMI_CE0N
b9f25f86	193	>;
4191c340 LW	194	fsl,drive-strength = <MXS_DRIVE_4mA>;
	195	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	196	fsl,pull-up = <MXS_PULL_DISABLE>;
b9f25f86 HS	197	};
	198
	199	gpmi_pins_fixup: gpmi-pins-fixup {
	200	fsl,pinmux-ids = <
bc3875f1 LW	201	MX23_PAD_GPMI_WPN__GPMI_WPN
	202	MX23_PAD_GPMI_WRN__GPMI_WRN
	203	MX23_PAD_GPMI_RDN__GPMI_RDN
b9f25f86	204	>;
4191c340	205	fsl,drive-strength = <MXS_DRIVE_12mA>;
b9f25f86 HS	206	};
b9f25f86 HS	207
72beabae SG	208	mmc0_4bit_pins_a: mmc0-4bit@0 {
	209	reg = <0>;
	210	fsl,pinmux-ids = <
bc3875f1 LW	211	MX23_PAD_SSP1_DATA0__SSP1_DATA0
	212	MX23_PAD_SSP1_DATA1__SSP1_DATA1
	213	MX23_PAD_SSP1_DATA2__SSP1_DATA2
	214	MX23_PAD_SSP1_DATA3__SSP1_DATA3
	215	MX23_PAD_SSP1_CMD__SSP1_CMD
	216	MX23_PAD_SSP1_SCK__SSP1_SCK
72beabae	217	>;
4191c340 LW	218	fsl,drive-strength = <MXS_DRIVE_8mA>;
	219	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	220	fsl,pull-up = <MXS_PULL_ENABLE>;
72beabae SG	221	};
72beabae SG	222
be1ce308 SG	223	mmc0_8bit_pins_a: mmc0-8bit@0 {
be1ce308 SG	224	reg = <0>;
f14da767	225	fsl,pinmux-ids = <
bc3875f1 LW	226	MX23_PAD_SSP1_DATA0__SSP1_DATA0
	227	MX23_PAD_SSP1_DATA1__SSP1_DATA1
	228	MX23_PAD_SSP1_DATA2__SSP1_DATA2
	229	MX23_PAD_SSP1_DATA3__SSP1_DATA3
	230	MX23_PAD_GPMI_D08__SSP1_DATA4
	231	MX23_PAD_GPMI_D09__SSP1_DATA5
	232	MX23_PAD_GPMI_D10__SSP1_DATA6
	233	MX23_PAD_GPMI_D11__SSP1_DATA7
	234	MX23_PAD_SSP1_CMD__SSP1_CMD
	235	MX23_PAD_SSP1_DETECT__SSP1_DETECT
	236	MX23_PAD_SSP1_SCK__SSP1_SCK
f14da767	237	>;
4191c340 LW	238	fsl,drive-strength = <MXS_DRIVE_8mA>;
	239	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	240	fsl,pull-up = <MXS_PULL_ENABLE>;
be1ce308 SG	241	};
	242
	243	mmc0_pins_fixup: mmc0-pins-fixup {
f14da767	244	fsl,pinmux-ids = <
bc3875f1 LW	245	MX23_PAD_SSP1_DETECT__SSP1_DETECT
bc3875f1 LW	246	MX23_PAD_SSP1_SCK__SSP1_SCK
f14da767	247	>;
4191c340	248	fsl,pull-up = <MXS_PULL_DISABLE>;
be1ce308	249	};
52f7176b SG	250
	251	pwm2_pins_a: pwm2@0 {
	252	reg = <0>;
	253	fsl,pinmux-ids = <
bc3875f1	254	MX23_PAD_PWM2__PWM2
52f7176b	255	>;
4191c340 LW	256	fsl,drive-strength = <MXS_DRIVE_4mA>;
	257	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	258	fsl,pull-up = <MXS_PULL_DISABLE>;
52f7176b	259	};
a915ee42 SG	260
	261	lcdif_24bit_pins_a: lcdif-24bit@0 {
	262	reg = <0>;
	263	fsl,pinmux-ids = <
bc3875f1 LW	264	MX23_PAD_LCD_D00__LCD_D00
	265	MX23_PAD_LCD_D01__LCD_D01
	266	MX23_PAD_LCD_D02__LCD_D02
	267	MX23_PAD_LCD_D03__LCD_D03
	268	MX23_PAD_LCD_D04__LCD_D04
	269	MX23_PAD_LCD_D05__LCD_D05
	270	MX23_PAD_LCD_D06__LCD_D06
	271	MX23_PAD_LCD_D07__LCD_D07
	272	MX23_PAD_LCD_D08__LCD_D08
	273	MX23_PAD_LCD_D09__LCD_D09
	274	MX23_PAD_LCD_D10__LCD_D10
	275	MX23_PAD_LCD_D11__LCD_D11
	276	MX23_PAD_LCD_D12__LCD_D12
	277	MX23_PAD_LCD_D13__LCD_D13
	278	MX23_PAD_LCD_D14__LCD_D14
	279	MX23_PAD_LCD_D15__LCD_D15
	280	MX23_PAD_LCD_D16__LCD_D16
	281	MX23_PAD_LCD_D17__LCD_D17
	282	MX23_PAD_GPMI_D08__LCD_D18
	283	MX23_PAD_GPMI_D09__LCD_D19
	284	MX23_PAD_GPMI_D10__LCD_D20
	285	MX23_PAD_GPMI_D11__LCD_D21
	286	MX23_PAD_GPMI_D12__LCD_D22
	287	MX23_PAD_GPMI_D13__LCD_D23
	288	MX23_PAD_LCD_DOTCK__LCD_DOTCK
	289	MX23_PAD_LCD_ENABLE__LCD_ENABLE
	290	MX23_PAD_LCD_HSYNC__LCD_HSYNC
	291	MX23_PAD_LCD_VSYNC__LCD_VSYNC
a915ee42	292	>;
4191c340 LW	293	fsl,drive-strength = <MXS_DRIVE_4mA>;
	294	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	295	fsl,pull-up = <MXS_PULL_DISABLE>;
a915ee42	296	};
a0487864 FB	297
	298	spi2_pins_a: spi2@0 {
	299	reg = <0>;
	300	fsl,pinmux-ids = <
bc3875f1 LW	301	MX23_PAD_GPMI_WRN__SSP2_SCK
	302	MX23_PAD_GPMI_RDY1__SSP2_CMD
	303	MX23_PAD_GPMI_D00__SSP2_DATA0
	304	MX23_PAD_GPMI_D03__SSP2_DATA3
a0487864	305	>;
4191c340 LW	306	fsl,drive-strength = <MXS_DRIVE_8mA>;
	307	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	308	fsl,pull-up = <MXS_PULL_ENABLE>;
a0487864	309	};
2954ff39 SG	310	};
	311
	312	digctl@8001c000 {
38d6590f	313	compatible = "fsl,imx23-digctl";
2954ff39 SG	314	reg = <0x8001c000 2000>;
	315	status = "disabled";
	316	};
	317
	318	emi@80020000 {
640bf060	319	reg = <0x80020000 0x2000>;
2954ff39 SG	320	status = "disabled";
	321	};
	322
f30fb03d	323	dma_apbx: dma-apbx@80024000 {
84f3570a	324	compatible = "fsl,imx23-dma-apbx";
640bf060	325	reg = <0x80024000 0x2000>;
f30fb03d SG	326	interrupts = <7 5 9 26
	327	19 0 25 23
	328	60 58 9 0
	329	0 0 0 0>;
	330	interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c",
	331	"saif0", "empty", "auart0-rx", "auart0-tx",
	332	"auart1-rx", "auart1-tx", "saif1", "empty",
	333	"empty", "empty", "empty", "empty";
	334	#dma-cells = <1>;
	335	dma-channels = <16>;
53f9443d	336	clocks = <&clks 16>;
2954ff39 SG	337	};
	338
	339	dcp@80028000 {
7d56a28f	340	compatible = "fsl,imx23-dcp";
640bf060	341	reg = <0x80028000 0x2000>;
7d56a28f MV	342	interrupts = <53 54>;
7d56a28f MV	343	status = "okay";
2954ff39 SG	344	};
	345
	346	pxp@8002a000 {
640bf060	347	reg = <0x8002a000 0x2000>;
2954ff39 SG	348	status = "disabled";
	349	};
	350
	351	ocotp@8002c000 {
69d75a02	352	compatible = "fsl,ocotp";
640bf060	353	reg = <0x8002c000 0x2000>;
2954ff39 SG	354	status = "disabled";
	355	};
	356
	357	axi-ahb@8002e000 {
640bf060	358	reg = <0x8002e000 0x2000>;
2954ff39 SG	359	status = "disabled";
	360	};
	361
	362	lcdif@80030000 {
a915ee42	363	compatible = "fsl,imx23-lcdif";
2954ff39	364	reg = <0x80030000 2000>;
a915ee42	365	interrupts = <46 45>;
53f9443d	366	clocks = <&clks 38>;
2954ff39 SG	367	status = "disabled";
	368	};
	369
	370	ssp1: ssp@80034000 {
640bf060	371	reg = <0x80034000 0x2000>;
7f2b9288	372	interrupts = <2>;
53f9443d	373	clocks = <&clks 33>;
f30fb03d SG	374	dmas = <&dma_apbh 2>;
f30fb03d SG	375	dma-names = "rx-tx";
2954ff39 SG	376	status = "disabled";
	377	};
	378
	379	tvenc@80038000 {
640bf060	380	reg = <0x80038000 0x2000>;
2954ff39 SG	381	status = "disabled";
	382	};
	383	};
	384
	385	apbx@80040000 {
	386	compatible = "simple-bus";
	387	#address-cells = <1>;
	388	#size-cells = <1>;
	389	reg = <0x80040000 0x40000>;
	390	ranges;
	391
53f9443d	392	clks: clkctrl@80040000 {
8f7cf881	393	compatible = "fsl,imx23-clkctrl", "fsl,clkctrl";
640bf060	394	reg = <0x80040000 0x2000>;
53f9443d	395	#clock-cells = <1>;
2954ff39 SG	396	};
	397
	398	saif0: saif@80042000 {
640bf060	399	reg = <0x80042000 0x2000>;
f30fb03d SG	400	dmas = <&dma_apbx 4>;
f30fb03d SG	401	dma-names = "rx-tx";
2954ff39 SG	402	status = "disabled";
	403	};
	404
	405	power@80044000 {
640bf060	406	reg = <0x80044000 0x2000>;
2954ff39 SG	407	status = "disabled";
	408	};
	409
	410	saif1: saif@80046000 {
640bf060	411	reg = <0x80046000 0x2000>;
f30fb03d SG	412	dmas = <&dma_apbx 10>;
f30fb03d SG	413	dma-names = "rx-tx";
2954ff39 SG	414	status = "disabled";
	415	};
	416
	417	audio-out@80048000 {
640bf060	418	reg = <0x80048000 0x2000>;
f30fb03d SG	419	dmas = <&dma_apbx 1>;
f30fb03d SG	420	dma-names = "tx";
2954ff39 SG	421	status = "disabled";
	422	};
	423
	424	audio-in@8004c000 {
640bf060	425	reg = <0x8004c000 0x2000>;
f30fb03d SG	426	dmas = <&dma_apbx 0>;
f30fb03d SG	427	dma-names = "rx";
2954ff39 SG	428	status = "disabled";
	429	};
	430
	431	lradc@80050000 {
1f45188c	432	compatible = "fsl,imx23-lradc";
640bf060	433	reg = <0x80050000 0x2000>;
1f45188c	434	interrupts = <36 37 38 39 40 41 42 43 44>;
2954ff39	435	status = "disabled";
18da755d	436	clocks = <&clks 26>;
2954ff39 SG	437	};
	438
	439	spdif@80054000 {
	440	reg = <0x80054000 2000>;
f30fb03d SG	441	dmas = <&dma_apbx 2>;
f30fb03d SG	442	dma-names = "tx";
2954ff39 SG	443	status = "disabled";
	444	};
	445
	446	i2c@80058000 {
640bf060	447	reg = <0x80058000 0x2000>;
f30fb03d SG	448	dmas = <&dma_apbx 3>;
f30fb03d SG	449	dma-names = "rx-tx";
2954ff39 SG	450	status = "disabled";
	451	};
	452
	453	rtc@8005c000 {
f98c990c	454	compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
640bf060	455	reg = <0x8005c000 0x2000>;
f98c990c	456	interrupts = <22>;
2954ff39 SG	457	};
2954ff39 SG	458
52f7176b SG	459	pwm: pwm@80064000 {
52f7176b SG	460	compatible = "fsl,imx23-pwm";
640bf060	461	reg = <0x80064000 0x2000>;
53f9443d	462	clocks = <&clks 30>;
52f7176b SG	463	#pwm-cells = <2>;
52f7176b SG	464	fsl,pwm-number = <5>;
2954ff39 SG	465	status = "disabled";
	466	};
	467
	468	timrot@80068000 {
eeca6e60	469	compatible = "fsl,imx23-timrot", "fsl,timrot";
640bf060	470	reg = <0x80068000 0x2000>;
eeca6e60	471	interrupts = <28 29 30 31>;
2efb9504	472	clocks = <&clks 28>;
2954ff39 SG	473	};
	474
	475	auart0: serial@8006c000 {
a4508394	476	compatible = "fsl,imx23-auart";
2954ff39	477	reg = <0x8006c000 0x2000>;
7f2b9288	478	interrupts = <24>;
53f9443d	479	clocks = <&clks 32>;
f30fb03d SG	480	dmas = <&dma_apbx 6>, <&dma_apbx 7>;
f30fb03d SG	481	dma-names = "rx", "tx";
2954ff39 SG	482	status = "disabled";
	483	};
	484
	485	auart1: serial@8006e000 {
a4508394	486	compatible = "fsl,imx23-auart";
2954ff39	487	reg = <0x8006e000 0x2000>;
7f2b9288	488	interrupts = <59>;
53f9443d	489	clocks = <&clks 32>;
f30fb03d SG	490	dmas = <&dma_apbx 8>, <&dma_apbx 9>;
f30fb03d SG	491	dma-names = "rx", "tx";
2954ff39 SG	492	status = "disabled";
	493	};
	494
	495	duart: serial@80070000 {
	496	compatible = "arm,pl011", "arm,primecell";
	497	reg = <0x80070000 0x2000>;
	498	interrupts = <0>;
53f9443d SG	499	clocks = <&clks 32>, <&clks 16>;
53f9443d SG	500	clock-names = "uart", "apb_pclk";
2954ff39 SG	501	status = "disabled";
	502	};
	503
d6475317 FE	504	usbphy0: usbphy@8007c000 {
d6475317 FE	505	compatible = "fsl,imx23-usbphy";
2954ff39	506	reg = <0x8007c000 0x2000>;
d6475317	507	clocks = <&clks 41>;
2954ff39 SG	508	status = "disabled";
	509	};
	510	};
	511	};
	512
	513	ahb@80080000 {
	514	compatible = "simple-bus";
	515	#address-cells = <1>;
	516	#size-cells = <1>;
	517	reg = <0x80080000 0x80000>;
	518	ranges;
	519
d6475317 FE	520	usb0: usb@80080000 {
d6475317 FE	521	compatible = "fsl,imx23-usb", "fsl,imx27-usb";
640bf060	522	reg = <0x80080000 0x40000>;
d6475317 FE	523	interrupts = <11>;
	524	fsl,usbphy = <&usbphy0>;
	525	clocks = <&clks 40>;
2954ff39 SG	526	status = "disabled";
	527	};
	528	};
	529	};