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66314223 DN |
1 | /* |
2 | * Copyright (C) 2012 Altera Corporation <www.altera.com> | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License as published by | |
6 | * the Free Software Foundation; either version 2 of the License, or | |
7 | * (at your option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
16 | */ | |
17 | ||
18 | /dts-v1/; | |
19 | /include/ "socfpga.dtsi" | |
20 | ||
21 | / { | |
c2ad2844 | 22 | soc { |
042000b0 DN |
23 | clkmgr@ffd04000 { |
24 | clocks { | |
25 | osc1 { | |
26 | clock-frequency = <25000000>; | |
27 | }; | |
28 | }; | |
29 | }; | |
30 | ||
3d954cf1 DN |
31 | ethernet@ff702000 { |
32 | phy-mode = "rgmii"; | |
33 | phy-addr = <0xffffffff>; /* probe for phy addr */ | |
34 | status = "okay"; | |
35 | }; | |
36 | ||
c2ad2844 DN |
37 | timer0@ffc08000 { |
38 | clock-frequency = <100000000>; | |
39 | }; | |
40 | ||
41 | timer1@ffc09000 { | |
42 | clock-frequency = <100000000>; | |
43 | }; | |
44 | ||
45 | timer2@ffd00000 { | |
46 | clock-frequency = <25000000>; | |
47 | }; | |
48 | ||
49 | timer3@ffd01000 { | |
50 | clock-frequency = <25000000>; | |
51 | }; | |
52 | ||
53 | serial0@ffc02000 { | |
54 | clock-frequency = <100000000>; | |
55 | }; | |
56 | ||
57 | serial1@ffc03000 { | |
58 | clock-frequency = <100000000>; | |
59 | }; | |
d6dd735f DN |
60 | |
61 | sysmgr@ffd08000 { | |
62 | cpu1-start-addr = <0xffd080c4>; | |
63 | }; | |
66314223 DN |
64 | }; |
65 | }; |