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[people/arne_f/kernel.git] / arch / x86 / kernel / fpu / xstate.c
CommitLineData
dc1e35c6
SS
1/*
2 * xsave/xrstor support.
3 *
4 * Author: Suresh Siddha <suresh.b.siddha@intel.com>
5 */
dc1e35c6 6#include <linux/compat.h>
7e7ce87f 7#include <linux/cpu.h>
e8c24d3a 8#include <linux/mman.h>
84594296 9#include <linux/pkeys.h>
59a36d16 10
df6b35f4 11#include <asm/fpu/api.h>
78f7f1e5 12#include <asm/fpu/internal.h>
fcbc99c4 13#include <asm/fpu/signal.h>
59a36d16 14#include <asm/fpu/regset.h>
91c3dba7 15#include <asm/fpu/xstate.h>
b992c660 16
375074cc 17#include <asm/tlbflush.h>
dc1e35c6 18
1f96b1ef
DH
19/*
20 * Although we spell it out in here, the Processor Trace
21 * xfeature is completely unused. We use other mechanisms
22 * to save/restore PT state in Linux.
23 */
5b073430
IM
24static const char *xfeature_names[] =
25{
26 "x87 floating point registers" ,
27 "SSE registers" ,
28 "AVX registers" ,
29 "MPX bounds registers" ,
30 "MPX CSR" ,
31 "AVX-512 opmask" ,
32 "AVX-512 Hi256" ,
33 "AVX-512 ZMM_Hi256" ,
1f96b1ef 34 "Processor Trace (unused)" ,
c8df4009 35 "Protection Keys User registers",
5b073430
IM
36 "unknown xstate feature" ,
37};
38
dc1e35c6 39/*
614df7fb 40 * Mask of xstate features supported by the CPU and the kernel:
dc1e35c6 41 */
5b073430 42u64 xfeatures_mask __read_mostly;
dc1e35c6 43
dad8c4fe
DH
44static unsigned int xstate_offsets[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1};
45static unsigned int xstate_sizes[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1};
614df7fb 46static unsigned int xstate_comp_offsets[sizeof(xfeatures_mask)*8];
84246fe4 47
a1141e0b
FY
48/*
49 * The XSAVE area of kernel can be in standard or compacted format;
50 * it is always in standard format for user mode. This is the user
51 * mode standard format size used for signal and ptrace frames.
52 */
53unsigned int fpu_user_xstate_size;
54
0a265375
DH
55/*
56 * Clear all of the X86_FEATURE_* bits that are unavailable
57 * when the CPU has no XSAVE support.
58 */
59void fpu__xstate_clear_all_cpu_caps(void)
60{
61 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
62 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
63 setup_clear_cpu_cap(X86_FEATURE_XSAVEC);
64 setup_clear_cpu_cap(X86_FEATURE_XSAVES);
65 setup_clear_cpu_cap(X86_FEATURE_AVX);
66 setup_clear_cpu_cap(X86_FEATURE_AVX2);
67 setup_clear_cpu_cap(X86_FEATURE_AVX512F);
a8d9df5a 68 setup_clear_cpu_cap(X86_FEATURE_AVX512IFMA);
0a265375
DH
69 setup_clear_cpu_cap(X86_FEATURE_AVX512PF);
70 setup_clear_cpu_cap(X86_FEATURE_AVX512ER);
71 setup_clear_cpu_cap(X86_FEATURE_AVX512CD);
d0500494
FY
72 setup_clear_cpu_cap(X86_FEATURE_AVX512DQ);
73 setup_clear_cpu_cap(X86_FEATURE_AVX512BW);
74 setup_clear_cpu_cap(X86_FEATURE_AVX512VL);
0a265375 75 setup_clear_cpu_cap(X86_FEATURE_MPX);
eb7c5f87 76 setup_clear_cpu_cap(X86_FEATURE_XGETBV1);
a8d9df5a 77 setup_clear_cpu_cap(X86_FEATURE_AVX512VBMI);
c8df4009 78 setup_clear_cpu_cap(X86_FEATURE_PKU);
82148993
PL
79 setup_clear_cpu_cap(X86_FEATURE_AVX512_4VNNIW);
80 setup_clear_cpu_cap(X86_FEATURE_AVX512_4FMAPS);
06b35d93 81 setup_clear_cpu_cap(X86_FEATURE_AVX512_VPOPCNTDQ);
0a265375
DH
82}
83
5b073430
IM
84/*
85 * Return whether the system supports a given xfeature.
86 *
87 * Also return the name of the (most advanced) feature that the caller requested:
88 */
89int cpu_has_xfeatures(u64 xfeatures_needed, const char **feature_name)
90{
91 u64 xfeatures_missing = xfeatures_needed & ~xfeatures_mask;
92
93 if (unlikely(feature_name)) {
94 long xfeature_idx, max_idx;
95 u64 xfeatures_print;
96 /*
97 * So we use FLS here to be able to print the most advanced
98 * feature that was requested but is missing. So if a driver
d91cab78 99 * asks about "XFEATURE_MASK_SSE | XFEATURE_MASK_YMM" we'll print the
5b073430
IM
100 * missing AVX feature - this is the most informative message
101 * to users:
102 */
103 if (xfeatures_missing)
104 xfeatures_print = xfeatures_missing;
105 else
106 xfeatures_print = xfeatures_needed;
107
108 xfeature_idx = fls64(xfeatures_print)-1;
109 max_idx = ARRAY_SIZE(xfeature_names)-1;
110 xfeature_idx = min(xfeature_idx, max_idx);
111
112 *feature_name = xfeature_names[xfeature_idx];
113 }
114
115 if (xfeatures_missing)
116 return 0;
117
118 return 1;
119}
120EXPORT_SYMBOL_GPL(cpu_has_xfeatures);
121
1499ce2d
YY
122static int xfeature_is_supervisor(int xfeature_nr)
123{
124 /*
125 * We currently do not support supervisor states, but if
126 * we did, we could find out like this.
127 *
128 * SDM says: If state component 'i' is a user state component,
129 * ECX[0] return 0; if state component i is a supervisor
130 * state component, ECX[0] returns 1.
131 */
132 u32 eax, ebx, ecx, edx;
133
134 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
135 return !!(ecx & 1);
136}
137
138static int xfeature_is_user(int xfeature_nr)
139{
140 return !xfeature_is_supervisor(xfeature_nr);
141}
142
29104e10 143/*
aeb997b9
IM
144 * When executing XSAVEOPT (or other optimized XSAVE instructions), if
145 * a processor implementation detects that an FPU state component is still
146 * (or is again) in its initialized state, it may clear the corresponding
147 * bit in the header.xfeatures field, and can skip the writeout of registers
148 * to the corresponding memory layout.
73a3aeb3
IM
149 *
150 * This means that when the bit is zero, the state component might still contain
151 * some previous - non-initialized register state.
152 *
153 * Before writing xstate information to user-space we sanitize those components,
154 * to always ensure that the memory layout of a feature will be in the init state
155 * if the corresponding header bit is zero. This is to ensure that user-space doesn't
156 * see some stale state in the memory layout during signal handling, debugging etc.
29104e10 157 */
36e49e7f 158void fpstate_sanitize_xstate(struct fpu *fpu)
29104e10 159{
c47ada30 160 struct fxregs_state *fx = &fpu->state.fxsave;
73a3aeb3 161 int feature_bit;
400e4b20 162 u64 xfeatures;
29104e10 163
1ac91a76 164 if (!use_xsaveopt())
29104e10
SS
165 return;
166
36e49e7f 167 xfeatures = fpu->state.xsave.header.xfeatures;
29104e10
SS
168
169 /*
170 * None of the feature bits are in init state. So nothing else
0d2eb44f 171 * to do for us, as the memory layout is up to date.
29104e10 172 */
400e4b20 173 if ((xfeatures & xfeatures_mask) == xfeatures_mask)
29104e10
SS
174 return;
175
176 /*
177 * FP is in init state
178 */
d91cab78 179 if (!(xfeatures & XFEATURE_MASK_FP)) {
29104e10
SS
180 fx->cwd = 0x37f;
181 fx->swd = 0;
182 fx->twd = 0;
183 fx->fop = 0;
184 fx->rip = 0;
185 fx->rdp = 0;
186 memset(&fx->st_space[0], 0, 128);
187 }
188
189 /*
190 * SSE is in init state
191 */
d91cab78 192 if (!(xfeatures & XFEATURE_MASK_SSE))
29104e10
SS
193 memset(&fx->xmm_space[0], 0, 256);
194
73a3aeb3
IM
195 /*
196 * First two features are FPU and SSE, which above we handled
197 * in a special way already:
198 */
199 feature_bit = 0x2;
400e4b20 200 xfeatures = (xfeatures_mask & ~xfeatures) >> 2;
29104e10
SS
201
202 /*
73a3aeb3
IM
203 * Update all the remaining memory layouts according to their
204 * standard xstate layout, if their header bit is in the init
205 * state:
29104e10 206 */
400e4b20
IM
207 while (xfeatures) {
208 if (xfeatures & 0x1) {
a1141e0b 209 int offset = xstate_comp_offsets[feature_bit];
29104e10
SS
210 int size = xstate_sizes[feature_bit];
211
73a3aeb3 212 memcpy((void *)fx + offset,
6f575023 213 (void *)&init_fpstate.xsave + offset,
29104e10
SS
214 size);
215 }
216
400e4b20 217 xfeatures >>= 1;
29104e10
SS
218 feature_bit++;
219 }
220}
221
dc1e35c6 222/*
55cc4678
IM
223 * Enable the extended processor state save/restore feature.
224 * Called once per CPU onlining.
dc1e35c6 225 */
55cc4678 226void fpu__init_cpu_xstate(void)
dc1e35c6 227{
d366bf7e 228 if (!boot_cpu_has(X86_FEATURE_XSAVE) || !xfeatures_mask)
55cc4678 229 return;
b8be15d5
YY
230 /*
231 * Make it clear that XSAVES supervisor states are not yet
232 * implemented should anyone expect it to work by changing
233 * bits in XFEATURE_MASK_* macros and XCR0.
234 */
235 WARN_ONCE((xfeatures_mask & XFEATURE_MASK_SUPERVISOR),
236 "x86/fpu: XSAVES supervisor states are not yet implemented.\n");
237
238 xfeatures_mask &= ~XFEATURE_MASK_SUPERVISOR;
55cc4678 239
375074cc 240 cr4_set_bits(X86_CR4_OSXSAVE);
614df7fb 241 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
dc1e35c6
SS
242}
243
e6e888f9
DH
244/*
245 * Note that in the future we will likely need a pair of
246 * functions here: one for user xstates and the other for
247 * system xstates. For now, they are the same.
248 */
249static int xfeature_enabled(enum xfeature xfeature)
250{
251 return !!(xfeatures_mask & (1UL << xfeature));
252}
253
a1488f8b 254/*
39f1acd2
IM
255 * Record the offsets and sizes of various xstates contained
256 * in the XSAVE state memory layout.
a1488f8b 257 */
4995b9db 258static void __init setup_xstate_features(void)
a1488f8b 259{
ee9ae257 260 u32 eax, ebx, ecx, edx, i;
e6e888f9
DH
261 /* start at the beginnning of the "extended state" */
262 unsigned int last_good_offset = offsetof(struct xregs_state,
263 extended_state_area);
ac73b27a
YY
264 /*
265 * The FP xstates and SSE xstates are legacy states. They are always
266 * in the fixed offsets in the xsave area in either compacted form
267 * or standard form.
268 */
269 xstate_offsets[0] = 0;
270 xstate_sizes[0] = offsetof(struct fxregs_state, xmm_space);
271 xstate_offsets[1] = xstate_sizes[0];
272 xstate_sizes[1] = FIELD_SIZEOF(struct fxregs_state, xmm_space);
a1488f8b 273
ee9ae257 274 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
e6e888f9
DH
275 if (!xfeature_enabled(i))
276 continue;
a1488f8b 277
e6e888f9 278 cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
1499ce2d
YY
279
280 /*
281 * If an xfeature is supervisor state, the offset
282 * in EBX is invalid. We leave it to -1.
283 */
284 if (xfeature_is_user(i))
285 xstate_offsets[i] = ebx;
286
ee9ae257 287 xstate_sizes[i] = eax;
e6e888f9
DH
288 /*
289 * In our xstate size checks, we assume that the
290 * highest-numbered xstate feature has the
291 * highest offset in the buffer. Ensure it does.
292 */
293 WARN_ONCE(last_good_offset > xstate_offsets[i],
294 "x86/fpu: misordered xstate at %d\n", last_good_offset);
295 last_good_offset = xstate_offsets[i];
39f1acd2 296 }
a1488f8b
SS
297}
298
32231879 299static void __init print_xstate_feature(u64 xstate_mask)
69496e10 300{
33588b52 301 const char *feature_name;
69496e10 302
33588b52 303 if (cpu_has_xfeatures(xstate_mask, &feature_name))
c8df4009 304 pr_info("x86/fpu: Supporting XSAVE feature 0x%03Lx: '%s'\n", xstate_mask, feature_name);
69496e10
IM
305}
306
307/*
308 * Print out all the supported xstate features:
309 */
32231879 310static void __init print_xstate_features(void)
69496e10 311{
d91cab78
DH
312 print_xstate_feature(XFEATURE_MASK_FP);
313 print_xstate_feature(XFEATURE_MASK_SSE);
314 print_xstate_feature(XFEATURE_MASK_YMM);
315 print_xstate_feature(XFEATURE_MASK_BNDREGS);
316 print_xstate_feature(XFEATURE_MASK_BNDCSR);
317 print_xstate_feature(XFEATURE_MASK_OPMASK);
318 print_xstate_feature(XFEATURE_MASK_ZMM_Hi256);
319 print_xstate_feature(XFEATURE_MASK_Hi16_ZMM);
c8df4009 320 print_xstate_feature(XFEATURE_MASK_PKRU);
69496e10
IM
321}
322
03482e08
YY
323/*
324 * This check is important because it is easy to get XSTATE_*
325 * confused with XSTATE_BIT_*.
326 */
327#define CHECK_XFEATURE(nr) do { \
328 WARN_ON(nr < FIRST_EXTENDED_XFEATURE); \
329 WARN_ON(nr >= XFEATURE_MAX); \
330} while (0)
331
332/*
333 * We could cache this like xstate_size[], but we only use
334 * it here, so it would be a waste of space.
335 */
336static int xfeature_is_aligned(int xfeature_nr)
337{
338 u32 eax, ebx, ecx, edx;
339
340 CHECK_XFEATURE(xfeature_nr);
341 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
342 /*
343 * The value returned by ECX[1] indicates the alignment
344 * of state component 'i' when the compacted format
345 * of the extended region of an XSAVE area is used:
346 */
347 return !!(ecx & 2);
348}
349
7496d645
FY
350/*
351 * This function sets up offsets and sizes of all extended states in
352 * xsave area. This supports both standard format and compacted format
353 * of the xsave aread.
7496d645 354 */
32231879 355static void __init setup_xstate_comp(void)
7496d645 356{
614df7fb 357 unsigned int xstate_comp_sizes[sizeof(xfeatures_mask)*8];
7496d645
FY
358 int i;
359
8ff925e1
FY
360 /*
361 * The FP xstates and SSE xstates are legacy states. They are always
362 * in the fixed offsets in the xsave area in either compacted form
363 * or standard form.
364 */
365 xstate_comp_offsets[0] = 0;
c47ada30 366 xstate_comp_offsets[1] = offsetof(struct fxregs_state, xmm_space);
7496d645 367
782511b0 368 if (!boot_cpu_has(X86_FEATURE_XSAVES)) {
ee9ae257 369 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
633d54c4 370 if (xfeature_enabled(i)) {
7496d645
FY
371 xstate_comp_offsets[i] = xstate_offsets[i];
372 xstate_comp_sizes[i] = xstate_sizes[i];
373 }
374 }
375 return;
376 }
377
8a93c9e0
DH
378 xstate_comp_offsets[FIRST_EXTENDED_XFEATURE] =
379 FXSAVE_SIZE + XSAVE_HDR_SIZE;
7496d645 380
ee9ae257 381 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
633d54c4 382 if (xfeature_enabled(i))
7496d645
FY
383 xstate_comp_sizes[i] = xstate_sizes[i];
384 else
385 xstate_comp_sizes[i] = 0;
386
03482e08 387 if (i > FIRST_EXTENDED_XFEATURE) {
7496d645
FY
388 xstate_comp_offsets[i] = xstate_comp_offsets[i-1]
389 + xstate_comp_sizes[i-1];
390
03482e08
YY
391 if (xfeature_is_aligned(i))
392 xstate_comp_offsets[i] =
393 ALIGN(xstate_comp_offsets[i], 64);
394 }
7496d645
FY
395 }
396}
397
996952e0
YY
398/*
399 * Print out xstate component offsets and sizes
400 */
401static void __init print_xstate_offset_size(void)
402{
403 int i;
404
405 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
406 if (!xfeature_enabled(i))
407 continue;
408 pr_info("x86/fpu: xstate_offset[%d]: %4d, xstate_sizes[%d]: %4d\n",
409 i, xstate_comp_offsets[i], i, xstate_sizes[i]);
410 }
411}
412
dc1e35c6
SS
413/*
414 * setup the xstate image representing the init state
415 */
32231879 416static void __init setup_init_fpu_buf(void)
dc1e35c6 417{
e49a449b 418 static int on_boot_cpu __initdata = 1;
e97131a8
IM
419
420 WARN_ON_FPU(!on_boot_cpu);
421 on_boot_cpu = 0;
422
d366bf7e 423 if (!boot_cpu_has(X86_FEATURE_XSAVE))
5d2bd700
SS
424 return;
425
426 setup_xstate_features();
69496e10 427 print_xstate_features();
a1488f8b 428
7d937060 429 if (boot_cpu_has(X86_FEATURE_XSAVES))
6f575023 430 init_fpstate.xsave.header.xcomp_bv = (u64)1 << 63 | xfeatures_mask;
47c2f292 431
29104e10 432 /*
7d937060 433 * Init all the features state with header.xfeatures being 0x0
29104e10 434 */
d65fcd60 435 copy_kernel_to_xregs_booting(&init_fpstate.xsave);
3e261c14 436
29104e10
SS
437 /*
438 * Dump the init state again. This is to identify the init state
439 * of any feature which is not represented by all zero's.
440 */
c6813144 441 copy_xregs_to_kernel_booting(&init_fpstate.xsave);
dc1e35c6
SS
442}
443
65ac2e9b
DH
444static int xfeature_uncompacted_offset(int xfeature_nr)
445{
446 u32 eax, ebx, ecx, edx;
447
1499ce2d
YY
448 /*
449 * Only XSAVES supports supervisor states and it uses compacted
450 * format. Checking a supervisor state's uncompacted offset is
451 * an error.
452 */
453 if (XFEATURE_MASK_SUPERVISOR & (1 << xfeature_nr)) {
454 WARN_ONCE(1, "No fixed offset for xstate %d\n", xfeature_nr);
455 return -1;
456 }
457
65ac2e9b
DH
458 CHECK_XFEATURE(xfeature_nr);
459 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
460 return ebx;
461}
462
463static int xfeature_size(int xfeature_nr)
464{
465 u32 eax, ebx, ecx, edx;
466
467 CHECK_XFEATURE(xfeature_nr);
468 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
469 return eax;
470}
471
472/*
473 * 'XSAVES' implies two different things:
474 * 1. saving of supervisor/system state
475 * 2. using the compacted format
476 *
477 * Use this function when dealing with the compacted format so
478 * that it is obvious which aspect of 'XSAVES' is being handled
479 * by the calling code.
480 */
99aa22d0 481int using_compacted_format(void)
65ac2e9b 482{
782511b0 483 return boot_cpu_has(X86_FEATURE_XSAVES);
65ac2e9b
DH
484}
485
486static void __xstate_dump_leaves(void)
487{
488 int i;
489 u32 eax, ebx, ecx, edx;
490 static int should_dump = 1;
491
492 if (!should_dump)
493 return;
494 should_dump = 0;
495 /*
496 * Dump out a few leaves past the ones that we support
497 * just in case there are some goodies up there
498 */
499 for (i = 0; i < XFEATURE_MAX + 10; i++) {
500 cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
501 pr_warn("CPUID[%02x, %02x]: eax=%08x ebx=%08x ecx=%08x edx=%08x\n",
502 XSTATE_CPUID, i, eax, ebx, ecx, edx);
503 }
504}
505
506#define XSTATE_WARN_ON(x) do { \
507 if (WARN_ONCE(x, "XSAVE consistency problem, dumping leaves")) { \
508 __xstate_dump_leaves(); \
509 } \
510} while (0)
511
ef78f2a4
DH
512#define XCHECK_SZ(sz, nr, nr_macro, __struct) do { \
513 if ((nr == nr_macro) && \
514 WARN_ONCE(sz != sizeof(__struct), \
515 "%s: struct is %zu bytes, cpu state %d bytes\n", \
516 __stringify(nr_macro), sizeof(__struct), sz)) { \
517 __xstate_dump_leaves(); \
518 } \
519} while (0)
520
521/*
522 * We have a C struct for each 'xstate'. We need to ensure
523 * that our software representation matches what the CPU
524 * tells us about the state's size.
525 */
526static void check_xstate_against_struct(int nr)
527{
528 /*
529 * Ask the CPU for the size of the state.
530 */
531 int sz = xfeature_size(nr);
532 /*
533 * Match each CPU state with the corresponding software
534 * structure.
535 */
536 XCHECK_SZ(sz, nr, XFEATURE_YMM, struct ymmh_struct);
537 XCHECK_SZ(sz, nr, XFEATURE_BNDREGS, struct mpx_bndreg_state);
538 XCHECK_SZ(sz, nr, XFEATURE_BNDCSR, struct mpx_bndcsr_state);
539 XCHECK_SZ(sz, nr, XFEATURE_OPMASK, struct avx_512_opmask_state);
540 XCHECK_SZ(sz, nr, XFEATURE_ZMM_Hi256, struct avx_512_zmm_uppers_state);
541 XCHECK_SZ(sz, nr, XFEATURE_Hi16_ZMM, struct avx_512_hi16_state);
c8df4009 542 XCHECK_SZ(sz, nr, XFEATURE_PKRU, struct pkru_state);
ef78f2a4
DH
543
544 /*
545 * Make *SURE* to add any feature numbers in below if
546 * there are "holes" in the xsave state component
547 * numbers.
548 */
549 if ((nr < XFEATURE_YMM) ||
1f96b1ef
DH
550 (nr >= XFEATURE_MAX) ||
551 (nr == XFEATURE_PT_UNIMPLEMENTED_SO_FAR)) {
ef78f2a4
DH
552 WARN_ONCE(1, "no structure for xstate: %d\n", nr);
553 XSTATE_WARN_ON(1);
554 }
555}
556
65ac2e9b
DH
557/*
558 * This essentially double-checks what the cpu told us about
559 * how large the XSAVE buffer needs to be. We are recalculating
560 * it to be safe.
561 */
562static void do_extra_xstate_size_checks(void)
563{
564 int paranoid_xstate_size = FXSAVE_SIZE + XSAVE_HDR_SIZE;
565 int i;
566
567 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
568 if (!xfeature_enabled(i))
569 continue;
ef78f2a4
DH
570
571 check_xstate_against_struct(i);
65ac2e9b
DH
572 /*
573 * Supervisor state components can be managed only by
574 * XSAVES, which is compacted-format only.
575 */
576 if (!using_compacted_format())
577 XSTATE_WARN_ON(xfeature_is_supervisor(i));
578
579 /* Align from the end of the previous feature */
580 if (xfeature_is_aligned(i))
581 paranoid_xstate_size = ALIGN(paranoid_xstate_size, 64);
582 /*
583 * The offset of a given state in the non-compacted
584 * format is given to us in a CPUID leaf. We check
585 * them for being ordered (increasing offsets) in
586 * setup_xstate_features().
587 */
588 if (!using_compacted_format())
589 paranoid_xstate_size = xfeature_uncompacted_offset(i);
590 /*
591 * The compacted-format offset always depends on where
592 * the previous state ended.
593 */
594 paranoid_xstate_size += xfeature_size(i);
595 }
bf15a8cf 596 XSTATE_WARN_ON(paranoid_xstate_size != fpu_kernel_xstate_size);
65ac2e9b
DH
597}
598
a1141e0b 599
7e7ce87f 600/*
a1141e0b 601 * Get total size of enabled xstates in XCR0/xfeatures_mask.
65ac2e9b
DH
602 *
603 * Note the SDM's wording here. "sub-function 0" only enumerates
604 * the size of the *user* states. If we use it to size a buffer
605 * that we use 'XSAVES' on, we could potentially overflow the
606 * buffer because 'XSAVES' saves system states too.
607 *
608 * Note that we do not currently set any bits on IA32_XSS so
609 * 'XCR0 | IA32_XSS == XCR0' for now.
7e7ce87f 610 */
a1141e0b 611static unsigned int __init get_xsaves_size(void)
7e7ce87f
FY
612{
613 unsigned int eax, ebx, ecx, edx;
a1141e0b
FY
614 /*
615 * - CPUID function 0DH, sub-function 1:
616 * EBX enumerates the size (in bytes) required by
617 * the XSAVES instruction for an XSAVE area
618 * containing all the state components
619 * corresponding to bits currently set in
620 * XCR0 | IA32_XSS.
621 */
622 cpuid_count(XSTATE_CPUID, 1, &eax, &ebx, &ecx, &edx);
623 return ebx;
624}
7e7ce87f 625
a1141e0b
FY
626static unsigned int __init get_xsave_size(void)
627{
628 unsigned int eax, ebx, ecx, edx;
629 /*
630 * - CPUID function 0DH, sub-function 0:
631 * EBX enumerates the size (in bytes) required by
632 * the XSAVE instruction for an XSAVE area
633 * containing all the *user* state components
634 * corresponding to bits currently set in XCR0.
635 */
636 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
637 return ebx;
4109ca06
DH
638}
639
640/*
641 * Will the runtime-enumerated 'xstate_size' fit in the init
642 * task's statically-allocated buffer?
643 */
644static bool is_supported_xstate_size(unsigned int test_xstate_size)
645{
646 if (test_xstate_size <= sizeof(union fpregs_state))
647 return true;
648
649 pr_warn("x86/fpu: xstate buffer too small (%zu < %d), disabling xsave\n",
650 sizeof(union fpregs_state), test_xstate_size);
651 return false;
652}
653
654static int init_xstate_size(void)
655{
656 /* Recompute the context size for enabled features: */
a1141e0b
FY
657 unsigned int possible_xstate_size;
658 unsigned int xsave_size;
659
660 xsave_size = get_xsave_size();
661
662 if (boot_cpu_has(X86_FEATURE_XSAVES))
663 possible_xstate_size = get_xsaves_size();
664 else
665 possible_xstate_size = xsave_size;
4109ca06
DH
666
667 /* Ensure we have the space to store all enabled: */
668 if (!is_supported_xstate_size(possible_xstate_size))
669 return -EINVAL;
670
671 /*
672 * The size is OK, we are definitely going to use xsave,
673 * make it known to the world that we need more space.
674 */
bf15a8cf 675 fpu_kernel_xstate_size = possible_xstate_size;
65ac2e9b 676 do_extra_xstate_size_checks();
a1141e0b
FY
677
678 /*
679 * User space is always in standard format.
680 */
681 fpu_user_xstate_size = xsave_size;
4109ca06
DH
682 return 0;
683}
684
d91cab78
DH
685/*
686 * We enabled the XSAVE hardware, but something went wrong and
687 * we can not use it. Disable it.
688 */
689static void fpu__init_disable_system_xstate(void)
4109ca06
DH
690{
691 xfeatures_mask = 0;
692 cr4_clear_bits(X86_CR4_OSXSAVE);
693 fpu__xstate_clear_all_cpu_caps();
7e7ce87f
FY
694}
695
dc1e35c6
SS
696/*
697 * Enable and initialize the xsave feature.
55cc4678 698 * Called once per system bootup.
dc1e35c6 699 */
32231879 700void __init fpu__init_system_xstate(void)
dc1e35c6
SS
701{
702 unsigned int eax, ebx, ecx, edx;
e49a449b 703 static int on_boot_cpu __initdata = 1;
4109ca06 704 int err;
e97131a8
IM
705
706 WARN_ON_FPU(!on_boot_cpu);
707 on_boot_cpu = 0;
dc1e35c6 708
9170fb40
AL
709 if (!boot_cpu_has(X86_FEATURE_FPU)) {
710 pr_info("x86/fpu: No FPU detected\n");
711 return;
712 }
713
d366bf7e 714 if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
9170fb40
AL
715 pr_info("x86/fpu: x87 FPU will use %s\n",
716 boot_cpu_has(X86_FEATURE_FXSR) ? "FXSAVE" : "FSAVE");
e9dbfd67
IM
717 return;
718 }
719
ee813d53 720 if (boot_cpu_data.cpuid_level < XSTATE_CPUID) {
e97131a8 721 WARN_ON_FPU(1);
ee813d53
RR
722 return;
723 }
724
725 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
614df7fb 726 xfeatures_mask = eax + ((u64)edx << 32);
dc1e35c6 727
d91cab78 728 if ((xfeatures_mask & XFEATURE_MASK_FPSSE) != XFEATURE_MASK_FPSSE) {
ec3ed4a2
DH
729 /*
730 * This indicates that something really unexpected happened
731 * with the enumeration. Disable XSAVE and try to continue
732 * booting without it. This is too early to BUG().
733 */
614df7fb 734 pr_err("x86/fpu: FP/SSE not present amongst the CPU's xstate features: 0x%llx.\n", xfeatures_mask);
ec3ed4a2 735 goto out_disable;
dc1e35c6
SS
736 }
737
a5fe93a5 738 xfeatures_mask &= fpu__get_supported_xfeatures_mask();
97e80a70 739
55cc4678
IM
740 /* Enable xstate instructions to be able to continue with initialization: */
741 fpu__init_cpu_xstate();
4109ca06 742 err = init_xstate_size();
ec3ed4a2
DH
743 if (err)
744 goto out_disable;
dc1e35c6 745
91c3dba7
YY
746 /*
747 * Update info used for ptrace frames; use standard-format size and no
748 * supervisor xstates:
749 */
750 update_regset_xstate_info(fpu_user_xstate_size, xfeatures_mask & ~XFEATURE_MASK_SUPERVISOR);
751
b992c660 752 fpu__init_prepare_fx_sw_frame();
5d2bd700 753 setup_init_fpu_buf();
5fd402df 754 setup_xstate_comp();
996952e0 755 print_xstate_offset_size();
dc1e35c6 756
b0815359 757 pr_info("x86/fpu: Enabled xstate features 0x%llx, context size is %d bytes, using '%s' format.\n",
614df7fb 758 xfeatures_mask,
bf15a8cf 759 fpu_kernel_xstate_size,
782511b0 760 boot_cpu_has(X86_FEATURE_XSAVES) ? "compacted" : "standard");
ec3ed4a2
DH
761 return;
762
763out_disable:
764 /* something went wrong, try to boot without any XSAVE support */
765 fpu__init_disable_system_xstate();
dc1e35c6 766}
82d4150c 767
9254aaa0
IM
768/*
769 * Restore minimal FPU state after suspend:
770 */
771void fpu__resume_cpu(void)
772{
773 /*
774 * Restore XCR0 on xsave capable CPUs:
775 */
d366bf7e 776 if (boot_cpu_has(X86_FEATURE_XSAVE))
9254aaa0
IM
777 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
778}
779
b8b9b6ba
DH
780/*
781 * Given an xstate feature mask, calculate where in the xsave
782 * buffer the state is. Callers should ensure that the buffer
783 * is valid.
784 *
785 * Note: does not work for compacted buffers.
786 */
787void *__raw_xsave_addr(struct xregs_state *xsave, int xstate_feature_mask)
788{
789 int feature_nr = fls64(xstate_feature_mask) - 1;
790
5060b915
YY
791 if (!xfeature_enabled(feature_nr)) {
792 WARN_ON_FPU(1);
793 return NULL;
794 }
795
b8b9b6ba
DH
796 return (void *)xsave + xstate_comp_offsets[feature_nr];
797}
7496d645
FY
798/*
799 * Given the xsave area and a state inside, this function returns the
800 * address of the state.
801 *
802 * This is the API that is called to get xstate address in either
803 * standard format or compacted format of xsave area.
804 *
0c4109be
DH
805 * Note that if there is no data for the field in the xsave buffer
806 * this will return NULL.
807 *
7496d645 808 * Inputs:
0c4109be
DH
809 * xstate: the thread's storage area for all FPU data
810 * xstate_feature: state which is defined in xsave.h (e.g.
d91cab78 811 * XFEATURE_MASK_FP, XFEATURE_MASK_SSE, etc...)
7496d645 812 * Output:
0c4109be
DH
813 * address of the state in the xsave area, or NULL if the
814 * field is not present in the xsave buffer.
7496d645 815 */
0c4109be 816void *get_xsave_addr(struct xregs_state *xsave, int xstate_feature)
7496d645 817{
0c4109be
DH
818 /*
819 * Do we even *have* xsave state?
820 */
821 if (!boot_cpu_has(X86_FEATURE_XSAVE))
822 return NULL;
823
0c4109be
DH
824 /*
825 * We should not ever be requesting features that we
826 * have not enabled. Remember that pcntxt_mask is
827 * what we write to the XCR0 register.
828 */
829 WARN_ONCE(!(xfeatures_mask & xstate_feature),
830 "get of unsupported state");
831 /*
832 * This assumes the last 'xsave*' instruction to
833 * have requested that 'xstate_feature' be saved.
834 * If it did not, we might be seeing and old value
835 * of the field in the buffer.
836 *
837 * This can happen because the last 'xsave' did not
838 * request that this feature be saved (unlikely)
839 * or because the "init optimization" caused it
840 * to not be saved.
841 */
842 if (!(xsave->header.xfeatures & xstate_feature))
7496d645
FY
843 return NULL;
844
b8b9b6ba 845 return __raw_xsave_addr(xsave, xstate_feature);
7496d645 846}
ba7b3920 847EXPORT_SYMBOL_GPL(get_xsave_addr);
04cd027b
DH
848
849/*
850 * This wraps up the common operations that need to occur when retrieving
851 * data from xsave state. It first ensures that the current task was
852 * using the FPU and retrieves the data in to a buffer. It then calculates
853 * the offset of the requested field in the buffer.
854 *
855 * This function is safe to call whether the FPU is in use or not.
856 *
857 * Note that this only works on the current task.
858 *
859 * Inputs:
d91cab78
DH
860 * @xsave_state: state which is defined in xsave.h (e.g. XFEATURE_MASK_FP,
861 * XFEATURE_MASK_SSE, etc...)
04cd027b
DH
862 * Output:
863 * address of the state in the xsave area or NULL if the state
864 * is not present or is in its 'init state'.
865 */
866const void *get_xsave_field_ptr(int xsave_state)
867{
868 struct fpu *fpu = &current->thread.fpu;
869
870 if (!fpu->fpstate_active)
871 return NULL;
872 /*
873 * fpu__save() takes the CPU's xstate registers
874 * and saves them off to the 'fpu memory buffer.
875 */
876 fpu__save(fpu);
877
878 return get_xsave_addr(&fpu->state.xsave, xsave_state);
879}
b8b9b6ba 880
e8c24d3a
DH
881#ifdef CONFIG_ARCH_HAS_PKEYS
882
84594296
DH
883#define NR_VALID_PKRU_BITS (CONFIG_NR_PROTECTION_KEYS * 2)
884#define PKRU_VALID_MASK (NR_VALID_PKRU_BITS - 1)
84594296 885/*
b79daf85
DH
886 * This will go out and modify PKRU register to set the access
887 * rights for @pkey to @init_val.
84594296
DH
888 */
889int arch_set_user_pkey_access(struct task_struct *tsk, int pkey,
890 unsigned long init_val)
891{
b79daf85 892 u32 old_pkru;
84594296
DH
893 int pkey_shift = (pkey * PKRU_BITS_PER_PKEY);
894 u32 new_pkru_bits = 0;
895
84594296
DH
896 /*
897 * This check implies XSAVE support. OSPKE only gets
898 * set if we enable XSAVE and we enable PKU in XCR0.
899 */
900 if (!boot_cpu_has(X86_FEATURE_OSPKE))
901 return -EINVAL;
902
91c3dba7 903 /* Set the bits we need in PKRU: */
84594296
DH
904 if (init_val & PKEY_DISABLE_ACCESS)
905 new_pkru_bits |= PKRU_AD_BIT;
906 if (init_val & PKEY_DISABLE_WRITE)
907 new_pkru_bits |= PKRU_WD_BIT;
908
91c3dba7 909 /* Shift the bits in to the correct place in PKRU for pkey: */
84594296
DH
910 new_pkru_bits <<= pkey_shift;
911
b79daf85
DH
912 /* Get old PKRU and mask off any old bits in place: */
913 old_pkru = read_pkru();
914 old_pkru &= ~((PKRU_AD_BIT|PKRU_WD_BIT) << pkey_shift);
84594296 915
b79daf85
DH
916 /* Write old part along with new part: */
917 write_pkru(old_pkru | new_pkru_bits);
91c3dba7
YY
918
919 return 0;
920}
e8c24d3a 921#endif /* ! CONFIG_ARCH_HAS_PKEYS */
91c3dba7
YY
922
923/*
924 * This is similar to user_regset_copyout(), but will not add offset to
925 * the source data pointer or increment pos, count, kbuf, and ubuf.
926 */
f0d4f30a 927static inline int
6ff15f8d
IM
928__copy_xstate_to_kernel(void *kbuf, const void *data,
929 unsigned int offset, unsigned int size, unsigned int size_total)
f0d4f30a 930{
6ff15f8d
IM
931 if (offset < size_total) {
932 unsigned int copy = min(size, size_total - offset);
f0d4f30a 933
56583c9a 934 memcpy(kbuf + offset, data, copy);
f0d4f30a
IM
935 }
936 return 0;
937}
938
939/*
940 * Convert from kernel XSAVES compacted format to standard format and copy
941 * to a kernel-space ptrace buffer.
942 *
943 * It supports partial copy but pos always starts from zero. This is called
944 * from xstateregs_get() and there we check the CPU has XSAVES.
945 */
56583c9a 946int copy_xstate_to_kernel(void *kbuf, struct xregs_state *xsave, unsigned int offset_start, unsigned int size_total)
f0d4f30a
IM
947{
948 unsigned int offset, size;
949 int ret, i;
950 struct xstate_header header;
951
952 /*
953 * Currently copy_regset_to_user() starts from pos 0:
954 */
56583c9a 955 if (unlikely(offset_start != 0))
f0d4f30a
IM
956 return -EFAULT;
957
958 /*
959 * The destination is a ptrace buffer; we put in only user xstates:
960 */
961 memset(&header, 0, sizeof(header));
962 header.xfeatures = xsave->header.xfeatures;
963 header.xfeatures &= ~XFEATURE_MASK_SUPERVISOR;
964
965 /*
966 * Copy xregs_state->header:
967 */
968 offset = offsetof(struct xregs_state, header);
969 size = sizeof(header);
970
56583c9a 971 ret = __copy_xstate_to_kernel(kbuf, &header, offset, size, size_total);
f0d4f30a
IM
972 if (ret)
973 return ret;
974
975 for (i = 0; i < XFEATURE_MAX; i++) {
976 /*
977 * Copy only in-use xstates:
978 */
979 if ((header.xfeatures >> i) & 1) {
980 void *src = __raw_xsave_addr(xsave, 1 << i);
981
982 offset = xstate_offsets[i];
983 size = xstate_sizes[i];
984
6ff15f8d
IM
985 /* The next component has to fit fully into the output buffer: */
986 if (offset + size > size_total)
987 break;
988
56583c9a 989 ret = __copy_xstate_to_kernel(kbuf, src, offset, size, size_total);
f0d4f30a
IM
990 if (ret)
991 return ret;
f0d4f30a
IM
992 }
993
994 }
995
996 /*
997 * Fill xsave->i387.sw_reserved value for ptrace frame:
998 */
999 offset = offsetof(struct fxregs_state, sw_reserved);
1000 size = sizeof(xstate_fx_sw_bytes);
1001
56583c9a 1002 ret = __copy_xstate_to_kernel(kbuf, xstate_fx_sw_bytes, offset, size, size_total);
f0d4f30a
IM
1003 if (ret)
1004 return ret;
1005
1006 return 0;
1007}
1008
1009static inline int
6ff15f8d 1010__copy_xstate_to_user(void __user *ubuf, const void *data, unsigned int offset, unsigned int size, unsigned int size_total)
91c3dba7 1011{
56583c9a 1012 if (!size)
91c3dba7
YY
1013 return 0;
1014
6ff15f8d
IM
1015 if (offset < size_total) {
1016 unsigned int copy = min(size, size_total - offset);
91c3dba7 1017
56583c9a 1018 if (__copy_to_user(ubuf + offset, data, copy))
a69c158f 1019 return -EFAULT;
91c3dba7
YY
1020 }
1021 return 0;
1022}
1023
1024/*
1025 * Convert from kernel XSAVES compacted format to standard format and copy
becb2bb7 1026 * to a user-space buffer. It supports partial copy but pos always starts from
91c3dba7
YY
1027 * zero. This is called from xstateregs_get() and there we check the CPU
1028 * has XSAVES.
1029 */
56583c9a 1030int copy_xstate_to_user(void __user *ubuf, struct xregs_state *xsave, unsigned int offset_start, unsigned int size_total)
91c3dba7
YY
1031{
1032 unsigned int offset, size;
1033 int ret, i;
1034 struct xstate_header header;
1035
1036 /*
1037 * Currently copy_regset_to_user() starts from pos 0:
1038 */
56583c9a 1039 if (unlikely(offset_start != 0))
91c3dba7
YY
1040 return -EFAULT;
1041
1042 /*
1043 * The destination is a ptrace buffer; we put in only user xstates:
1044 */
1045 memset(&header, 0, sizeof(header));
1046 header.xfeatures = xsave->header.xfeatures;
1047 header.xfeatures &= ~XFEATURE_MASK_SUPERVISOR;
1048
1049 /*
1050 * Copy xregs_state->header:
1051 */
1052 offset = offsetof(struct xregs_state, header);
1053 size = sizeof(header);
1054
56583c9a 1055 ret = __copy_xstate_to_user(ubuf, &header, offset, size, size_total);
91c3dba7
YY
1056 if (ret)
1057 return ret;
1058
1059 for (i = 0; i < XFEATURE_MAX; i++) {
1060 /*
1061 * Copy only in-use xstates:
1062 */
1063 if ((header.xfeatures >> i) & 1) {
1064 void *src = __raw_xsave_addr(xsave, 1 << i);
1065
1066 offset = xstate_offsets[i];
1067 size = xstate_sizes[i];
1068
6ff15f8d
IM
1069 /* The next component has to fit fully into the output buffer: */
1070 if (offset + size > size_total)
1071 break;
1072
56583c9a 1073 ret = __copy_xstate_to_user(ubuf, src, offset, size, size_total);
91c3dba7
YY
1074 if (ret)
1075 return ret;
91c3dba7
YY
1076 }
1077
1078 }
1079
1080 /*
1081 * Fill xsave->i387.sw_reserved value for ptrace frame:
1082 */
1083 offset = offsetof(struct fxregs_state, sw_reserved);
1084 size = sizeof(xstate_fx_sw_bytes);
1085
56583c9a 1086 ret = __copy_xstate_to_user(ubuf, xstate_fx_sw_bytes, offset, size, size_total);
91c3dba7
YY
1087 if (ret)
1088 return ret;
1089
1090 return 0;
1091}
1092
1093/*
1094 * Convert from a ptrace standard-format buffer to kernel XSAVES format
1095 * and copy to the target thread. This is called from xstateregs_set() and
1096 * there we check the CPU has XSAVES and a whole standard-sized buffer
1097 * exists.
1098 */
656f0831 1099int copy_user_to_xstate(const void *kbuf, const void __user *ubuf,
91c3dba7
YY
1100 struct xregs_state *xsave)
1101{
1102 unsigned int offset, size;
1103 int i;
1104 u64 xfeatures;
1105 u64 allowed_features;
1106
1107 offset = offsetof(struct xregs_state, header);
1108 size = sizeof(xfeatures);
1109
1110 if (kbuf) {
1111 memcpy(&xfeatures, kbuf + offset, size);
1112 } else {
1113 if (__copy_from_user(&xfeatures, ubuf + offset, size))
1114 return -EFAULT;
1115 }
1116
1117 /*
1118 * Reject if the user sets any disabled or supervisor features:
1119 */
1120 allowed_features = xfeatures_mask & ~XFEATURE_MASK_SUPERVISOR;
1121
1122 if (xfeatures & ~allowed_features)
1123 return -EINVAL;
1124
1125 for (i = 0; i < XFEATURE_MAX; i++) {
1126 u64 mask = ((u64)1 << i);
1127
1128 if (xfeatures & mask) {
1129 void *dst = __raw_xsave_addr(xsave, 1 << i);
1130
1131 offset = xstate_offsets[i];
1132 size = xstate_sizes[i];
1133
1134 if (kbuf) {
1135 memcpy(dst, kbuf + offset, size);
1136 } else {
1137 if (__copy_from_user(dst, ubuf + offset, size))
1138 return -EFAULT;
1139 }
1140 }
1141 }
1142
1143 /*
1144 * The state that came in from userspace was user-state only.
1145 * Mask all the user states out of 'xfeatures':
1146 */
1147 xsave->header.xfeatures &= XFEATURE_MASK_SUPERVISOR;
1148
1149 /*
1150 * Add back in the features that came in from userspace:
1151 */
1152 xsave->header.xfeatures |= xfeatures;
84594296
DH
1153
1154 return 0;
1155}