]> git.ipfire.org Git - people/arne_f/kernel.git/commit
ARM: dts: NSP: Fix PPI interrupt types
authorFlorian Fainelli <f.fainelli@gmail.com>
Tue, 7 Nov 2017 19:10:29 +0000 (11:10 -0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 3 Feb 2018 16:39:16 +0000 (17:39 +0100)
commit504b902b36a9cd487cbcd2f209a9a5c6213cb320
treed1b2c4be5f3bfdbd9371f5f07f1cd0e7ef661f4a
parent12f165f4418aaa904e7412ee178ee43437f65bc8
ARM: dts: NSP: Fix PPI interrupt types

[ Upstream commit 5f1aa51c7a1eef1c5a60b8334e32c89904964245 ]

Booting a kernel results in the kernel warning us about the following
PPI interrupts configuration:
[    0.105127] smp: Bringing up secondary CPUs ...
[    0.110545] GIC: PPI11 is secure or misconfigured
[    0.110551] GIC: PPI13 is secure or misconfigured

Fix this by using the appropriate edge configuration for PPI11 and
PPI13, this is similar to what was fixed for Northstar (BCM5301X) in
commit 0e34079cd1f6 ("ARM: dts: BCM5301X: Correct GIC_PPI interrupt
flags").

Fixes: 7b2e987de207 ("ARM: NSP: add minimal Northstar Plus device tree")
Fixes: 1a9d53cabaf4 ("ARM: dts: NSP: Add TWD Support to DT")
Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/arm/boot/dts/bcm-nsp.dtsi