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drm/ttm: ttm object security fixes for render nodes
[people/ms/linux.git] / drivers / gpu / drm / vmwgfx / vmwgfx_kms.c
CommitLineData
fb1d9738
JB
1/**************************************************************************
2 *
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "vmwgfx_kms.h"
29
56d1c78d 30
fb1d9738
JB
31/* Might need a hrtimer here? */
32#define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
33
6abff3c7
JB
34
35struct vmw_clip_rect {
36 int x1, x2, y1, y2;
37};
38
39/**
40 * Clip @num_rects number of @rects against @clip storing the
41 * results in @out_rects and the number of passed rects in @out_num.
42 */
43void vmw_clip_cliprects(struct drm_clip_rect *rects,
44 int num_rects,
45 struct vmw_clip_rect clip,
46 SVGASignedRect *out_rects,
47 int *out_num)
48{
49 int i, k;
50
51 for (i = 0, k = 0; i < num_rects; i++) {
52 int x1 = max_t(int, clip.x1, rects[i].x1);
53 int y1 = max_t(int, clip.y1, rects[i].y1);
54 int x2 = min_t(int, clip.x2, rects[i].x2);
55 int y2 = min_t(int, clip.y2, rects[i].y2);
56
57 if (x1 >= x2)
58 continue;
59 if (y1 >= y2)
60 continue;
61
62 out_rects[k].left = x1;
63 out_rects[k].top = y1;
64 out_rects[k].right = x2;
65 out_rects[k].bottom = y2;
66 k++;
67 }
68
69 *out_num = k;
70}
71
fb1d9738
JB
72void vmw_display_unit_cleanup(struct vmw_display_unit *du)
73{
74 if (du->cursor_surface)
75 vmw_surface_unreference(&du->cursor_surface);
76 if (du->cursor_dmabuf)
77 vmw_dmabuf_unreference(&du->cursor_dmabuf);
6a0a7a9e 78 drm_sysfs_connector_remove(&du->connector);
fb1d9738
JB
79 drm_crtc_cleanup(&du->crtc);
80 drm_encoder_cleanup(&du->encoder);
81 drm_connector_cleanup(&du->connector);
82}
83
84/*
85 * Display Unit Cursor functions
86 */
87
88int vmw_cursor_update_image(struct vmw_private *dev_priv,
89 u32 *image, u32 width, u32 height,
90 u32 hotspotX, u32 hotspotY)
91{
92 struct {
93 u32 cmd;
94 SVGAFifoCmdDefineAlphaCursor cursor;
95 } *cmd;
96 u32 image_size = width * height * 4;
97 u32 cmd_size = sizeof(*cmd) + image_size;
98
99 if (!image)
100 return -EINVAL;
101
102 cmd = vmw_fifo_reserve(dev_priv, cmd_size);
103 if (unlikely(cmd == NULL)) {
104 DRM_ERROR("Fifo reserve failed.\n");
105 return -ENOMEM;
106 }
107
108 memset(cmd, 0, sizeof(*cmd));
109
110 memcpy(&cmd[1], image, image_size);
111
112 cmd->cmd = cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR);
113 cmd->cursor.id = cpu_to_le32(0);
114 cmd->cursor.width = cpu_to_le32(width);
115 cmd->cursor.height = cpu_to_le32(height);
116 cmd->cursor.hotspotX = cpu_to_le32(hotspotX);
117 cmd->cursor.hotspotY = cpu_to_le32(hotspotY);
118
119 vmw_fifo_commit(dev_priv, cmd_size);
120
121 return 0;
122}
123
6a91d97e
JB
124int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv,
125 struct vmw_dma_buffer *dmabuf,
126 u32 width, u32 height,
127 u32 hotspotX, u32 hotspotY)
128{
129 struct ttm_bo_kmap_obj map;
130 unsigned long kmap_offset;
131 unsigned long kmap_num;
132 void *virtual;
133 bool dummy;
134 int ret;
135
136 kmap_offset = 0;
137 kmap_num = (width*height*4 + PAGE_SIZE - 1) >> PAGE_SHIFT;
138
139 ret = ttm_bo_reserve(&dmabuf->base, true, false, false, 0);
140 if (unlikely(ret != 0)) {
141 DRM_ERROR("reserve failed\n");
142 return -EINVAL;
143 }
144
145 ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
146 if (unlikely(ret != 0))
147 goto err_unreserve;
148
149 virtual = ttm_kmap_obj_virtual(&map, &dummy);
150 ret = vmw_cursor_update_image(dev_priv, virtual, width, height,
151 hotspotX, hotspotY);
152
153 ttm_bo_kunmap(&map);
154err_unreserve:
155 ttm_bo_unreserve(&dmabuf->base);
156
157 return ret;
158}
159
160
fb1d9738
JB
161void vmw_cursor_update_position(struct vmw_private *dev_priv,
162 bool show, int x, int y)
163{
164 __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
165 uint32_t count;
166
167 iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
168 iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X);
169 iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
170 count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
171 iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
172}
173
174int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
175 uint32_t handle, uint32_t width, uint32_t height)
176{
177 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
fb1d9738
JB
178 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
179 struct vmw_surface *surface = NULL;
180 struct vmw_dma_buffer *dmabuf = NULL;
181 int ret;
182
bfb89928
DV
183 /*
184 * FIXME: Unclear whether there's any global state touched by the
185 * cursor_set function, especially vmw_cursor_update_position looks
186 * suspicious. For now take the easy route and reacquire all locks. We
187 * can do this since the caller in the drm core doesn't check anything
188 * which is protected by any looks.
189 */
190 mutex_unlock(&crtc->mutex);
191 drm_modeset_lock_all(dev_priv->dev);
192
baa91d64 193 /* A lot of the code assumes this */
bfb89928
DV
194 if (handle && (width != 64 || height != 64)) {
195 ret = -EINVAL;
196 goto out;
197 }
baa91d64 198
fb1d9738 199 if (handle) {
a5d0f576
VS
200 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
201
e7ac9211
JB
202 ret = vmw_user_lookup_handle(dev_priv, tfile,
203 handle, &surface, &dmabuf);
204 if (ret) {
205 DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
bfb89928
DV
206 ret = -EINVAL;
207 goto out;
fb1d9738
JB
208 }
209 }
210
e7ac9211
JB
211 /* need to do this before taking down old image */
212 if (surface && !surface->snooper.image) {
213 DRM_ERROR("surface not suitable for cursor\n");
214 vmw_surface_unreference(&surface);
bfb89928
DV
215 ret = -EINVAL;
216 goto out;
e7ac9211
JB
217 }
218
fb1d9738
JB
219 /* takedown old cursor */
220 if (du->cursor_surface) {
221 du->cursor_surface->snooper.crtc = NULL;
222 vmw_surface_unreference(&du->cursor_surface);
223 }
224 if (du->cursor_dmabuf)
225 vmw_dmabuf_unreference(&du->cursor_dmabuf);
226
227 /* setup new image */
228 if (surface) {
229 /* vmw_user_surface_lookup takes one reference */
230 du->cursor_surface = surface;
231
232 du->cursor_surface->snooper.crtc = crtc;
233 du->cursor_age = du->cursor_surface->snooper.age;
234 vmw_cursor_update_image(dev_priv, surface->snooper.image,
235 64, 64, du->hotspot_x, du->hotspot_y);
236 } else if (dmabuf) {
fb1d9738
JB
237 /* vmw_user_surface_lookup takes one reference */
238 du->cursor_dmabuf = dmabuf;
239
6a91d97e
JB
240 ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, width, height,
241 du->hotspot_x, du->hotspot_y);
fb1d9738
JB
242 } else {
243 vmw_cursor_update_position(dev_priv, false, 0, 0);
bfb89928
DV
244 ret = 0;
245 goto out;
fb1d9738
JB
246 }
247
da7653d6
TH
248 vmw_cursor_update_position(dev_priv, true,
249 du->cursor_x + du->hotspot_x,
250 du->cursor_y + du->hotspot_y);
fb1d9738 251
bfb89928
DV
252 ret = 0;
253out:
254 drm_modeset_unlock_all(dev_priv->dev);
255 mutex_lock(&crtc->mutex);
256
257 return ret;
fb1d9738
JB
258}
259
260int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
261{
262 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
263 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
264 bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
265
266 du->cursor_x = x + crtc->x;
267 du->cursor_y = y + crtc->y;
268
dac35663
DV
269 /*
270 * FIXME: Unclear whether there's any global state touched by the
271 * cursor_set function, especially vmw_cursor_update_position looks
272 * suspicious. For now take the easy route and reacquire all locks. We
273 * can do this since the caller in the drm core doesn't check anything
274 * which is protected by any looks.
275 */
276 mutex_unlock(&crtc->mutex);
277 drm_modeset_lock_all(dev_priv->dev);
278
fb1d9738 279 vmw_cursor_update_position(dev_priv, shown,
da7653d6
TH
280 du->cursor_x + du->hotspot_x,
281 du->cursor_y + du->hotspot_y);
fb1d9738 282
dac35663
DV
283 drm_modeset_unlock_all(dev_priv->dev);
284 mutex_lock(&crtc->mutex);
285
fb1d9738
JB
286 return 0;
287}
288
289void vmw_kms_cursor_snoop(struct vmw_surface *srf,
290 struct ttm_object_file *tfile,
291 struct ttm_buffer_object *bo,
292 SVGA3dCmdHeader *header)
293{
294 struct ttm_bo_kmap_obj map;
295 unsigned long kmap_offset;
296 unsigned long kmap_num;
297 SVGA3dCopyBox *box;
298 unsigned box_count;
299 void *virtual;
300 bool dummy;
301 struct vmw_dma_cmd {
302 SVGA3dCmdHeader header;
303 SVGA3dCmdSurfaceDMA dma;
304 } *cmd;
2ac86371 305 int i, ret;
fb1d9738
JB
306
307 cmd = container_of(header, struct vmw_dma_cmd, header);
308
309 /* No snooper installed */
310 if (!srf->snooper.image)
311 return;
312
313 if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
314 DRM_ERROR("face and mipmap for cursors should never != 0\n");
315 return;
316 }
317
318 if (cmd->header.size < 64) {
319 DRM_ERROR("at least one full copy box must be given\n");
320 return;
321 }
322
323 box = (SVGA3dCopyBox *)&cmd[1];
324 box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
325 sizeof(SVGA3dCopyBox);
326
2ac86371 327 if (cmd->dma.guest.ptr.offset % PAGE_SIZE ||
fb1d9738
JB
328 box->x != 0 || box->y != 0 || box->z != 0 ||
329 box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
2ac86371 330 box->d != 1 || box_count != 1) {
fb1d9738 331 /* TODO handle none page aligned offsets */
2ac86371
JB
332 /* TODO handle more dst & src != 0 */
333 /* TODO handle more then one copy */
334 DRM_ERROR("Cant snoop dma request for cursor!\n");
335 DRM_ERROR("(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
336 box->srcx, box->srcy, box->srcz,
337 box->x, box->y, box->z,
338 box->w, box->h, box->d, box_count,
339 cmd->dma.guest.ptr.offset);
fb1d9738
JB
340 return;
341 }
342
343 kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
344 kmap_num = (64*64*4) >> PAGE_SHIFT;
345
346 ret = ttm_bo_reserve(bo, true, false, false, 0);
347 if (unlikely(ret != 0)) {
348 DRM_ERROR("reserve failed\n");
349 return;
350 }
351
352 ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
353 if (unlikely(ret != 0))
354 goto err_unreserve;
355
356 virtual = ttm_kmap_obj_virtual(&map, &dummy);
357
2ac86371
JB
358 if (box->w == 64 && cmd->dma.guest.pitch == 64*4) {
359 memcpy(srf->snooper.image, virtual, 64*64*4);
360 } else {
361 /* Image is unsigned pointer. */
362 for (i = 0; i < box->h; i++)
363 memcpy(srf->snooper.image + i * 64,
364 virtual + i * cmd->dma.guest.pitch,
365 box->w * 4);
366 }
367
fb1d9738
JB
368 srf->snooper.age++;
369
370 /* we can't call this function from this function since execbuf has
371 * reserved fifo space.
372 *
373 * if (srf->snooper.crtc)
374 * vmw_ldu_crtc_cursor_update_image(dev_priv,
375 * srf->snooper.image, 64, 64,
376 * du->hotspot_x, du->hotspot_y);
377 */
378
379 ttm_bo_kunmap(&map);
380err_unreserve:
381 ttm_bo_unreserve(bo);
382}
383
384void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
385{
386 struct drm_device *dev = dev_priv->dev;
387 struct vmw_display_unit *du;
388 struct drm_crtc *crtc;
389
390 mutex_lock(&dev->mode_config.mutex);
391
392 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
393 du = vmw_crtc_to_du(crtc);
394 if (!du->cursor_surface ||
395 du->cursor_age == du->cursor_surface->snooper.age)
396 continue;
397
398 du->cursor_age = du->cursor_surface->snooper.age;
399 vmw_cursor_update_image(dev_priv,
400 du->cursor_surface->snooper.image,
401 64, 64, du->hotspot_x, du->hotspot_y);
402 }
403
404 mutex_unlock(&dev->mode_config.mutex);
405}
406
407/*
408 * Generic framebuffer code
409 */
410
fb1d9738
JB
411/*
412 * Surface framebuffer code
413 */
414
415#define vmw_framebuffer_to_vfbs(x) \
416 container_of(x, struct vmw_framebuffer_surface, base.base)
417
418struct vmw_framebuffer_surface {
419 struct vmw_framebuffer base;
420 struct vmw_surface *surface;
22ee861c 421 struct vmw_dma_buffer *buffer;
3a939a5e
TH
422 struct list_head head;
423 struct drm_master *master;
fb1d9738
JB
424};
425
426void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
427{
3a939a5e 428 struct vmw_framebuffer_surface *vfbs =
fb1d9738 429 vmw_framebuffer_to_vfbs(framebuffer);
3a939a5e
TH
430 struct vmw_master *vmaster = vmw_master(vfbs->master);
431
432
433 mutex_lock(&vmaster->fb_surf_mutex);
434 list_del(&vfbs->head);
435 mutex_unlock(&vmaster->fb_surf_mutex);
fb1d9738 436
3a939a5e 437 drm_master_put(&vfbs->master);
fb1d9738 438 drm_framebuffer_cleanup(framebuffer);
3a939a5e 439 vmw_surface_unreference(&vfbs->surface);
90ff18bc 440 ttm_base_object_unref(&vfbs->base.user_obj);
fb1d9738 441
3a939a5e 442 kfree(vfbs);
fb1d9738
JB
443}
444
56d1c78d 445static int do_surface_dirty_sou(struct vmw_private *dev_priv,
90ff18bc 446 struct drm_file *file_priv,
56d1c78d 447 struct vmw_framebuffer *framebuffer,
56d1c78d
JB
448 unsigned flags, unsigned color,
449 struct drm_clip_rect *clips,
bd49ae46
JB
450 unsigned num_clips, int inc,
451 struct vmw_fence_obj **out_fence)
56d1c78d 452{
c6ca8391 453 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
6abff3c7
JB
454 struct drm_clip_rect *clips_ptr;
455 struct drm_clip_rect *tmp;
c6ca8391 456 struct drm_crtc *crtc;
56d1c78d 457 size_t fifo_size;
c6ca8391
JB
458 int i, num_units;
459 int ret = 0; /* silence warning */
460 int left, right, top, bottom;
56d1c78d
JB
461
462 struct {
463 SVGA3dCmdHeader header;
464 SVGA3dCmdBlitSurfaceToScreen body;
465 } *cmd;
c6ca8391 466 SVGASignedRect *blits;
56d1c78d 467
c6ca8391
JB
468 num_units = 0;
469 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list,
470 head) {
471 if (crtc->fb != &framebuffer->base)
472 continue;
473 units[num_units++] = vmw_crtc_to_du(crtc);
474 }
475
c6ca8391
JB
476 BUG_ON(!clips || !num_clips);
477
6abff3c7
JB
478 tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL);
479 if (unlikely(tmp == NULL)) {
480 DRM_ERROR("Temporary cliprect memory alloc failed.\n");
481 return -ENOMEM;
482 }
483
c6ca8391 484 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
90ff18bc 485 cmd = kzalloc(fifo_size, GFP_KERNEL);
56d1c78d 486 if (unlikely(cmd == NULL)) {
90ff18bc 487 DRM_ERROR("Temporary fifo memory alloc failed.\n");
6abff3c7
JB
488 ret = -ENOMEM;
489 goto out_free_tmp;
56d1c78d
JB
490 }
491
6abff3c7
JB
492 /* setup blits pointer */
493 blits = (SVGASignedRect *)&cmd[1];
494
495 /* initial clip region */
c6ca8391
JB
496 left = clips->x1;
497 right = clips->x2;
498 top = clips->y1;
499 bottom = clips->y2;
500
f0c8a652
JB
501 /* skip the first clip rect */
502 for (i = 1, clips_ptr = clips + inc;
503 i < num_clips; i++, clips_ptr += inc) {
c6ca8391
JB
504 left = min_t(int, left, (int)clips_ptr->x1);
505 right = max_t(int, right, (int)clips_ptr->x2);
506 top = min_t(int, top, (int)clips_ptr->y1);
507 bottom = max_t(int, bottom, (int)clips_ptr->y2);
56d1c78d
JB
508 }
509
c6ca8391 510 /* only need to do this once */
c6ca8391
JB
511 cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
512 cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
513
56d1c78d
JB
514 cmd->body.srcRect.left = left;
515 cmd->body.srcRect.right = right;
516 cmd->body.srcRect.top = top;
517 cmd->body.srcRect.bottom = bottom;
518
c6ca8391 519 clips_ptr = clips;
c6ca8391 520 for (i = 0; i < num_clips; i++, clips_ptr += inc) {
6abff3c7
JB
521 tmp[i].x1 = clips_ptr->x1 - left;
522 tmp[i].x2 = clips_ptr->x2 - left;
523 tmp[i].y1 = clips_ptr->y1 - top;
524 tmp[i].y2 = clips_ptr->y2 - top;
c6ca8391
JB
525 }
526
527 /* do per unit writing, reuse fifo for each */
528 for (i = 0; i < num_units; i++) {
529 struct vmw_display_unit *unit = units[i];
6abff3c7
JB
530 struct vmw_clip_rect clip;
531 int num;
532
533 clip.x1 = left - unit->crtc.x;
534 clip.y1 = top - unit->crtc.y;
535 clip.x2 = right - unit->crtc.x;
536 clip.y2 = bottom - unit->crtc.y;
c6ca8391
JB
537
538 /* skip any crtcs that misses the clip region */
6abff3c7
JB
539 if (clip.x1 >= unit->crtc.mode.hdisplay ||
540 clip.y1 >= unit->crtc.mode.vdisplay ||
541 clip.x2 <= 0 || clip.y2 <= 0)
c6ca8391
JB
542 continue;
543
6abff3c7
JB
544 /*
545 * In order for the clip rects to be correctly scaled
546 * the src and dest rects needs to be the same size.
547 */
548 cmd->body.destRect.left = clip.x1;
549 cmd->body.destRect.right = clip.x2;
550 cmd->body.destRect.top = clip.y1;
551 cmd->body.destRect.bottom = clip.y2;
552
553 /* create a clip rect of the crtc in dest coords */
554 clip.x2 = unit->crtc.mode.hdisplay - clip.x1;
555 clip.y2 = unit->crtc.mode.vdisplay - clip.y1;
556 clip.x1 = 0 - clip.x1;
557 clip.y1 = 0 - clip.y1;
558
c6ca8391
JB
559 /* need to reset sid as it is changed by execbuf */
560 cmd->body.srcImage.sid = cpu_to_le32(framebuffer->user_handle);
c6ca8391
JB
561 cmd->body.destScreenId = unit->unit;
562
6abff3c7
JB
563 /* clip and write blits to cmd stream */
564 vmw_clip_cliprects(tmp, num_clips, clip, blits, &num);
c6ca8391 565
6abff3c7
JB
566 /* if no cliprects hit skip this */
567 if (num == 0)
568 continue;
c6ca8391 569
bd49ae46
JB
570 /* only return the last fence */
571 if (out_fence && *out_fence)
572 vmw_fence_obj_unreference(out_fence);
c6ca8391 573
6abff3c7
JB
574 /* recalculate package length */
575 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num;
576 cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
c6ca8391 577 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
bd49ae46 578 fifo_size, 0, NULL, out_fence);
c6ca8391
JB
579
580 if (unlikely(ret != 0))
581 break;
582 }
56d1c78d 583
6abff3c7 584
90ff18bc 585 kfree(cmd);
6abff3c7
JB
586out_free_tmp:
587 kfree(tmp);
56d1c78d 588
90ff18bc 589 return ret;
5deb65cf 590}
fb1d9738
JB
591
592int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
02b00162 593 struct drm_file *file_priv,
fb1d9738
JB
594 unsigned flags, unsigned color,
595 struct drm_clip_rect *clips,
596 unsigned num_clips)
597{
598 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
3a939a5e 599 struct vmw_master *vmaster = vmw_master(file_priv->master);
fb1d9738
JB
600 struct vmw_framebuffer_surface *vfbs =
601 vmw_framebuffer_to_vfbs(framebuffer);
fb1d9738 602 struct drm_clip_rect norect;
5deb65cf 603 int ret, inc = 1;
fb1d9738 604
3a939a5e
TH
605 if (unlikely(vfbs->master != file_priv->master))
606 return -EINVAL;
607
01e81419
JB
608 /* Require ScreenObject support for 3D */
609 if (!dev_priv->sou_priv)
610 return -EINVAL;
611
73e9efd4
VS
612 drm_modeset_lock_all(dev_priv->dev);
613
3a939a5e 614 ret = ttm_read_lock(&vmaster->lock, true);
73e9efd4
VS
615 if (unlikely(ret != 0)) {
616 drm_modeset_unlock_all(dev_priv->dev);
3a939a5e 617 return ret;
73e9efd4 618 }
3a939a5e 619
fb1d9738
JB
620 if (!num_clips) {
621 num_clips = 1;
622 clips = &norect;
623 norect.x1 = norect.y1 = 0;
624 norect.x2 = framebuffer->width;
625 norect.y2 = framebuffer->height;
626 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
627 num_clips /= 2;
628 inc = 2; /* skip source rects */
629 }
630
c5c42360 631 ret = do_surface_dirty_sou(dev_priv, file_priv, &vfbs->base,
01e81419 632 flags, color,
bd49ae46 633 clips, num_clips, inc, NULL);
fb1d9738 634
3a939a5e 635 ttm_read_unlock(&vmaster->lock);
73e9efd4
VS
636
637 drm_modeset_unlock_all(dev_priv->dev);
638
fb1d9738
JB
639 return 0;
640}
641
642static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
643 .destroy = vmw_framebuffer_surface_destroy,
644 .dirty = vmw_framebuffer_surface_dirty,
fb1d9738
JB
645};
646
d3216a0c 647static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
3a939a5e 648 struct drm_file *file_priv,
d3216a0c
TH
649 struct vmw_surface *surface,
650 struct vmw_framebuffer **out,
651 const struct drm_mode_fb_cmd
652 *mode_cmd)
fb1d9738
JB
653
654{
655 struct drm_device *dev = dev_priv->dev;
656 struct vmw_framebuffer_surface *vfbs;
d3216a0c 657 enum SVGA3dSurfaceFormat format;
3a939a5e 658 struct vmw_master *vmaster = vmw_master(file_priv->master);
fb1d9738
JB
659 int ret;
660
01e81419
JB
661 /* 3D is only supported on HWv8 hosts which supports screen objects */
662 if (!dev_priv->sou_priv)
663 return -ENOSYS;
664
d3216a0c
TH
665 /*
666 * Sanity checks.
667 */
668
e7ac9211
JB
669 /* Surface must be marked as a scanout. */
670 if (unlikely(!surface->scanout))
671 return -EINVAL;
672
d3216a0c
TH
673 if (unlikely(surface->mip_levels[0] != 1 ||
674 surface->num_sizes != 1 ||
675 surface->sizes[0].width < mode_cmd->width ||
676 surface->sizes[0].height < mode_cmd->height ||
677 surface->sizes[0].depth != 1)) {
678 DRM_ERROR("Incompatible surface dimensions "
679 "for requested mode.\n");
680 return -EINVAL;
681 }
682
683 switch (mode_cmd->depth) {
684 case 32:
685 format = SVGA3D_A8R8G8B8;
686 break;
687 case 24:
688 format = SVGA3D_X8R8G8B8;
689 break;
690 case 16:
691 format = SVGA3D_R5G6B5;
692 break;
693 case 15:
694 format = SVGA3D_A1R5G5B5;
695 break;
f01b7ba0
MD
696 case 8:
697 format = SVGA3D_LUMINANCE8;
698 break;
d3216a0c
TH
699 default:
700 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
701 return -EINVAL;
702 }
703
704 if (unlikely(format != surface->format)) {
705 DRM_ERROR("Invalid surface format for requested mode.\n");
706 return -EINVAL;
707 }
708
fb1d9738
JB
709 vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
710 if (!vfbs) {
711 ret = -ENOMEM;
712 goto out_err1;
713 }
714
fb1d9738
JB
715 if (!vmw_surface_reference(surface)) {
716 DRM_ERROR("failed to reference surface %p\n", surface);
80f0b5af
DV
717 ret = -EINVAL;
718 goto out_err2;
fb1d9738
JB
719 }
720
721 /* XXX get the first 3 from the surface info */
d3216a0c 722 vfbs->base.base.bits_per_pixel = mode_cmd->bpp;
01f2c773 723 vfbs->base.base.pitches[0] = mode_cmd->pitch;
d3216a0c
TH
724 vfbs->base.base.depth = mode_cmd->depth;
725 vfbs->base.base.width = mode_cmd->width;
726 vfbs->base.base.height = mode_cmd->height;
fb1d9738 727 vfbs->surface = surface;
90ff18bc 728 vfbs->base.user_handle = mode_cmd->handle;
3a939a5e 729 vfbs->master = drm_master_get(file_priv->master);
3a939a5e
TH
730
731 mutex_lock(&vmaster->fb_surf_mutex);
3a939a5e
TH
732 list_add_tail(&vfbs->head, &vmaster->fb_surf);
733 mutex_unlock(&vmaster->fb_surf_mutex);
734
fb1d9738
JB
735 *out = &vfbs->base;
736
80f0b5af
DV
737 ret = drm_framebuffer_init(dev, &vfbs->base.base,
738 &vmw_framebuffer_surface_funcs);
739 if (ret)
740 goto out_err3;
741
fb1d9738
JB
742 return 0;
743
744out_err3:
80f0b5af 745 vmw_surface_unreference(&surface);
fb1d9738
JB
746out_err2:
747 kfree(vfbs);
748out_err1:
749 return ret;
750}
751
752/*
753 * Dmabuf framebuffer code
754 */
755
756#define vmw_framebuffer_to_vfbd(x) \
757 container_of(x, struct vmw_framebuffer_dmabuf, base.base)
758
759struct vmw_framebuffer_dmabuf {
760 struct vmw_framebuffer base;
761 struct vmw_dma_buffer *buffer;
762};
763
764void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
765{
766 struct vmw_framebuffer_dmabuf *vfbd =
767 vmw_framebuffer_to_vfbd(framebuffer);
768
769 drm_framebuffer_cleanup(framebuffer);
770 vmw_dmabuf_unreference(&vfbd->buffer);
90ff18bc 771 ttm_base_object_unref(&vfbd->base.user_obj);
fb1d9738
JB
772
773 kfree(vfbd);
774}
775
5deb65cf
JB
776static int do_dmabuf_dirty_ldu(struct vmw_private *dev_priv,
777 struct vmw_framebuffer *framebuffer,
5deb65cf
JB
778 unsigned flags, unsigned color,
779 struct drm_clip_rect *clips,
780 unsigned num_clips, int increment)
781{
782 size_t fifo_size;
783 int i;
784
785 struct {
786 uint32_t header;
787 SVGAFifoCmdUpdate body;
788 } *cmd;
789
790 fifo_size = sizeof(*cmd) * num_clips;
791 cmd = vmw_fifo_reserve(dev_priv, fifo_size);
792 if (unlikely(cmd == NULL)) {
793 DRM_ERROR("Fifo reserve failed.\n");
794 return -ENOMEM;
795 }
796
797 memset(cmd, 0, fifo_size);
798 for (i = 0; i < num_clips; i++, clips += increment) {
799 cmd[i].header = cpu_to_le32(SVGA_CMD_UPDATE);
800 cmd[i].body.x = cpu_to_le32(clips->x1);
801 cmd[i].body.y = cpu_to_le32(clips->y1);
802 cmd[i].body.width = cpu_to_le32(clips->x2 - clips->x1);
803 cmd[i].body.height = cpu_to_le32(clips->y2 - clips->y1);
804 }
805
806 vmw_fifo_commit(dev_priv, fifo_size);
807 return 0;
808}
809
c6ca8391
JB
810static int do_dmabuf_define_gmrfb(struct drm_file *file_priv,
811 struct vmw_private *dev_priv,
812 struct vmw_framebuffer *framebuffer)
56d1c78d 813{
64fc9944 814 int depth = framebuffer->base.depth;
56d1c78d 815 size_t fifo_size;
c6ca8391 816 int ret;
56d1c78d
JB
817
818 struct {
819 uint32_t header;
820 SVGAFifoCmdDefineGMRFB body;
821 } *cmd;
56d1c78d 822
64fc9944
JB
823 /* Emulate RGBA support, contrary to svga_reg.h this is not
824 * supported by hosts. This is only a problem if we are reading
825 * this value later and expecting what we uploaded back.
826 */
827 if (depth == 32)
828 depth = 24;
829
c6ca8391 830 fifo_size = sizeof(*cmd);
56d1c78d
JB
831 cmd = kmalloc(fifo_size, GFP_KERNEL);
832 if (unlikely(cmd == NULL)) {
833 DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
834 return -ENOMEM;
835 }
836
837 memset(cmd, 0, fifo_size);
838 cmd->header = SVGA_CMD_DEFINE_GMRFB;
839 cmd->body.format.bitsPerPixel = framebuffer->base.bits_per_pixel;
64fc9944 840 cmd->body.format.colorDepth = depth;
56d1c78d 841 cmd->body.format.reserved = 0;
01f2c773 842 cmd->body.bytesPerLine = framebuffer->base.pitches[0];
90ff18bc 843 cmd->body.ptr.gmrId = framebuffer->user_handle;
56d1c78d
JB
844 cmd->body.ptr.offset = 0;
845
56d1c78d 846 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
bb1bd2f4 847 fifo_size, 0, NULL, NULL);
56d1c78d
JB
848
849 kfree(cmd);
850
851 return ret;
852}
853
c6ca8391
JB
854static int do_dmabuf_dirty_sou(struct drm_file *file_priv,
855 struct vmw_private *dev_priv,
856 struct vmw_framebuffer *framebuffer,
c6ca8391
JB
857 unsigned flags, unsigned color,
858 struct drm_clip_rect *clips,
bd49ae46
JB
859 unsigned num_clips, int increment,
860 struct vmw_fence_obj **out_fence)
c6ca8391
JB
861{
862 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
863 struct drm_clip_rect *clips_ptr;
864 int i, k, num_units, ret;
865 struct drm_crtc *crtc;
866 size_t fifo_size;
867
868 struct {
869 uint32_t header;
870 SVGAFifoCmdBlitGMRFBToScreen body;
871 } *blits;
872
873 ret = do_dmabuf_define_gmrfb(file_priv, dev_priv, framebuffer);
874 if (unlikely(ret != 0))
875 return ret; /* define_gmrfb prints warnings */
876
877 fifo_size = sizeof(*blits) * num_clips;
878 blits = kmalloc(fifo_size, GFP_KERNEL);
879 if (unlikely(blits == NULL)) {
880 DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
881 return -ENOMEM;
882 }
883
884 num_units = 0;
885 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
886 if (crtc->fb != &framebuffer->base)
887 continue;
888 units[num_units++] = vmw_crtc_to_du(crtc);
889 }
890
891 for (k = 0; k < num_units; k++) {
892 struct vmw_display_unit *unit = units[k];
893 int hit_num = 0;
894
895 clips_ptr = clips;
896 for (i = 0; i < num_clips; i++, clips_ptr += increment) {
897 int clip_x1 = clips_ptr->x1 - unit->crtc.x;
898 int clip_y1 = clips_ptr->y1 - unit->crtc.y;
899 int clip_x2 = clips_ptr->x2 - unit->crtc.x;
900 int clip_y2 = clips_ptr->y2 - unit->crtc.y;
6abff3c7 901 int move_x, move_y;
c6ca8391
JB
902
903 /* skip any crtcs that misses the clip region */
904 if (clip_x1 >= unit->crtc.mode.hdisplay ||
905 clip_y1 >= unit->crtc.mode.vdisplay ||
906 clip_x2 <= 0 || clip_y2 <= 0)
907 continue;
908
6abff3c7
JB
909 /* clip size to crtc size */
910 clip_x2 = min_t(int, clip_x2, unit->crtc.mode.hdisplay);
911 clip_y2 = min_t(int, clip_y2, unit->crtc.mode.vdisplay);
912
913 /* translate both src and dest to bring clip into screen */
914 move_x = min_t(int, clip_x1, 0);
915 move_y = min_t(int, clip_y1, 0);
916
917 /* actual translate done here */
c6ca8391
JB
918 blits[hit_num].header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN;
919 blits[hit_num].body.destScreenId = unit->unit;
6abff3c7
JB
920 blits[hit_num].body.srcOrigin.x = clips_ptr->x1 - move_x;
921 blits[hit_num].body.srcOrigin.y = clips_ptr->y1 - move_y;
922 blits[hit_num].body.destRect.left = clip_x1 - move_x;
923 blits[hit_num].body.destRect.top = clip_y1 - move_y;
c6ca8391
JB
924 blits[hit_num].body.destRect.right = clip_x2;
925 blits[hit_num].body.destRect.bottom = clip_y2;
926 hit_num++;
927 }
928
929 /* no clips hit the crtc */
930 if (hit_num == 0)
931 continue;
932
bd49ae46
JB
933 /* only return the last fence */
934 if (out_fence && *out_fence)
935 vmw_fence_obj_unreference(out_fence);
936
c6ca8391
JB
937 fifo_size = sizeof(*blits) * hit_num;
938 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, blits,
bd49ae46 939 fifo_size, 0, NULL, out_fence);
c6ca8391
JB
940
941 if (unlikely(ret != 0))
942 break;
943 }
944
945 kfree(blits);
946
947 return ret;
948}
949
fb1d9738 950int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
02b00162 951 struct drm_file *file_priv,
fb1d9738
JB
952 unsigned flags, unsigned color,
953 struct drm_clip_rect *clips,
954 unsigned num_clips)
955{
956 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
3a939a5e 957 struct vmw_master *vmaster = vmw_master(file_priv->master);
5deb65cf
JB
958 struct vmw_framebuffer_dmabuf *vfbd =
959 vmw_framebuffer_to_vfbd(framebuffer);
fb1d9738 960 struct drm_clip_rect norect;
5deb65cf 961 int ret, increment = 1;
fb1d9738 962
73e9efd4
VS
963 drm_modeset_lock_all(dev_priv->dev);
964
3a939a5e 965 ret = ttm_read_lock(&vmaster->lock, true);
73e9efd4
VS
966 if (unlikely(ret != 0)) {
967 drm_modeset_unlock_all(dev_priv->dev);
3a939a5e 968 return ret;
73e9efd4 969 }
3a939a5e 970
df1c93ba 971 if (!num_clips) {
fb1d9738
JB
972 num_clips = 1;
973 clips = &norect;
974 norect.x1 = norect.y1 = 0;
975 norect.x2 = framebuffer->width;
976 norect.y2 = framebuffer->height;
977 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
978 num_clips /= 2;
979 increment = 2;
980 }
981
56d1c78d 982 if (dev_priv->ldu_priv) {
c5c42360 983 ret = do_dmabuf_dirty_ldu(dev_priv, &vfbd->base,
56d1c78d
JB
984 flags, color,
985 clips, num_clips, increment);
986 } else {
987 ret = do_dmabuf_dirty_sou(file_priv, dev_priv, &vfbd->base,
c5c42360 988 flags, color,
bd49ae46 989 clips, num_clips, increment, NULL);
56d1c78d 990 }
fb1d9738 991
3a939a5e 992 ttm_read_unlock(&vmaster->lock);
73e9efd4
VS
993
994 drm_modeset_unlock_all(dev_priv->dev);
995
5deb65cf 996 return ret;
fb1d9738
JB
997}
998
999static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
1000 .destroy = vmw_framebuffer_dmabuf_destroy,
1001 .dirty = vmw_framebuffer_dmabuf_dirty,
fb1d9738
JB
1002};
1003
497a3ff9
JB
1004/**
1005 * Pin the dmabuffer to the start of vram.
1006 */
fb1d9738
JB
1007static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer *vfb)
1008{
1009 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
1010 struct vmw_framebuffer_dmabuf *vfbd =
1011 vmw_framebuffer_to_vfbd(&vfb->base);
1012 int ret;
1013
56d1c78d
JB
1014 /* This code should not be used with screen objects */
1015 BUG_ON(dev_priv->sou_priv);
d7e1958d 1016
fb1d9738
JB
1017 vmw_overlay_pause_all(dev_priv);
1018
d991ef03 1019 ret = vmw_dmabuf_to_start_of_vram(dev_priv, vfbd->buffer, true, false);
fb1d9738 1020
fb1d9738
JB
1021 vmw_overlay_resume_all(dev_priv);
1022
316ab13a
JB
1023 WARN_ON(ret != 0);
1024
fb1d9738
JB
1025 return 0;
1026}
1027
1028static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer *vfb)
1029{
1030 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
1031 struct vmw_framebuffer_dmabuf *vfbd =
1032 vmw_framebuffer_to_vfbd(&vfb->base);
1033
1034 if (!vfbd->buffer) {
1035 WARN_ON(!vfbd->buffer);
1036 return 0;
1037 }
1038
d991ef03 1039 return vmw_dmabuf_unpin(dev_priv, vfbd->buffer, false);
fb1d9738
JB
1040}
1041
d3216a0c
TH
1042static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
1043 struct vmw_dma_buffer *dmabuf,
1044 struct vmw_framebuffer **out,
1045 const struct drm_mode_fb_cmd
1046 *mode_cmd)
fb1d9738
JB
1047
1048{
1049 struct drm_device *dev = dev_priv->dev;
1050 struct vmw_framebuffer_dmabuf *vfbd;
d3216a0c 1051 unsigned int requested_size;
fb1d9738
JB
1052 int ret;
1053
d3216a0c
TH
1054 requested_size = mode_cmd->height * mode_cmd->pitch;
1055 if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) {
1056 DRM_ERROR("Screen buffer object size is too small "
1057 "for requested mode.\n");
1058 return -EINVAL;
1059 }
1060
c337ada7
JB
1061 /* Limited framebuffer color depth support for screen objects */
1062 if (dev_priv->sou_priv) {
1063 switch (mode_cmd->depth) {
1064 case 32:
1065 case 24:
1066 /* Only support 32 bpp for 32 and 24 depth fbs */
1067 if (mode_cmd->bpp == 32)
1068 break;
1069
1070 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
1071 mode_cmd->depth, mode_cmd->bpp);
1072 return -EINVAL;
1073 case 16:
1074 case 15:
1075 /* Only support 16 bpp for 16 and 15 depth fbs */
1076 if (mode_cmd->bpp == 16)
1077 break;
1078
1079 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
1080 mode_cmd->depth, mode_cmd->bpp);
1081 return -EINVAL;
1082 default:
1083 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
1084 return -EINVAL;
1085 }
1086 }
1087
fb1d9738
JB
1088 vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
1089 if (!vfbd) {
1090 ret = -ENOMEM;
1091 goto out_err1;
1092 }
1093
fb1d9738
JB
1094 if (!vmw_dmabuf_reference(dmabuf)) {
1095 DRM_ERROR("failed to reference dmabuf %p\n", dmabuf);
80f0b5af
DV
1096 ret = -EINVAL;
1097 goto out_err2;
fb1d9738
JB
1098 }
1099
d3216a0c 1100 vfbd->base.base.bits_per_pixel = mode_cmd->bpp;
01f2c773 1101 vfbd->base.base.pitches[0] = mode_cmd->pitch;
d3216a0c
TH
1102 vfbd->base.base.depth = mode_cmd->depth;
1103 vfbd->base.base.width = mode_cmd->width;
1104 vfbd->base.base.height = mode_cmd->height;
56d1c78d
JB
1105 if (!dev_priv->sou_priv) {
1106 vfbd->base.pin = vmw_framebuffer_dmabuf_pin;
1107 vfbd->base.unpin = vmw_framebuffer_dmabuf_unpin;
1108 }
2fcd5a73 1109 vfbd->base.dmabuf = true;
fb1d9738 1110 vfbd->buffer = dmabuf;
90ff18bc 1111 vfbd->base.user_handle = mode_cmd->handle;
fb1d9738
JB
1112 *out = &vfbd->base;
1113
80f0b5af
DV
1114 ret = drm_framebuffer_init(dev, &vfbd->base.base,
1115 &vmw_framebuffer_dmabuf_funcs);
1116 if (ret)
1117 goto out_err3;
1118
fb1d9738
JB
1119 return 0;
1120
1121out_err3:
80f0b5af 1122 vmw_dmabuf_unreference(&dmabuf);
fb1d9738
JB
1123out_err2:
1124 kfree(vfbd);
1125out_err1:
1126 return ret;
1127}
1128
1129/*
1130 * Generic Kernel modesetting functions
1131 */
1132
1133static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
1134 struct drm_file *file_priv,
308e5bcb 1135 struct drm_mode_fb_cmd2 *mode_cmd2)
fb1d9738
JB
1136{
1137 struct vmw_private *dev_priv = vmw_priv(dev);
1138 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
1139 struct vmw_framebuffer *vfb = NULL;
1140 struct vmw_surface *surface = NULL;
1141 struct vmw_dma_buffer *bo = NULL;
90ff18bc 1142 struct ttm_base_object *user_obj;
308e5bcb 1143 struct drm_mode_fb_cmd mode_cmd;
fb1d9738
JB
1144 int ret;
1145
308e5bcb
JB
1146 mode_cmd.width = mode_cmd2->width;
1147 mode_cmd.height = mode_cmd2->height;
1148 mode_cmd.pitch = mode_cmd2->pitches[0];
1149 mode_cmd.handle = mode_cmd2->handles[0];
248dbc23 1150 drm_fb_get_bpp_depth(mode_cmd2->pixel_format, &mode_cmd.depth,
308e5bcb
JB
1151 &mode_cmd.bpp);
1152
d3216a0c
TH
1153 /**
1154 * This code should be conditioned on Screen Objects not being used.
1155 * If screen objects are used, we can allocate a GMR to hold the
1156 * requested framebuffer.
1157 */
1158
8a783896 1159 if (!vmw_kms_validate_mode_vram(dev_priv,
1a464cbb
LT
1160 mode_cmd.pitch,
1161 mode_cmd.height)) {
d3216a0c 1162 DRM_ERROR("VRAM size is too small for requested mode.\n");
d9826409 1163 return ERR_PTR(-ENOMEM);
d3216a0c
TH
1164 }
1165
90ff18bc
TH
1166 /*
1167 * Take a reference on the user object of the resource
1168 * backing the kms fb. This ensures that user-space handle
1169 * lookups on that resource will always work as long as
1170 * it's registered with a kms framebuffer. This is important,
1171 * since vmw_execbuf_process identifies resources in the
1172 * command stream using user-space handles.
1173 */
1174
308e5bcb 1175 user_obj = ttm_base_object_lookup(tfile, mode_cmd.handle);
90ff18bc
TH
1176 if (unlikely(user_obj == NULL)) {
1177 DRM_ERROR("Could not locate requested kms frame buffer.\n");
1178 return ERR_PTR(-ENOENT);
1179 }
1180
d3216a0c
TH
1181 /**
1182 * End conditioned code.
1183 */
1184
e7ac9211
JB
1185 /* returns either a dmabuf or surface */
1186 ret = vmw_user_lookup_handle(dev_priv, tfile,
4cf73129 1187 mode_cmd.handle,
e7ac9211 1188 &surface, &bo);
fb1d9738 1189 if (ret)
e7ac9211
JB
1190 goto err_out;
1191
1192 /* Create the new framebuffer depending one what we got back */
1193 if (bo)
1194 ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb,
4cf73129 1195 &mode_cmd);
e7ac9211
JB
1196 else if (surface)
1197 ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv,
4cf73129 1198 surface, &vfb, &mode_cmd);
e7ac9211
JB
1199 else
1200 BUG();
1201
1202err_out:
1203 /* vmw_user_lookup_handle takes one ref so does new_fb */
1204 if (bo)
1205 vmw_dmabuf_unreference(&bo);
1206 if (surface)
1207 vmw_surface_unreference(&surface);
fb1d9738
JB
1208
1209 if (ret) {
1210 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
90ff18bc 1211 ttm_base_object_unref(&user_obj);
cce13ff7 1212 return ERR_PTR(ret);
90ff18bc
TH
1213 } else
1214 vfb->user_obj = user_obj;
fb1d9738
JB
1215
1216 return &vfb->base;
1217}
1218
e6ecefaa 1219static const struct drm_mode_config_funcs vmw_kms_funcs = {
fb1d9738 1220 .fb_create = vmw_kms_fb_create,
fb1d9738
JB
1221};
1222
2fcd5a73
JB
1223int vmw_kms_present(struct vmw_private *dev_priv,
1224 struct drm_file *file_priv,
1225 struct vmw_framebuffer *vfb,
1226 struct vmw_surface *surface,
1227 uint32_t sid,
1228 int32_t destX, int32_t destY,
1229 struct drm_vmw_rect *clips,
1230 uint32_t num_clips)
1231{
c6ca8391 1232 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
6abff3c7 1233 struct drm_clip_rect *tmp;
c6ca8391 1234 struct drm_crtc *crtc;
2fcd5a73 1235 size_t fifo_size;
c6ca8391
JB
1236 int i, k, num_units;
1237 int ret = 0; /* silence warning */
203dc220 1238 int left, right, top, bottom;
2fcd5a73
JB
1239
1240 struct {
1241 SVGA3dCmdHeader header;
1242 SVGA3dCmdBlitSurfaceToScreen body;
1243 } *cmd;
1244 SVGASignedRect *blits;
1245
c6ca8391
JB
1246 num_units = 0;
1247 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1248 if (crtc->fb != &vfb->base)
1249 continue;
1250 units[num_units++] = vmw_crtc_to_du(crtc);
1251 }
1252
2fcd5a73
JB
1253 BUG_ON(surface == NULL);
1254 BUG_ON(!clips || !num_clips);
1255
6abff3c7
JB
1256 tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL);
1257 if (unlikely(tmp == NULL)) {
1258 DRM_ERROR("Temporary cliprect memory alloc failed.\n");
1259 return -ENOMEM;
1260 }
1261
2fcd5a73
JB
1262 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
1263 cmd = kmalloc(fifo_size, GFP_KERNEL);
1264 if (unlikely(cmd == NULL)) {
1265 DRM_ERROR("Failed to allocate temporary fifo memory.\n");
6abff3c7
JB
1266 ret = -ENOMEM;
1267 goto out_free_tmp;
2fcd5a73
JB
1268 }
1269
203dc220
JB
1270 left = clips->x;
1271 right = clips->x + clips->w;
1272 top = clips->y;
1273 bottom = clips->y + clips->h;
1274
1275 for (i = 1; i < num_clips; i++) {
1276 left = min_t(int, left, (int)clips[i].x);
1277 right = max_t(int, right, (int)clips[i].x + clips[i].w);
1278 top = min_t(int, top, (int)clips[i].y);
1279 bottom = max_t(int, bottom, (int)clips[i].y + clips[i].h);
1280 }
1281
c6ca8391 1282 /* only need to do this once */
2fcd5a73 1283 memset(cmd, 0, fifo_size);
2fcd5a73 1284 cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
6abff3c7
JB
1285
1286 blits = (SVGASignedRect *)&cmd[1];
2fcd5a73 1287
203dc220
JB
1288 cmd->body.srcRect.left = left;
1289 cmd->body.srcRect.right = right;
1290 cmd->body.srcRect.top = top;
1291 cmd->body.srcRect.bottom = bottom;
2fcd5a73 1292
2fcd5a73 1293 for (i = 0; i < num_clips; i++) {
6abff3c7
JB
1294 tmp[i].x1 = clips[i].x - left;
1295 tmp[i].x2 = clips[i].x + clips[i].w - left;
1296 tmp[i].y1 = clips[i].y - top;
1297 tmp[i].y2 = clips[i].y + clips[i].h - top;
2fcd5a73
JB
1298 }
1299
c6ca8391
JB
1300 for (k = 0; k < num_units; k++) {
1301 struct vmw_display_unit *unit = units[k];
6abff3c7
JB
1302 struct vmw_clip_rect clip;
1303 int num;
1304
1305 clip.x1 = left + destX - unit->crtc.x;
1306 clip.y1 = top + destY - unit->crtc.y;
1307 clip.x2 = right + destX - unit->crtc.x;
1308 clip.y2 = bottom + destY - unit->crtc.y;
c6ca8391
JB
1309
1310 /* skip any crtcs that misses the clip region */
6abff3c7
JB
1311 if (clip.x1 >= unit->crtc.mode.hdisplay ||
1312 clip.y1 >= unit->crtc.mode.vdisplay ||
1313 clip.x2 <= 0 || clip.y2 <= 0)
c6ca8391
JB
1314 continue;
1315
6abff3c7
JB
1316 /*
1317 * In order for the clip rects to be correctly scaled
1318 * the src and dest rects needs to be the same size.
1319 */
1320 cmd->body.destRect.left = clip.x1;
1321 cmd->body.destRect.right = clip.x2;
1322 cmd->body.destRect.top = clip.y1;
1323 cmd->body.destRect.bottom = clip.y2;
1324
1325 /* create a clip rect of the crtc in dest coords */
1326 clip.x2 = unit->crtc.mode.hdisplay - clip.x1;
1327 clip.y2 = unit->crtc.mode.vdisplay - clip.y1;
1328 clip.x1 = 0 - clip.x1;
1329 clip.y1 = 0 - clip.y1;
1330
c6ca8391
JB
1331 /* need to reset sid as it is changed by execbuf */
1332 cmd->body.srcImage.sid = sid;
c6ca8391
JB
1333 cmd->body.destScreenId = unit->unit;
1334
6abff3c7
JB
1335 /* clip and write blits to cmd stream */
1336 vmw_clip_cliprects(tmp, num_clips, clip, blits, &num);
c6ca8391 1337
6abff3c7
JB
1338 /* if no cliprects hit skip this */
1339 if (num == 0)
1340 continue;
c6ca8391 1341
6abff3c7
JB
1342 /* recalculate package length */
1343 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num;
1344 cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
c6ca8391 1345 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
bb1bd2f4 1346 fifo_size, 0, NULL, NULL);
c6ca8391
JB
1347
1348 if (unlikely(ret != 0))
1349 break;
1350 }
2fcd5a73
JB
1351
1352 kfree(cmd);
6abff3c7
JB
1353out_free_tmp:
1354 kfree(tmp);
2fcd5a73
JB
1355
1356 return ret;
1357}
1358
1359int vmw_kms_readback(struct vmw_private *dev_priv,
1360 struct drm_file *file_priv,
1361 struct vmw_framebuffer *vfb,
1362 struct drm_vmw_fence_rep __user *user_fence_rep,
1363 struct drm_vmw_rect *clips,
1364 uint32_t num_clips)
1365{
1366 struct vmw_framebuffer_dmabuf *vfbd =
1367 vmw_framebuffer_to_vfbd(&vfb->base);
1368 struct vmw_dma_buffer *dmabuf = vfbd->buffer;
1369 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
1370 struct drm_crtc *crtc;
1371 size_t fifo_size;
1372 int i, k, ret, num_units, blits_pos;
1373
1374 struct {
1375 uint32_t header;
1376 SVGAFifoCmdDefineGMRFB body;
1377 } *cmd;
1378 struct {
1379 uint32_t header;
1380 SVGAFifoCmdBlitScreenToGMRFB body;
1381 } *blits;
1382
1383 num_units = 0;
1384 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1385 if (crtc->fb != &vfb->base)
1386 continue;
1387 units[num_units++] = vmw_crtc_to_du(crtc);
1388 }
1389
1390 BUG_ON(dmabuf == NULL);
1391 BUG_ON(!clips || !num_clips);
1392
1393 /* take a safe guess at fifo size */
1394 fifo_size = sizeof(*cmd) + sizeof(*blits) * num_clips * num_units;
1395 cmd = kmalloc(fifo_size, GFP_KERNEL);
1396 if (unlikely(cmd == NULL)) {
1397 DRM_ERROR("Failed to allocate temporary fifo memory.\n");
1398 return -ENOMEM;
1399 }
1400
1401 memset(cmd, 0, fifo_size);
1402 cmd->header = SVGA_CMD_DEFINE_GMRFB;
1403 cmd->body.format.bitsPerPixel = vfb->base.bits_per_pixel;
1404 cmd->body.format.colorDepth = vfb->base.depth;
1405 cmd->body.format.reserved = 0;
01f2c773 1406 cmd->body.bytesPerLine = vfb->base.pitches[0];
90ff18bc 1407 cmd->body.ptr.gmrId = vfb->user_handle;
2fcd5a73
JB
1408 cmd->body.ptr.offset = 0;
1409
1410 blits = (void *)&cmd[1];
1411 blits_pos = 0;
1412 for (i = 0; i < num_units; i++) {
1413 struct drm_vmw_rect *c = clips;
1414 for (k = 0; k < num_clips; k++, c++) {
1415 /* transform clip coords to crtc origin based coords */
1416 int clip_x1 = c->x - units[i]->crtc.x;
1417 int clip_x2 = c->x - units[i]->crtc.x + c->w;
1418 int clip_y1 = c->y - units[i]->crtc.y;
1419 int clip_y2 = c->y - units[i]->crtc.y + c->h;
1420 int dest_x = c->x;
1421 int dest_y = c->y;
1422
1423 /* compensate for clipping, we negate
1424 * a negative number and add that.
1425 */
1426 if (clip_x1 < 0)
1427 dest_x += -clip_x1;
1428 if (clip_y1 < 0)
1429 dest_y += -clip_y1;
1430
1431 /* clip */
1432 clip_x1 = max(clip_x1, 0);
1433 clip_y1 = max(clip_y1, 0);
1434 clip_x2 = min(clip_x2, units[i]->crtc.mode.hdisplay);
1435 clip_y2 = min(clip_y2, units[i]->crtc.mode.vdisplay);
1436
1437 /* and cull any rects that misses the crtc */
1438 if (clip_x1 >= units[i]->crtc.mode.hdisplay ||
1439 clip_y1 >= units[i]->crtc.mode.vdisplay ||
1440 clip_x2 <= 0 || clip_y2 <= 0)
1441 continue;
1442
1443 blits[blits_pos].header = SVGA_CMD_BLIT_SCREEN_TO_GMRFB;
1444 blits[blits_pos].body.srcScreenId = units[i]->unit;
1445 blits[blits_pos].body.destOrigin.x = dest_x;
1446 blits[blits_pos].body.destOrigin.y = dest_y;
1447
1448 blits[blits_pos].body.srcRect.left = clip_x1;
1449 blits[blits_pos].body.srcRect.top = clip_y1;
1450 blits[blits_pos].body.srcRect.right = clip_x2;
1451 blits[blits_pos].body.srcRect.bottom = clip_y2;
1452 blits_pos++;
1453 }
1454 }
1455 /* reset size here and use calculated exact size from loops */
1456 fifo_size = sizeof(*cmd) + sizeof(*blits) * blits_pos;
1457
1458 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, fifo_size,
bb1bd2f4 1459 0, user_fence_rep, NULL);
2fcd5a73
JB
1460
1461 kfree(cmd);
1462
1463 return ret;
1464}
1465
fb1d9738
JB
1466int vmw_kms_init(struct vmw_private *dev_priv)
1467{
1468 struct drm_device *dev = dev_priv->dev;
1469 int ret;
1470
1471 drm_mode_config_init(dev);
1472 dev->mode_config.funcs = &vmw_kms_funcs;
3bef3572
JB
1473 dev->mode_config.min_width = 1;
1474 dev->mode_config.min_height = 1;
7e71f8a5
JB
1475 /* assumed largest fb size */
1476 dev->mode_config.max_width = 8192;
1477 dev->mode_config.max_height = 8192;
fb1d9738 1478
56d1c78d
JB
1479 ret = vmw_kms_init_screen_object_display(dev_priv);
1480 if (ret) /* Fallback */
1481 (void)vmw_kms_init_legacy_display_system(dev_priv);
fb1d9738
JB
1482
1483 return 0;
1484}
1485
1486int vmw_kms_close(struct vmw_private *dev_priv)
1487{
1488 /*
1489 * Docs says we should take the lock before calling this function
1490 * but since it destroys encoders and our destructor calls
1491 * drm_encoder_cleanup which takes the lock we deadlock.
1492 */
1493 drm_mode_config_cleanup(dev_priv->dev);
c0d18316
JB
1494 if (dev_priv->sou_priv)
1495 vmw_kms_close_screen_object_display(dev_priv);
1496 else
1497 vmw_kms_close_legacy_display_system(dev_priv);
fb1d9738
JB
1498 return 0;
1499}
1500
1501int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
1502 struct drm_file *file_priv)
1503{
1504 struct drm_vmw_cursor_bypass_arg *arg = data;
1505 struct vmw_display_unit *du;
1506 struct drm_mode_object *obj;
1507 struct drm_crtc *crtc;
1508 int ret = 0;
1509
1510
1511 mutex_lock(&dev->mode_config.mutex);
1512 if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
1513
1514 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
1515 du = vmw_crtc_to_du(crtc);
1516 du->hotspot_x = arg->xhot;
1517 du->hotspot_y = arg->yhot;
1518 }
1519
1520 mutex_unlock(&dev->mode_config.mutex);
1521 return 0;
1522 }
1523
1524 obj = drm_mode_object_find(dev, arg->crtc_id, DRM_MODE_OBJECT_CRTC);
1525 if (!obj) {
4ae87ff0 1526 ret = -ENOENT;
fb1d9738
JB
1527 goto out;
1528 }
1529
1530 crtc = obj_to_crtc(obj);
1531 du = vmw_crtc_to_du(crtc);
1532
1533 du->hotspot_x = arg->xhot;
1534 du->hotspot_y = arg->yhot;
1535
1536out:
1537 mutex_unlock(&dev->mode_config.mutex);
1538
1539 return ret;
1540}
1541
0bef23f9 1542int vmw_kms_write_svga(struct vmw_private *vmw_priv,
d7e1958d 1543 unsigned width, unsigned height, unsigned pitch,
6558429b 1544 unsigned bpp, unsigned depth)
fb1d9738 1545{
d7e1958d
JB
1546 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1547 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
1548 else if (vmw_fifo_have_pitchlock(vmw_priv))
1549 iowrite32(pitch, vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
1550 vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
1551 vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
6558429b 1552 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
0bef23f9
MD
1553
1554 if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {
1555 DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
1556 depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH));
1557 return -EINVAL;
1558 }
1559
1560 return 0;
d7e1958d 1561}
fb1d9738 1562
d7e1958d
JB
1563int vmw_kms_save_vga(struct vmw_private *vmw_priv)
1564{
7c4f7780
TH
1565 struct vmw_vga_topology_state *save;
1566 uint32_t i;
1567
fb1d9738
JB
1568 vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
1569 vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
7c4f7780 1570 vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
d7e1958d
JB
1571 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1572 vmw_priv->vga_pitchlock =
7c4f7780 1573 vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
d7e1958d 1574 else if (vmw_fifo_have_pitchlock(vmw_priv))
7c4f7780
TH
1575 vmw_priv->vga_pitchlock = ioread32(vmw_priv->mmio_virt +
1576 SVGA_FIFO_PITCHLOCK);
1577
1578 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1579 return 0;
fb1d9738 1580
7c4f7780
TH
1581 vmw_priv->num_displays = vmw_read(vmw_priv,
1582 SVGA_REG_NUM_GUEST_DISPLAYS);
1583
029e50bf
TH
1584 if (vmw_priv->num_displays == 0)
1585 vmw_priv->num_displays = 1;
1586
7c4f7780
TH
1587 for (i = 0; i < vmw_priv->num_displays; ++i) {
1588 save = &vmw_priv->vga_save[i];
1589 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1590 save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY);
1591 save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X);
1592 save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y);
1593 save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH);
1594 save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT);
1595 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
30c78bb8
TH
1596 if (i == 0 && vmw_priv->num_displays == 1 &&
1597 save->width == 0 && save->height == 0) {
1598
1599 /*
1600 * It should be fairly safe to assume that these
1601 * values are uninitialized.
1602 */
1603
1604 save->width = vmw_priv->vga_width - save->pos_x;
1605 save->height = vmw_priv->vga_height - save->pos_y;
1606 }
7c4f7780 1607 }
30c78bb8 1608
fb1d9738
JB
1609 return 0;
1610}
1611
1612int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
1613{
7c4f7780
TH
1614 struct vmw_vga_topology_state *save;
1615 uint32_t i;
1616
fb1d9738
JB
1617 vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
1618 vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
7c4f7780 1619 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
d7e1958d
JB
1620 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1621 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
1622 vmw_priv->vga_pitchlock);
1623 else if (vmw_fifo_have_pitchlock(vmw_priv))
1624 iowrite32(vmw_priv->vga_pitchlock,
1625 vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
fb1d9738 1626
7c4f7780
TH
1627 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1628 return 0;
1629
1630 for (i = 0; i < vmw_priv->num_displays; ++i) {
1631 save = &vmw_priv->vga_save[i];
1632 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1633 vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary);
1634 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x);
1635 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y);
1636 vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width);
1637 vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height);
1638 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1639 }
1640
fb1d9738
JB
1641 return 0;
1642}
d8bd19d2 1643
e133e737
TH
1644bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
1645 uint32_t pitch,
1646 uint32_t height)
1647{
1648 return ((u64) pitch * (u64) height) < (u64) dev_priv->vram_size;
1649}
1650
1c482ab3
JB
1651
1652/**
1653 * Function called by DRM code called with vbl_lock held.
1654 */
7a1c2f6c
TH
1655u32 vmw_get_vblank_counter(struct drm_device *dev, int crtc)
1656{
1657 return 0;
1658}
626ab771 1659
1c482ab3
JB
1660/**
1661 * Function called by DRM code called with vbl_lock held.
1662 */
1663int vmw_enable_vblank(struct drm_device *dev, int crtc)
1664{
1665 return -ENOSYS;
1666}
1667
1668/**
1669 * Function called by DRM code called with vbl_lock held.
1670 */
1671void vmw_disable_vblank(struct drm_device *dev, int crtc)
1672{
1673}
1674
626ab771
JB
1675
1676/*
1677 * Small shared kms functions.
1678 */
1679
1680int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num,
1681 struct drm_vmw_rect *rects)
1682{
1683 struct drm_device *dev = dev_priv->dev;
1684 struct vmw_display_unit *du;
1685 struct drm_connector *con;
626ab771
JB
1686
1687 mutex_lock(&dev->mode_config.mutex);
1688
1689#if 0
6ea77d13
TH
1690 {
1691 unsigned int i;
1692
1693 DRM_INFO("%s: new layout ", __func__);
1694 for (i = 0; i < num; i++)
1695 DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y,
1696 rects[i].w, rects[i].h);
1697 DRM_INFO("\n");
1698 }
626ab771
JB
1699#endif
1700
1701 list_for_each_entry(con, &dev->mode_config.connector_list, head) {
1702 du = vmw_connector_to_du(con);
1703 if (num > du->unit) {
1704 du->pref_width = rects[du->unit].w;
1705 du->pref_height = rects[du->unit].h;
1706 du->pref_active = true;
cd2b89e7
TH
1707 du->gui_x = rects[du->unit].x;
1708 du->gui_y = rects[du->unit].y;
626ab771
JB
1709 } else {
1710 du->pref_width = 800;
1711 du->pref_height = 600;
1712 du->pref_active = false;
1713 }
1714 con->status = vmw_du_connector_detect(con, true);
1715 }
1716
1717 mutex_unlock(&dev->mode_config.mutex);
1718
1719 return 0;
1720}
1721
b5ec427e
JB
1722int vmw_du_page_flip(struct drm_crtc *crtc,
1723 struct drm_framebuffer *fb,
ed8d1975
KP
1724 struct drm_pending_vblank_event *event,
1725 uint32_t page_flip_flags)
b5ec427e
JB
1726{
1727 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
1728 struct drm_framebuffer *old_fb = crtc->fb;
1729 struct vmw_framebuffer *vfb = vmw_framebuffer_to_vfb(fb);
f5869a83 1730 struct drm_file *file_priv ;
b5ec427e
JB
1731 struct vmw_fence_obj *fence = NULL;
1732 struct drm_clip_rect clips;
1733 int ret;
1734
f5869a83
AC
1735 if (event == NULL)
1736 return -EINVAL;
1737
b5ec427e
JB
1738 /* require ScreenObject support for page flipping */
1739 if (!dev_priv->sou_priv)
1740 return -ENOSYS;
1741
f5869a83 1742 file_priv = event->base.file_priv;
b5ec427e
JB
1743 if (!vmw_kms_screen_object_flippable(dev_priv, crtc))
1744 return -EINVAL;
1745
1746 crtc->fb = fb;
1747
1748 /* do a full screen dirty update */
1749 clips.x1 = clips.y1 = 0;
1750 clips.x2 = fb->width;
1751 clips.y2 = fb->height;
1752
1753 if (vfb->dmabuf)
1754 ret = do_dmabuf_dirty_sou(file_priv, dev_priv, vfb,
1755 0, 0, &clips, 1, 1, &fence);
1756 else
1757 ret = do_surface_dirty_sou(dev_priv, file_priv, vfb,
1758 0, 0, &clips, 1, 1, &fence);
1759
1760
1761 if (ret != 0)
1762 goto out_no_fence;
1763 if (!fence) {
1764 ret = -EINVAL;
1765 goto out_no_fence;
1766 }
1767
1768 ret = vmw_event_fence_action_queue(file_priv, fence,
1769 &event->base,
1770 &event->event.tv_sec,
1771 &event->event.tv_usec,
1772 true);
1773
1774 /*
1775 * No need to hold on to this now. The only cleanup
1776 * we need to do if we fail is unref the fence.
1777 */
1778 vmw_fence_obj_unreference(&fence);
1779
1780 if (vmw_crtc_to_du(crtc)->is_implicit)
1781 vmw_kms_screen_object_update_implicit_fb(dev_priv, crtc);
1782
1783 return ret;
1784
1785out_no_fence:
1786 crtc->fb = old_fb;
1787 return ret;
1788}
1789
1790
626ab771
JB
1791void vmw_du_crtc_save(struct drm_crtc *crtc)
1792{
1793}
1794
1795void vmw_du_crtc_restore(struct drm_crtc *crtc)
1796{
1797}
1798
1799void vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
1800 u16 *r, u16 *g, u16 *b,
1801 uint32_t start, uint32_t size)
1802{
1803 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
1804 int i;
1805
1806 for (i = 0; i < size; i++) {
1807 DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i,
1808 r[i], g[i], b[i]);
1809 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8);
1810 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8);
1811 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8);
1812 }
1813}
1814
1815void vmw_du_connector_dpms(struct drm_connector *connector, int mode)
1816{
1817}
1818
1819void vmw_du_connector_save(struct drm_connector *connector)
1820{
1821}
1822
1823void vmw_du_connector_restore(struct drm_connector *connector)
1824{
1825}
1826
1827enum drm_connector_status
1828vmw_du_connector_detect(struct drm_connector *connector, bool force)
1829{
1830 uint32_t num_displays;
1831 struct drm_device *dev = connector->dev;
1832 struct vmw_private *dev_priv = vmw_priv(dev);
cd2b89e7 1833 struct vmw_display_unit *du = vmw_connector_to_du(connector);
626ab771
JB
1834
1835 mutex_lock(&dev_priv->hw_mutex);
1836 num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS);
1837 mutex_unlock(&dev_priv->hw_mutex);
1838
cd2b89e7
TH
1839 return ((vmw_connector_to_du(connector)->unit < num_displays &&
1840 du->pref_active) ?
626ab771
JB
1841 connector_status_connected : connector_status_disconnected);
1842}
1843
1844static struct drm_display_mode vmw_kms_connector_builtin[] = {
1845 /* 640x480@60Hz */
1846 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
1847 752, 800, 0, 480, 489, 492, 525, 0,
1848 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1849 /* 800x600@60Hz */
1850 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
1851 968, 1056, 0, 600, 601, 605, 628, 0,
1852 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1853 /* 1024x768@60Hz */
1854 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
1855 1184, 1344, 0, 768, 771, 777, 806, 0,
1856 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1857 /* 1152x864@75Hz */
1858 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
1859 1344, 1600, 0, 864, 865, 868, 900, 0,
1860 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1861 /* 1280x768@60Hz */
1862 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
1863 1472, 1664, 0, 768, 771, 778, 798, 0,
1864 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1865 /* 1280x800@60Hz */
1866 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
1867 1480, 1680, 0, 800, 803, 809, 831, 0,
1868 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1869 /* 1280x960@60Hz */
1870 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
1871 1488, 1800, 0, 960, 961, 964, 1000, 0,
1872 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1873 /* 1280x1024@60Hz */
1874 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
1875 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
1876 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1877 /* 1360x768@60Hz */
1878 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
1879 1536, 1792, 0, 768, 771, 777, 795, 0,
1880 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1881 /* 1440x1050@60Hz */
1882 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
1883 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
1884 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1885 /* 1440x900@60Hz */
1886 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
1887 1672, 1904, 0, 900, 903, 909, 934, 0,
1888 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1889 /* 1600x1200@60Hz */
1890 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
1891 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
1892 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1893 /* 1680x1050@60Hz */
1894 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
1895 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
1896 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1897 /* 1792x1344@60Hz */
1898 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
1899 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
1900 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1901 /* 1853x1392@60Hz */
1902 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
1903 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
1904 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1905 /* 1920x1200@60Hz */
1906 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
1907 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
1908 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1909 /* 1920x1440@60Hz */
1910 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
1911 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
1912 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1913 /* 2560x1600@60Hz */
1914 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
1915 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
1916 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1917 /* Terminate */
1918 { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
1919};
1920
1543b4dd
TH
1921/**
1922 * vmw_guess_mode_timing - Provide fake timings for a
1923 * 60Hz vrefresh mode.
1924 *
1925 * @mode - Pointer to a struct drm_display_mode with hdisplay and vdisplay
1926 * members filled in.
1927 */
1928static void vmw_guess_mode_timing(struct drm_display_mode *mode)
1929{
1930 mode->hsync_start = mode->hdisplay + 50;
1931 mode->hsync_end = mode->hsync_start + 50;
1932 mode->htotal = mode->hsync_end + 50;
1933
1934 mode->vsync_start = mode->vdisplay + 50;
1935 mode->vsync_end = mode->vsync_start + 50;
1936 mode->vtotal = mode->vsync_end + 50;
1937
1938 mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6;
1939 mode->vrefresh = drm_mode_vrefresh(mode);
1940}
1941
1942
626ab771
JB
1943int vmw_du_connector_fill_modes(struct drm_connector *connector,
1944 uint32_t max_width, uint32_t max_height)
1945{
1946 struct vmw_display_unit *du = vmw_connector_to_du(connector);
1947 struct drm_device *dev = connector->dev;
1948 struct vmw_private *dev_priv = vmw_priv(dev);
1949 struct drm_display_mode *mode = NULL;
1950 struct drm_display_mode *bmode;
1951 struct drm_display_mode prefmode = { DRM_MODE("preferred",
1952 DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1953 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1954 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC)
1955 };
1956 int i;
1957
1958 /* Add preferred mode */
1959 {
1960 mode = drm_mode_duplicate(dev, &prefmode);
1961 if (!mode)
1962 return 0;
1963 mode->hdisplay = du->pref_width;
1964 mode->vdisplay = du->pref_height;
1543b4dd 1965 vmw_guess_mode_timing(mode);
55bde5b2 1966
626ab771
JB
1967 if (vmw_kms_validate_mode_vram(dev_priv, mode->hdisplay * 2,
1968 mode->vdisplay)) {
1969 drm_mode_probed_add(connector, mode);
55bde5b2
JB
1970 } else {
1971 drm_mode_destroy(dev, mode);
1972 mode = NULL;
1973 }
626ab771 1974
55bde5b2
JB
1975 if (du->pref_mode) {
1976 list_del_init(&du->pref_mode->head);
1977 drm_mode_destroy(dev, du->pref_mode);
626ab771 1978 }
55bde5b2
JB
1979
1980 /* mode might be null here, this is intended */
1981 du->pref_mode = mode;
626ab771
JB
1982 }
1983
1984 for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) {
1985 bmode = &vmw_kms_connector_builtin[i];
1986 if (bmode->hdisplay > max_width ||
1987 bmode->vdisplay > max_height)
1988 continue;
1989
1990 if (!vmw_kms_validate_mode_vram(dev_priv, bmode->hdisplay * 2,
1991 bmode->vdisplay))
1992 continue;
1993
1994 mode = drm_mode_duplicate(dev, bmode);
1995 if (!mode)
1996 return 0;
1997 mode->vrefresh = drm_mode_vrefresh(mode);
1998
1999 drm_mode_probed_add(connector, mode);
2000 }
2001
d41025c0
JB
2002 /* Move the prefered mode first, help apps pick the right mode. */
2003 if (du->pref_mode)
2004 list_move(&du->pref_mode->head, &connector->probed_modes);
2005
626ab771
JB
2006 drm_mode_connector_list_update(connector);
2007
2008 return 1;
2009}
2010
2011int vmw_du_connector_set_property(struct drm_connector *connector,
2012 struct drm_property *property,
2013 uint64_t val)
2014{
2015 return 0;
2016}
cd2b89e7
TH
2017
2018
2019int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
2020 struct drm_file *file_priv)
2021{
2022 struct vmw_private *dev_priv = vmw_priv(dev);
2023 struct drm_vmw_update_layout_arg *arg =
2024 (struct drm_vmw_update_layout_arg *)data;
2025 struct vmw_master *vmaster = vmw_master(file_priv->master);
2026 void __user *user_rects;
2027 struct drm_vmw_rect *rects;
2028 unsigned rects_size;
2029 int ret;
2030 int i;
2031 struct drm_mode_config *mode_config = &dev->mode_config;
2032
2033 ret = ttm_read_lock(&vmaster->lock, true);
2034 if (unlikely(ret != 0))
2035 return ret;
2036
2037 if (!arg->num_outputs) {
2038 struct drm_vmw_rect def_rect = {0, 0, 800, 600};
2039 vmw_du_update_layout(dev_priv, 1, &def_rect);
2040 goto out_unlock;
2041 }
2042
2043 rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
bab9efc2
XW
2044 rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect),
2045 GFP_KERNEL);
cd2b89e7
TH
2046 if (unlikely(!rects)) {
2047 ret = -ENOMEM;
2048 goto out_unlock;
2049 }
2050
2051 user_rects = (void __user *)(unsigned long)arg->rects;
2052 ret = copy_from_user(rects, user_rects, rects_size);
2053 if (unlikely(ret != 0)) {
2054 DRM_ERROR("Failed to get rects.\n");
2055 ret = -EFAULT;
2056 goto out_free;
2057 }
2058
2059 for (i = 0; i < arg->num_outputs; ++i) {
bab9efc2
XW
2060 if (rects[i].x < 0 ||
2061 rects[i].y < 0 ||
2062 rects[i].x + rects[i].w > mode_config->max_width ||
2063 rects[i].y + rects[i].h > mode_config->max_height) {
cd2b89e7
TH
2064 DRM_ERROR("Invalid GUI layout.\n");
2065 ret = -EINVAL;
2066 goto out_free;
2067 }
2068 }
2069
2070 vmw_du_update_layout(dev_priv, arg->num_outputs, rects);
2071
2072out_free:
2073 kfree(rects);
2074out_unlock:
2075 ttm_read_unlock(&vmaster->lock);
2076 return ret;
2077}