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hwmon: (lm90) Rework alarm/status handling
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74ba9207 1// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4
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2/*
3 * lm90.c - Part of lm_sensors, Linux kernel modules for hardware
4 * monitoring
7c81c60f 5 * Copyright (C) 2003-2010 Jean Delvare <jdelvare@suse.de>
1da177e4
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6 *
7 * Based on the lm83 driver. The LM90 is a sensor chip made by National
8 * Semiconductor. It reports up to two temperatures (its own plus up to
9 * one external one) with a 0.125 deg resolution (1 deg for local
a874a10c 10 * temperature) and a 3-4 deg accuracy.
1da177e4
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11 *
12 * This driver also supports the LM89 and LM99, two other sensor chips
13 * made by National Semiconductor. Both have an increased remote
14 * temperature measurement accuracy (1 degree), and the LM99
15 * additionally shifts remote temperatures (measured and limits) by 16
97ae60bb 16 * degrees, which allows for higher temperatures measurement.
44bbe87e 17 * Note that there is no way to differentiate between both chips.
97ae60bb 18 * When device is auto-detected, the driver will assume an LM99.
1da177e4
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19 *
20 * This driver also supports the LM86, another sensor chip made by
21 * National Semiconductor. It is exactly similar to the LM90 except it
22 * has a higher accuracy.
1da177e4
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23 *
24 * This driver also supports the ADM1032, a sensor chip made by Analog
25 * Devices. That chip is similar to the LM90, with a few differences
a874a10c
JD
26 * that are not handled by this driver. Among others, it has a higher
27 * accuracy than the LM90, much like the LM86 does.
1da177e4
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28 *
29 * This driver also supports the MAX6657, MAX6658 and MAX6659 sensor
a874a10c 30 * chips made by Maxim. These chips are similar to the LM86.
44bbe87e 31 * Note that there is no easy way to differentiate between the three
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GR
32 * variants. We use the device address to detect MAX6659, which will result
33 * in a detection as max6657 if it is on address 0x4c. The extra address
34 * and features of the MAX6659 are only supported if the chip is configured
35 * explicitly as max6659, or if its address is not 0x4c.
36 * These chips lack the remote temperature offset feature.
1da177e4 37 *
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38 * This driver also supports the MAX6654 chip made by Maxim. This chip can be
39 * at 9 different addresses, similar to MAX6680/MAX6681. The MAX6654 is similar
40 * to MAX6657/MAX6658/MAX6659, but does not support critical temperature
41 * limits. Extended range is available by setting the configuration register
42 * accordingly, and is done during initialization. Extended precision is only
43 * available at conversion rates of 1 Hz and slower. Note that extended
44 * precision is not enabled by default, as this driver initializes all chips
45 * to 2 Hz by design.
229d495d 46 *
1a51e068
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47 * This driver also supports the MAX6646, MAX6647, MAX6648, MAX6649 and
48 * MAX6692 chips made by Maxim. These are again similar to the LM86,
49 * but they use unsigned temperature values and can report temperatures
50 * from 0 to 145 degrees.
271dabf5 51 *
32c82a93
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52 * This driver also supports the MAX6680 and MAX6681, two other sensor
53 * chips made by Maxim. These are quite similar to the other Maxim
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54 * chips. The MAX6680 and MAX6681 only differ in the pinout so they can
55 * be treated identically.
32c82a93 56 *
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57 * This driver also supports the MAX6695 and MAX6696, two other sensor
58 * chips made by Maxim. These are also quite similar to other Maxim
59 * chips, but support three temperature sensors instead of two. MAX6695
60 * and MAX6696 only differ in the pinout so they can be treated identically.
61 *
5a4e5e6a
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62 * This driver also supports ADT7461 and ADT7461A from Analog Devices as well as
63 * NCT1008 from ON Semiconductor. The chips are supported in both compatibility
64 * and extended mode. They are mostly compatible with LM90 except for a data
65 * format difference for the temperature value registers.
1da177e4 66 *
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67 * This driver also supports the SA56004 from Philips. This device is
68 * pin-compatible with the LM86, the ED/EDP parts are also address-compatible.
69 *
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70 * This driver also supports the G781 from GMT. This device is compatible
71 * with the ADM1032.
72 *
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73 * This driver also supports TMP451 and TMP461 from Texas Instruments.
74 * Those devices are supported in both compatibility and extended mode.
75 * They are mostly compatible with ADT7461 except for local temperature
76 * low byte register and max conversion rate.
1daaceb2 77 *
1da177e4
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78 * Since the LM90 was the first chipset supported by this driver, most
79 * comments will refer to this chipset, but are actually general and
80 * concern all supported chipsets, unless mentioned otherwise.
1da177e4
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81 */
82
1da177e4
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83#include <linux/module.h>
84#include <linux/init.h>
85#include <linux/slab.h>
86#include <linux/jiffies.h>
87#include <linux/i2c.h>
943b0830
MH
88#include <linux/hwmon.h>
89#include <linux/err.h>
9a61bf63 90#include <linux/mutex.h>
df8d57bf 91#include <linux/of_device.h>
0e39e01c 92#include <linux/sysfs.h>
109b1283 93#include <linux/interrupt.h>
3e0f964f 94#include <linux/regulator/consumer.h>
f6d07751 95#include <linux/workqueue.h>
1da177e4
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96
97/*
98 * Addresses to scan
99 * Address is fully defined internally and cannot be changed except for
32c82a93 100 * MAX6659, MAX6680 and MAX6681.
5a4e5e6a
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101 * LM86, LM89, LM90, LM99, ADM1032, ADM1032-1, ADT7461, ADT7461A, MAX6649,
102 * MAX6657, MAX6658, NCT1008 and W83L771 have address 0x4c.
103 * ADM1032-2, ADT7461-2, ADT7461A-2, LM89-1, LM99-1, MAX6646, and NCT1008D
104 * have address 0x4d.
271dabf5 105 * MAX6647 has address 0x4e.
13c84951 106 * MAX6659 can have address 0x4c, 0x4d or 0x4e.
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107 * MAX6654, MAX6680, and MAX6681 can have address 0x18, 0x19, 0x1a, 0x29,
108 * 0x2a, 0x2b, 0x4c, 0x4d or 0x4e.
2ef01793 109 * SA56004 can have address 0x48 through 0x4F.
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110 */
111
25e9c86d 112static const unsigned short normal_i2c[] = {
2ef01793
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113 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x48, 0x49, 0x4a, 0x4b, 0x4c,
114 0x4d, 0x4e, 0x4f, I2C_CLIENT_END };
1da177e4 115
13c84951 116enum chips { lm90, adm1032, lm99, lm86, max6657, max6659, adt7461, max6680,
f8344f76 117 max6646, w83l771, max6696, sa56004, g781, tmp451, tmp461, max6654 };
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118
119/*
120 * The LM90 registers
121 */
122
123#define LM90_REG_R_MAN_ID 0xFE
124#define LM90_REG_R_CHIP_ID 0xFF
125#define LM90_REG_R_CONFIG1 0x03
126#define LM90_REG_W_CONFIG1 0x09
127#define LM90_REG_R_CONFIG2 0xBF
128#define LM90_REG_W_CONFIG2 0xBF
129#define LM90_REG_R_CONVRATE 0x04
130#define LM90_REG_W_CONVRATE 0x0A
131#define LM90_REG_R_STATUS 0x02
132#define LM90_REG_R_LOCAL_TEMP 0x00
133#define LM90_REG_R_LOCAL_HIGH 0x05
134#define LM90_REG_W_LOCAL_HIGH 0x0B
135#define LM90_REG_R_LOCAL_LOW 0x06
136#define LM90_REG_W_LOCAL_LOW 0x0C
137#define LM90_REG_R_LOCAL_CRIT 0x20
138#define LM90_REG_W_LOCAL_CRIT 0x20
139#define LM90_REG_R_REMOTE_TEMPH 0x01
140#define LM90_REG_R_REMOTE_TEMPL 0x10
141#define LM90_REG_R_REMOTE_OFFSH 0x11
142#define LM90_REG_W_REMOTE_OFFSH 0x11
143#define LM90_REG_R_REMOTE_OFFSL 0x12
144#define LM90_REG_W_REMOTE_OFFSL 0x12
145#define LM90_REG_R_REMOTE_HIGHH 0x07
146#define LM90_REG_W_REMOTE_HIGHH 0x0D
147#define LM90_REG_R_REMOTE_HIGHL 0x13
148#define LM90_REG_W_REMOTE_HIGHL 0x13
149#define LM90_REG_R_REMOTE_LOWH 0x08
150#define LM90_REG_W_REMOTE_LOWH 0x0E
151#define LM90_REG_R_REMOTE_LOWL 0x14
152#define LM90_REG_W_REMOTE_LOWL 0x14
153#define LM90_REG_R_REMOTE_CRIT 0x19
154#define LM90_REG_W_REMOTE_CRIT 0x19
155#define LM90_REG_R_TCRIT_HYST 0x21
156#define LM90_REG_W_TCRIT_HYST 0x21
157
229d495d 158/* MAX6646/6647/6649/6654/6657/6658/6659/6695/6696 registers */
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159
160#define MAX6657_REG_R_LOCAL_TEMPL 0x11
06e1c0a2 161#define MAX6696_REG_R_STATUS2 0x12
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162#define MAX6659_REG_R_REMOTE_EMERG 0x16
163#define MAX6659_REG_W_REMOTE_EMERG 0x16
164#define MAX6659_REG_R_LOCAL_EMERG 0x17
165#define MAX6659_REG_W_LOCAL_EMERG 0x17
f65e1708 166
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167/* SA56004 registers */
168
169#define SA56004_REG_R_LOCAL_TEMPL 0x22
170
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171#define LM90_MAX_CONVRATE_MS 16000 /* Maximum conversion rate in ms */
172
f8344f76 173/* TMP451/TMP461 registers */
1daaceb2 174#define TMP451_REG_R_LOCAL_TEMPL 0x15
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175#define TMP451_REG_CONALERT 0x22
176
177#define TMP461_REG_CHEN 0x16
178#define TMP461_REG_DFC 0x24
1daaceb2 179
23b2d477
NC
180/*
181 * Device flags
182 */
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183#define LM90_FLAG_ADT7461_EXT (1 << 0) /* ADT7461 extended mode */
184/* Device features */
185#define LM90_HAVE_OFFSET (1 << 1) /* temperature offset register */
88073bb1 186#define LM90_HAVE_REM_LIMIT_EXT (1 << 3) /* extended remote limit */
6948708d 187#define LM90_HAVE_EMERGENCY (1 << 4) /* 3rd upper (emergency) limit */
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188#define LM90_HAVE_EMERGENCY_ALARM (1 << 5)/* emergency alarm */
189#define LM90_HAVE_TEMP3 (1 << 6) /* 3rd temperature sensor */
1179324c 190#define LM90_HAVE_BROKEN_ALERT (1 << 7) /* Broken alert */
f347e249
GR
191#define LM90_HAVE_EXTENDED_TEMP (1 << 8) /* extended temperature support*/
192#define LM90_PAUSE_FOR_CONFIG (1 << 9) /* Pause conversion for config */
16ba51b5 193#define LM90_HAVE_CRIT (1 << 10)/* Chip supports CRIT/OVERT register */
da7dc056 194#define LM90_HAVE_CRIT_ALRM_SWP (1 << 11)/* critical alarm bits swapped */
23b2d477 195
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WN
196/* LM90 status */
197#define LM90_STATUS_LTHRM (1 << 0) /* local THERM limit tripped */
198#define LM90_STATUS_RTHRM (1 << 1) /* remote THERM limit tripped */
199#define LM90_STATUS_ROPEN (1 << 2) /* remote is an open circuit */
200#define LM90_STATUS_RLOW (1 << 3) /* remote low temp limit tripped */
201#define LM90_STATUS_RHIGH (1 << 4) /* remote high temp limit tripped */
202#define LM90_STATUS_LLOW (1 << 5) /* local low temp limit tripped */
203#define LM90_STATUS_LHIGH (1 << 6) /* local high temp limit tripped */
cdc5287a 204#define LM90_STATUS_BUSY (1 << 7) /* conversion is ongoing */
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205
206#define MAX6696_STATUS2_R2THRM (1 << 1) /* remote2 THERM limit tripped */
207#define MAX6696_STATUS2_R2OPEN (1 << 2) /* remote2 is an open circuit */
208#define MAX6696_STATUS2_R2LOW (1 << 3) /* remote2 low temp limit tripped */
209#define MAX6696_STATUS2_R2HIGH (1 << 4) /* remote2 high temp limit tripped */
210#define MAX6696_STATUS2_ROT2 (1 << 5) /* remote emergency limit tripped */
211#define MAX6696_STATUS2_R2OT2 (1 << 6) /* remote2 emergency limit tripped */
212#define MAX6696_STATUS2_LOT2 (1 << 7) /* local emergency limit tripped */
213
1da177e4
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214/*
215 * Driver data (common to all clients)
216 */
217
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JD
218static const struct i2c_device_id lm90_id[] = {
219 { "adm1032", adm1032 },
220 { "adt7461", adt7461 },
5a4e5e6a 221 { "adt7461a", adt7461 },
ae544f64 222 { "g781", g781 },
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JD
223 { "lm90", lm90 },
224 { "lm86", lm86 },
97ae60bb
JD
225 { "lm89", lm86 },
226 { "lm99", lm99 },
271dabf5
BH
227 { "max6646", max6646 },
228 { "max6647", max6646 },
229 { "max6649", max6646 },
229d495d 230 { "max6654", max6654 },
9b0e8526
JD
231 { "max6657", max6657 },
232 { "max6658", max6657 },
13c84951 233 { "max6659", max6659 },
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234 { "max6680", max6680 },
235 { "max6681", max6680 },
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GR
236 { "max6695", max6696 },
237 { "max6696", max6696 },
5a4e5e6a 238 { "nct1008", adt7461 },
6771ea1f 239 { "w83l771", w83l771 },
2ef01793 240 { "sa56004", sa56004 },
1daaceb2 241 { "tmp451", tmp451 },
f8344f76 242 { "tmp461", tmp461 },
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JD
243 { }
244};
245MODULE_DEVICE_TABLE(i2c, lm90_id);
246
787afaa3 247static const struct of_device_id __maybe_unused lm90_of_match[] = {
df8d57bf
JMC
248 {
249 .compatible = "adi,adm1032",
250 .data = (void *)adm1032
251 },
252 {
253 .compatible = "adi,adt7461",
254 .data = (void *)adt7461
255 },
256 {
257 .compatible = "adi,adt7461a",
258 .data = (void *)adt7461
259 },
260 {
261 .compatible = "gmt,g781",
262 .data = (void *)g781
263 },
264 {
265 .compatible = "national,lm90",
266 .data = (void *)lm90
267 },
268 {
269 .compatible = "national,lm86",
270 .data = (void *)lm86
271 },
272 {
273 .compatible = "national,lm89",
274 .data = (void *)lm86
275 },
276 {
277 .compatible = "national,lm99",
278 .data = (void *)lm99
279 },
280 {
281 .compatible = "dallas,max6646",
282 .data = (void *)max6646
283 },
284 {
285 .compatible = "dallas,max6647",
286 .data = (void *)max6646
287 },
288 {
289 .compatible = "dallas,max6649",
290 .data = (void *)max6646
291 },
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JL
292 {
293 .compatible = "dallas,max6654",
294 .data = (void *)max6654
295 },
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JMC
296 {
297 .compatible = "dallas,max6657",
298 .data = (void *)max6657
299 },
300 {
301 .compatible = "dallas,max6658",
302 .data = (void *)max6657
303 },
304 {
305 .compatible = "dallas,max6659",
306 .data = (void *)max6659
307 },
308 {
309 .compatible = "dallas,max6680",
310 .data = (void *)max6680
311 },
312 {
313 .compatible = "dallas,max6681",
314 .data = (void *)max6680
315 },
316 {
317 .compatible = "dallas,max6695",
318 .data = (void *)max6696
319 },
320 {
321 .compatible = "dallas,max6696",
322 .data = (void *)max6696
323 },
324 {
325 .compatible = "onnn,nct1008",
326 .data = (void *)adt7461
327 },
328 {
329 .compatible = "winbond,w83l771",
330 .data = (void *)w83l771
331 },
332 {
333 .compatible = "nxp,sa56004",
334 .data = (void *)sa56004
335 },
336 {
337 .compatible = "ti,tmp451",
338 .data = (void *)tmp451
339 },
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GR
340 {
341 .compatible = "ti,tmp461",
342 .data = (void *)tmp461
343 },
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JMC
344 { },
345};
346MODULE_DEVICE_TABLE(of, lm90_of_match);
347
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GR
348/*
349 * chip type specific parameters
350 */
351struct lm90_params {
352 u32 flags; /* Capabilities */
353 u16 alert_alarms; /* Which alarm bits trigger ALERT# */
354 /* Upper 8 bits for max6695/96 */
0c01b644 355 u8 max_convrate; /* Maximum conversion rate register value */
a095f687 356 u8 reg_local_ext; /* Extended local temp register (optional) */
4667bcb8
GR
357};
358
359static const struct lm90_params lm90_params[] = {
360 [adm1032] = {
1179324c 361 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
16ba51b5 362 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT,
4667bcb8 363 .alert_alarms = 0x7c,
0c01b644 364 .max_convrate = 10,
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GR
365 },
366 [adt7461] = {
1179324c 367 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
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GR
368 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP
369 | LM90_HAVE_CRIT,
4667bcb8 370 .alert_alarms = 0x7c,
0c01b644 371 .max_convrate = 10,
4667bcb8 372 },
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GR
373 [g781] = {
374 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
16ba51b5 375 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT,
ae544f64 376 .alert_alarms = 0x7c,
a66c5ed5 377 .max_convrate = 7,
ae544f64 378 },
4667bcb8 379 [lm86] = {
16ba51b5
GR
380 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
381 | LM90_HAVE_CRIT,
4667bcb8 382 .alert_alarms = 0x7b,
0c01b644 383 .max_convrate = 9,
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GR
384 },
385 [lm90] = {
16ba51b5
GR
386 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
387 | LM90_HAVE_CRIT,
4667bcb8 388 .alert_alarms = 0x7b,
0c01b644 389 .max_convrate = 9,
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GR
390 },
391 [lm99] = {
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392 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
393 | LM90_HAVE_CRIT,
4667bcb8 394 .alert_alarms = 0x7b,
0c01b644 395 .max_convrate = 9,
4667bcb8
GR
396 },
397 [max6646] = {
f614629f 398 .flags = LM90_HAVE_CRIT | LM90_HAVE_BROKEN_ALERT,
4667bcb8 399 .alert_alarms = 0x7c,
0c01b644 400 .max_convrate = 6,
2ef01793 401 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8 402 },
229d495d 403 [max6654] = {
a53fff96 404 .flags = LM90_HAVE_BROKEN_ALERT,
229d495d
JL
405 .alert_alarms = 0x7c,
406 .max_convrate = 7,
407 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
408 },
4667bcb8 409 [max6657] = {
16ba51b5 410 .flags = LM90_PAUSE_FOR_CONFIG | LM90_HAVE_CRIT,
4667bcb8 411 .alert_alarms = 0x7c,
0c01b644 412 .max_convrate = 8,
2ef01793 413 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8
GR
414 },
415 [max6659] = {
16ba51b5 416 .flags = LM90_HAVE_EMERGENCY | LM90_HAVE_CRIT,
4667bcb8 417 .alert_alarms = 0x7c,
0c01b644 418 .max_convrate = 8,
2ef01793 419 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
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GR
420 },
421 [max6680] = {
da7dc056 422 .flags = LM90_HAVE_OFFSET | LM90_HAVE_CRIT
94746b0b 423 | LM90_HAVE_CRIT_ALRM_SWP | LM90_HAVE_BROKEN_ALERT,
4667bcb8 424 .alert_alarms = 0x7c,
0c01b644 425 .max_convrate = 7,
4667bcb8
GR
426 },
427 [max6696] = {
a095f687 428 .flags = LM90_HAVE_EMERGENCY
16ba51b5 429 | LM90_HAVE_EMERGENCY_ALARM | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT,
e41fae2b 430 .alert_alarms = 0x1c7c,
0c01b644 431 .max_convrate = 6,
2ef01793 432 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8
GR
433 },
434 [w83l771] = {
16ba51b5 435 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT,
4667bcb8 436 .alert_alarms = 0x7c,
0c01b644 437 .max_convrate = 8,
4667bcb8 438 },
2ef01793 439 [sa56004] = {
16ba51b5 440 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT,
2ef01793
SD
441 .alert_alarms = 0x7b,
442 .max_convrate = 9,
443 .reg_local_ext = SA56004_REG_R_LOCAL_TEMPL,
444 },
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WN
445 [tmp451] = {
446 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
16ba51b5 447 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT,
1daaceb2
WN
448 .alert_alarms = 0x7c,
449 .max_convrate = 9,
450 .reg_local_ext = TMP451_REG_R_LOCAL_TEMPL,
eb1c8f43 451 },
f8344f76
GR
452 [tmp461] = {
453 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
16ba51b5 454 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT,
f8344f76
GR
455 .alert_alarms = 0x7c,
456 .max_convrate = 9,
457 .reg_local_ext = TMP451_REG_R_LOCAL_TEMPL,
458 },
4667bcb8
GR
459};
460
40465d94
WN
461/*
462 * TEMP8 register index
463 */
464enum lm90_temp8_reg_index {
465 LOCAL_LOW = 0,
466 LOCAL_HIGH,
467 LOCAL_CRIT,
468 REMOTE_CRIT,
469 LOCAL_EMERG, /* max6659 and max6695/96 */
470 REMOTE_EMERG, /* max6659 and max6695/96 */
471 REMOTE2_CRIT, /* max6695/96 only */
472 REMOTE2_EMERG, /* max6695/96 only */
473 TEMP8_REG_NUM
474};
475
476/*
477 * TEMP11 register index
478 */
479enum lm90_temp11_reg_index {
480 REMOTE_TEMP = 0,
481 REMOTE_LOW,
482 REMOTE_HIGH,
483 REMOTE_OFFSET, /* except max6646, max6657/58/59, and max6695/96 */
484 LOCAL_TEMP,
485 REMOTE2_TEMP, /* max6695/96 only */
486 REMOTE2_LOW, /* max6695/96 only */
487 REMOTE2_HIGH, /* max6695/96 only */
488 TEMP11_REG_NUM
489};
490
1da177e4
LT
491/*
492 * Client data (each client gets its own)
493 */
494
495struct lm90_data {
1de8b250 496 struct i2c_client *client;
94dbd23e 497 struct device *hwmon_dev;
eb1c8f43
GR
498 u32 channel_config[4];
499 struct hwmon_channel_info temp_info;
500 const struct hwmon_channel_info *info[3];
501 struct hwmon_chip_info chip;
9a61bf63 502 struct mutex update_lock;
f6d07751 503 struct delayed_work alert_work;
2f83ab77 504 bool valid; /* true if register values are valid */
f6d07751 505 bool alarms_valid; /* true if status register values are valid */
1da177e4 506 unsigned long last_updated; /* in jiffies */
f6d07751 507 unsigned long alarms_updated; /* in jiffies */
1da177e4 508 int kind;
4667bcb8 509 u32 flags;
1da177e4 510
38bab98a 511 unsigned int update_interval; /* in milliseconds */
0c01b644 512
b849e5d1 513 u8 config; /* Current configuration register value */
95238364 514 u8 config_orig; /* Original configuration register value */
0c01b644 515 u8 convrate_orig; /* Original conversion rate register value */
06e1c0a2
GR
516 u16 alert_alarms; /* Which alarm bits trigger ALERT# */
517 /* Upper 8 bits for max6695/96 */
0c01b644 518 u8 max_convrate; /* Maximum conversion rate */
2ef01793 519 u8 reg_local_ext; /* local extension register offset */
95238364 520
1da177e4 521 /* registers values */
40465d94
WN
522 s8 temp8[TEMP8_REG_NUM];
523 s16 temp11[TEMP11_REG_NUM];
1da177e4 524 u8 temp_hyst;
f6d07751
GR
525 u16 reported_alarms; /* alarms reported as sysfs/udev events */
526 u16 current_alarms; /* current alarms, reported by chip */
527 u16 alarms; /* alarms not yet reported to user */
1da177e4
LT
528};
529
15b66ab6
GR
530/*
531 * Support functions
532 */
533
534/*
535 * The ADM1032 supports PEC but not on write byte transactions, so we need
536 * to explicitly ask for a transaction without PEC.
537 */
538static inline s32 adm1032_write_byte(struct i2c_client *client, u8 value)
539{
540 return i2c_smbus_xfer(client->adapter, client->addr,
541 client->flags & ~I2C_CLIENT_PEC,
542 I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL);
543}
544
545/*
546 * It is assumed that client->update_lock is held (unless we are in
547 * detection or initialization steps). This matters when PEC is enabled,
548 * because we don't want the address pointer to change between the write
549 * byte and the read byte transactions.
550 */
37ad04d7 551static int lm90_read_reg(struct i2c_client *client, u8 reg)
15b66ab6
GR
552{
553 int err;
554
555 if (client->flags & I2C_CLIENT_PEC) {
556 err = adm1032_write_byte(client, reg);
557 if (err >= 0)
558 err = i2c_smbus_read_byte(client);
559 } else
560 err = i2c_smbus_read_byte_data(client, reg);
561
37ad04d7 562 return err;
15b66ab6
GR
563}
564
37ad04d7 565static int lm90_read16(struct i2c_client *client, u8 regh, u8 regl)
15b66ab6 566{
37ad04d7 567 int oldh, newh, l;
15b66ab6
GR
568
569 /*
570 * There is a trick here. We have to read two registers to have the
571 * sensor temperature, but we have to beware a conversion could occur
25985edc 572 * between the readings. The datasheet says we should either use
15b66ab6
GR
573 * the one-shot conversion register, which we don't want to do
574 * (disables hardware monitoring) or monitor the busy bit, which is
575 * impossible (we can't read the values and monitor that bit at the
576 * exact same time). So the solution used here is to read the high
577 * byte once, then the low byte, then the high byte again. If the new
578 * high byte matches the old one, then we have a valid reading. Else
579 * we have to read the low byte again, and now we believe we have a
580 * correct reading.
581 */
37ad04d7
GR
582 oldh = lm90_read_reg(client, regh);
583 if (oldh < 0)
584 return oldh;
585 l = lm90_read_reg(client, regl);
586 if (l < 0)
587 return l;
588 newh = lm90_read_reg(client, regh);
589 if (newh < 0)
590 return newh;
15b66ab6 591 if (oldh != newh) {
37ad04d7
GR
592 l = lm90_read_reg(client, regl);
593 if (l < 0)
594 return l;
15b66ab6 595 }
37ad04d7 596 return (newh << 8) | l;
15b66ab6
GR
597}
598
7a1d220c
GR
599static int lm90_update_confreg(struct lm90_data *data, u8 config)
600{
601 if (data->config != config) {
602 int err;
603
604 err = i2c_smbus_write_byte_data(data->client,
605 LM90_REG_W_CONFIG1,
606 config);
607 if (err)
608 return err;
609 data->config = config;
610 }
611 return 0;
612}
613
15b66ab6
GR
614/*
615 * client->update_lock must be held when calling this function (unless we are
616 * in detection or initialization steps), and while a remote channel other
617 * than channel 0 is selected. Also, calling code must make sure to re-select
618 * external channel 0 before releasing the lock. This is necessary because
619 * various registers have different meanings as a result of selecting a
620 * non-default remote channel.
621 */
7a1d220c 622static int lm90_select_remote_channel(struct lm90_data *data, int channel)
15b66ab6 623{
7a1d220c
GR
624 int err = 0;
625
15b66ab6 626 if (data->kind == max6696) {
b849e5d1 627 u8 config = data->config & ~0x08;
b849e5d1 628
15b66ab6
GR
629 if (channel)
630 config |= 0x08;
7a1d220c 631 err = lm90_update_confreg(data, config);
15b66ab6 632 }
7a1d220c 633 return err;
15b66ab6
GR
634}
635
7a1d220c 636static int lm90_write_convrate(struct lm90_data *data, int val)
62456189 637{
b849e5d1 638 u8 config = data->config;
62456189 639 int err;
62456189
BY
640
641 /* Save config and pause conversion */
642 if (data->flags & LM90_PAUSE_FOR_CONFIG) {
7a1d220c
GR
643 err = lm90_update_confreg(data, config | 0x40);
644 if (err < 0)
645 return err;
62456189
BY
646 }
647
648 /* Set conv rate */
7a1d220c 649 err = i2c_smbus_write_byte_data(data->client, LM90_REG_W_CONVRATE, val);
62456189
BY
650
651 /* Revert change to config */
7a1d220c 652 lm90_update_confreg(data, config);
62456189
BY
653
654 return err;
655}
656
0c01b644
GR
657/*
658 * Set conversion rate.
659 * client->update_lock must be held when calling this function (unless we are
660 * in detection or initialization steps).
661 */
eb1c8f43
GR
662static int lm90_set_convrate(struct i2c_client *client, struct lm90_data *data,
663 unsigned int interval)
0c01b644 664{
0c01b644 665 unsigned int update_interval;
eb1c8f43 666 int i, err;
0c01b644
GR
667
668 /* Shift calculations to avoid rounding errors */
669 interval <<= 6;
670
671 /* find the nearest update rate */
672 for (i = 0, update_interval = LM90_MAX_CONVRATE_MS << 6;
673 i < data->max_convrate; i++, update_interval >>= 1)
674 if (interval >= update_interval * 3 / 4)
675 break;
676
7a1d220c 677 err = lm90_write_convrate(data, i);
0c01b644 678 data->update_interval = DIV_ROUND_CLOSEST(update_interval, 64);
eb1c8f43 679 return err;
0c01b644
GR
680}
681
10bfef47
GR
682static int lm90_update_limits(struct device *dev)
683{
684 struct lm90_data *data = dev_get_drvdata(dev);
685 struct i2c_client *client = data->client;
686 int val;
687
16ba51b5
GR
688 if (data->flags & LM90_HAVE_CRIT) {
689 val = lm90_read_reg(client, LM90_REG_R_LOCAL_CRIT);
690 if (val < 0)
691 return val;
692 data->temp8[LOCAL_CRIT] = val;
10bfef47 693
16ba51b5
GR
694 val = lm90_read_reg(client, LM90_REG_R_REMOTE_CRIT);
695 if (val < 0)
696 return val;
697 data->temp8[REMOTE_CRIT] = val;
10bfef47 698
16ba51b5
GR
699 val = lm90_read_reg(client, LM90_REG_R_TCRIT_HYST);
700 if (val < 0)
701 return val;
702 data->temp_hyst = val;
703 }
10bfef47 704
be9d6374 705 val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWH);
10bfef47
GR
706 if (val < 0)
707 return val;
708 data->temp11[REMOTE_LOW] = val << 8;
709
710 if (data->flags & LM90_HAVE_REM_LIMIT_EXT) {
711 val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWL);
712 if (val < 0)
713 return val;
714 data->temp11[REMOTE_LOW] |= val;
715 }
716
717 val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHH);
718 if (val < 0)
719 return val;
720 data->temp11[REMOTE_HIGH] = val << 8;
721
722 if (data->flags & LM90_HAVE_REM_LIMIT_EXT) {
723 val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHL);
724 if (val < 0)
725 return val;
726 data->temp11[REMOTE_HIGH] |= val;
727 }
728
729 if (data->flags & LM90_HAVE_OFFSET) {
730 val = lm90_read16(client, LM90_REG_R_REMOTE_OFFSH,
731 LM90_REG_R_REMOTE_OFFSL);
732 if (val < 0)
733 return val;
734 data->temp11[REMOTE_OFFSET] = val;
735 }
736
737 if (data->flags & LM90_HAVE_EMERGENCY) {
738 val = lm90_read_reg(client, MAX6659_REG_R_LOCAL_EMERG);
739 if (val < 0)
740 return val;
741 data->temp8[LOCAL_EMERG] = val;
742
743 val = lm90_read_reg(client, MAX6659_REG_R_REMOTE_EMERG);
744 if (val < 0)
745 return val;
746 data->temp8[REMOTE_EMERG] = val;
747 }
748
749 if (data->kind == max6696) {
7a1d220c 750 val = lm90_select_remote_channel(data, 1);
10bfef47
GR
751 if (val < 0)
752 return val;
753
754 val = lm90_read_reg(client, LM90_REG_R_REMOTE_CRIT);
755 if (val < 0)
756 return val;
757 data->temp8[REMOTE2_CRIT] = val;
758
759 val = lm90_read_reg(client, MAX6659_REG_R_REMOTE_EMERG);
760 if (val < 0)
761 return val;
762 data->temp8[REMOTE2_EMERG] = val;
763
764 val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWH);
765 if (val < 0)
766 return val;
767 data->temp11[REMOTE2_LOW] = val << 8;
768
769 val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHH);
770 if (val < 0)
771 return val;
772 data->temp11[REMOTE2_HIGH] = val << 8;
773
7a1d220c 774 lm90_select_remote_channel(data, 0);
10bfef47
GR
775 }
776
777 return 0;
778}
779
f6d07751
GR
780static void lm90_report_alarms(struct device *dev, struct lm90_data *data)
781{
782 u16 cleared_alarms = data->reported_alarms & ~data->current_alarms;
783 u16 new_alarms = data->current_alarms & ~data->reported_alarms;
784 struct device *hwmon_dev = data->hwmon_dev;
785 int st, st2;
786
787 if (!cleared_alarms && !new_alarms)
788 return;
789
790 st = new_alarms & 0xff;
791 st2 = new_alarms >> 8;
792
793 if ((st & (LM90_STATUS_LLOW | LM90_STATUS_LHIGH | LM90_STATUS_LTHRM)) ||
794 (st2 & MAX6696_STATUS2_LOT2))
795 dev_dbg(dev, "temp%d out of range, please check!\n", 1);
796 if ((st & (LM90_STATUS_RLOW | LM90_STATUS_RHIGH | LM90_STATUS_RTHRM)) ||
797 (st2 & MAX6696_STATUS2_ROT2))
798 dev_dbg(dev, "temp%d out of range, please check!\n", 2);
799 if (st & LM90_STATUS_ROPEN)
800 dev_dbg(dev, "temp%d diode open, please check!\n", 2);
801 if (st2 & (MAX6696_STATUS2_R2LOW | MAX6696_STATUS2_R2HIGH |
802 MAX6696_STATUS2_R2THRM | MAX6696_STATUS2_R2OT2))
803 dev_dbg(dev, "temp%d out of range, please check!\n", 3);
804 if (st2 & MAX6696_STATUS2_R2OPEN)
805 dev_dbg(dev, "temp%d diode open, please check!\n", 3);
806
807 st |= cleared_alarms & 0xff;
808 st2 |= cleared_alarms >> 8;
809
810 if (st & LM90_STATUS_LLOW)
811 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 0);
812 if (st & LM90_STATUS_RLOW)
813 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 1);
814 if (st2 & MAX6696_STATUS2_R2LOW)
815 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 2);
816
817 if (st & LM90_STATUS_LHIGH)
818 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 0);
819 if (st & LM90_STATUS_RHIGH)
820 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 1);
821 if (st2 & MAX6696_STATUS2_R2HIGH)
822 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 2);
823
824 if (st & LM90_STATUS_LTHRM)
825 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 0);
826 if (st & LM90_STATUS_RTHRM)
827 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 1);
828 if (st2 & MAX6696_STATUS2_R2THRM)
829 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 2);
830
831 if (st2 & MAX6696_STATUS2_LOT2)
832 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 0);
833 if (st2 & MAX6696_STATUS2_ROT2)
834 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 1);
835 if (st2 & MAX6696_STATUS2_R2OT2)
836 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 2);
837
838 data->reported_alarms = data->current_alarms;
839}
840
841static int lm90_update_alarms_locked(struct lm90_data *data, bool force)
842{
843 if (force || !data->alarms_valid ||
844 time_after(jiffies, data->alarms_updated + msecs_to_jiffies(data->update_interval))) {
845 struct i2c_client *client = data->client;
846 bool check_enable;
847 u16 alarms;
848 int val;
849
850 data->alarms_valid = false;
851
852 val = lm90_read_reg(client, LM90_REG_R_STATUS);
853 if (val < 0)
854 return val;
855 alarms = val & ~LM90_STATUS_BUSY;
856
857 if (data->kind == max6696) {
858 val = lm90_read_reg(client, MAX6696_REG_R_STATUS2);
859 if (val < 0)
860 return val;
861 alarms |= val << 8;
862 }
863 /*
864 * If the update is forced (called from interrupt or alert
865 * handler) and alarm data is valid, the alarms may have been
866 * updated after the last update interval, and the status
867 * register may still be cleared. Only add additional alarms
868 * in this case. Alarms will be cleared later if appropriate.
869 */
870 if (force && data->alarms_valid)
871 data->current_alarms |= alarms;
872 else
873 data->current_alarms = alarms;
874 data->alarms |= alarms;
875
876 check_enable = (client->irq || !(data->config_orig & 0x80)) &&
877 (data->config & 0x80);
878
879 if (force || check_enable)
880 lm90_report_alarms(&client->dev, data);
881
882 /*
883 * Re-enable ALERT# output if it was originally enabled, relevant
884 * alarms are all clear, and alerts are currently disabled.
885 * Otherwise (re)schedule worker if needed.
886 */
887 if (check_enable) {
888 if (!(data->current_alarms & data->alert_alarms)) {
889 dev_dbg(&client->dev, "Re-enabling ALERT#\n");
890 lm90_update_confreg(data, data->config & ~0x80);
891 /*
892 * We may have been called from the update handler.
893 * If so, the worker, if scheduled, is no longer
894 * needed. Cancel it. Don't synchronize because
895 * it may already be running.
896 */
897 cancel_delayed_work(&data->alert_work);
898 } else {
899 schedule_delayed_work(&data->alert_work,
900 max_t(int, HZ, msecs_to_jiffies(data->update_interval)));
901 }
902 }
903 data->alarms_updated = jiffies;
904 data->alarms_valid = true;
905 }
906 return 0;
907}
908
909static int lm90_update_alarms(struct lm90_data *data, bool force)
910{
911 int err;
912
913 mutex_lock(&data->update_lock);
914 err = lm90_update_alarms_locked(data, force);
915 mutex_unlock(&data->update_lock);
916
917 return err;
918}
919
920static void lm90_alert_work(struct work_struct *__work)
921{
922 struct delayed_work *delayed_work = container_of(__work, struct delayed_work, work);
923 struct lm90_data *data = container_of(delayed_work, struct lm90_data, alert_work);
924
925 /* Nothing to do if alerts are enabled */
926 if (!(data->config & 0x80))
927 return;
928
929 lm90_update_alarms(data, true);
930}
931
eb1c8f43 932static int lm90_update_device(struct device *dev)
15b66ab6 933{
1de8b250
GR
934 struct lm90_data *data = dev_get_drvdata(dev);
935 struct i2c_client *client = data->client;
0c01b644 936 unsigned long next_update;
eb1c8f43 937 int val;
15b66ab6 938
10bfef47
GR
939 if (!data->valid) {
940 val = lm90_update_limits(dev);
941 if (val < 0)
eb1c8f43 942 return val;
10bfef47
GR
943 }
944
78c2c2fe
JD
945 next_update = data->last_updated +
946 msecs_to_jiffies(data->update_interval);
0c01b644 947 if (time_after(jiffies, next_update) || !data->valid) {
15b66ab6 948 dev_dbg(&client->dev, "Updating lm90 data.\n");
10bfef47 949
2f83ab77 950 data->valid = false;
10bfef47 951
37ad04d7
GR
952 val = lm90_read_reg(client, LM90_REG_R_LOCAL_LOW);
953 if (val < 0)
eb1c8f43 954 return val;
37ad04d7
GR
955 data->temp8[LOCAL_LOW] = val;
956
957 val = lm90_read_reg(client, LM90_REG_R_LOCAL_HIGH);
958 if (val < 0)
eb1c8f43 959 return val;
37ad04d7
GR
960 data->temp8[LOCAL_HIGH] = val;
961
a095f687 962 if (data->reg_local_ext) {
37ad04d7
GR
963 val = lm90_read16(client, LM90_REG_R_LOCAL_TEMP,
964 data->reg_local_ext);
965 if (val < 0)
eb1c8f43 966 return val;
37ad04d7 967 data->temp11[LOCAL_TEMP] = val;
15b66ab6 968 } else {
37ad04d7
GR
969 val = lm90_read_reg(client, LM90_REG_R_LOCAL_TEMP);
970 if (val < 0)
eb1c8f43 971 return val;
37ad04d7 972 data->temp11[LOCAL_TEMP] = val << 8;
15b66ab6 973 }
37ad04d7
GR
974 val = lm90_read16(client, LM90_REG_R_REMOTE_TEMPH,
975 LM90_REG_R_REMOTE_TEMPL);
976 if (val < 0)
eb1c8f43 977 return val;
37ad04d7
GR
978 data->temp11[REMOTE_TEMP] = val;
979
15b66ab6 980 if (data->kind == max6696) {
7a1d220c 981 val = lm90_select_remote_channel(data, 1);
37ad04d7 982 if (val < 0)
eb1c8f43 983 return val;
37ad04d7 984
37ad04d7
GR
985 val = lm90_read16(client, LM90_REG_R_REMOTE_TEMPH,
986 LM90_REG_R_REMOTE_TEMPL);
eb1c8f43 987 if (val < 0) {
7a1d220c 988 lm90_select_remote_channel(data, 0);
eb1c8f43
GR
989 return val;
990 }
37ad04d7
GR
991 data->temp11[REMOTE2_TEMP] = val;
992
7a1d220c 993 lm90_select_remote_channel(data, 0);
15b66ab6
GR
994 }
995
f6d07751
GR
996 val = lm90_update_alarms_locked(data, false);
997 if (val < 0)
998 return val;
15b66ab6
GR
999
1000 data->last_updated = jiffies;
2f83ab77 1001 data->valid = true;
15b66ab6
GR
1002 }
1003
eb1c8f43 1004 return 0;
15b66ab6
GR
1005}
1006
cea50fe2
NC
1007/*
1008 * Conversions
1009 * For local temperatures and limits, critical limits and the hysteresis
1010 * value, the LM90 uses signed 8-bit values with LSB = 1 degree Celsius.
1011 * For remote temperatures and limits, it uses signed 11-bit values with
271dabf5
BH
1012 * LSB = 0.125 degree Celsius, left-justified in 16-bit registers. Some
1013 * Maxim chips use unsigned values.
cea50fe2
NC
1014 */
1015
9d4d3834 1016static inline int temp_from_s8(s8 val)
cea50fe2
NC
1017{
1018 return val * 1000;
1019}
1020
271dabf5
BH
1021static inline int temp_from_u8(u8 val)
1022{
1023 return val * 1000;
1024}
1025
9d4d3834 1026static inline int temp_from_s16(s16 val)
cea50fe2
NC
1027{
1028 return val / 32 * 125;
1029}
1030
271dabf5
BH
1031static inline int temp_from_u16(u16 val)
1032{
1033 return val / 32 * 125;
1034}
1035
9d4d3834 1036static s8 temp_to_s8(long val)
cea50fe2
NC
1037{
1038 if (val <= -128000)
1039 return -128;
1040 if (val >= 127000)
1041 return 127;
1042 if (val < 0)
1043 return (val - 500) / 1000;
1044 return (val + 500) / 1000;
1045}
1046
271dabf5
BH
1047static u8 temp_to_u8(long val)
1048{
1049 if (val <= 0)
1050 return 0;
1051 if (val >= 255000)
1052 return 255;
1053 return (val + 500) / 1000;
1054}
1055
9d4d3834 1056static s16 temp_to_s16(long val)
cea50fe2
NC
1057{
1058 if (val <= -128000)
1059 return 0x8000;
1060 if (val >= 127875)
1061 return 0x7FE0;
1062 if (val < 0)
1063 return (val - 62) / 125 * 32;
1064 return (val + 62) / 125 * 32;
1065}
1066
1067static u8 hyst_to_reg(long val)
1068{
1069 if (val <= 0)
1070 return 0;
1071 if (val >= 30500)
1072 return 31;
1073 return (val + 500) / 1000;
1074}
1075
1076/*
23b2d477
NC
1077 * ADT7461 in compatibility mode is almost identical to LM90 except that
1078 * attempts to write values that are outside the range 0 < temp < 127 are
1079 * treated as the boundary value.
1080 *
1081 * ADT7461 in "extended mode" operation uses unsigned integers offset by
1082 * 64 (e.g., 0 -> -64 degC). The range is restricted to -64..191 degC.
cea50fe2 1083 */
9d4d3834 1084static inline int temp_from_u8_adt7461(struct lm90_data *data, u8 val)
cea50fe2 1085{
23b2d477
NC
1086 if (data->flags & LM90_FLAG_ADT7461_EXT)
1087 return (val - 64) * 1000;
589f707c 1088 return temp_from_s8(val);
cea50fe2
NC
1089}
1090
9d4d3834 1091static inline int temp_from_u16_adt7461(struct lm90_data *data, u16 val)
cea50fe2 1092{
23b2d477
NC
1093 if (data->flags & LM90_FLAG_ADT7461_EXT)
1094 return (val - 0x4000) / 64 * 250;
589f707c 1095 return temp_from_s16(val);
23b2d477
NC
1096}
1097
9d4d3834 1098static u8 temp_to_u8_adt7461(struct lm90_data *data, long val)
23b2d477
NC
1099{
1100 if (data->flags & LM90_FLAG_ADT7461_EXT) {
1101 if (val <= -64000)
1102 return 0;
1103 if (val >= 191000)
1104 return 0xFF;
1105 return (val + 500 + 64000) / 1000;
23b2d477 1106 }
589f707c
GR
1107 if (val <= 0)
1108 return 0;
1109 if (val >= 127000)
1110 return 127;
1111 return (val + 500) / 1000;
23b2d477
NC
1112}
1113
9d4d3834 1114static u16 temp_to_u16_adt7461(struct lm90_data *data, long val)
23b2d477
NC
1115{
1116 if (data->flags & LM90_FLAG_ADT7461_EXT) {
1117 if (val <= -64000)
1118 return 0;
1119 if (val >= 191750)
1120 return 0xFFC0;
1121 return (val + 64000 + 125) / 250 * 64;
23b2d477 1122 }
589f707c
GR
1123 if (val <= 0)
1124 return 0;
1125 if (val >= 127750)
1126 return 0x7FC0;
1127 return (val + 125) / 250 * 64;
cea50fe2
NC
1128}
1129
eb1c8f43 1130/* pec used for ADM1032 only */
e57959a6 1131static ssize_t pec_show(struct device *dev, struct device_attribute *dummy,
eb1c8f43 1132 char *buf)
30d7394b 1133{
eb1c8f43 1134 struct i2c_client *client = to_i2c_client(dev);
97ae60bb 1135
eb1c8f43 1136 return sprintf(buf, "%d\n", !!(client->flags & I2C_CLIENT_PEC));
30d7394b
JD
1137}
1138
e57959a6
JL
1139static ssize_t pec_store(struct device *dev, struct device_attribute *dummy,
1140 const char *buf, size_t count)
30d7394b 1141{
eb1c8f43 1142 struct i2c_client *client = to_i2c_client(dev);
11e57812
GR
1143 long val;
1144 int err;
1145
179c4fdb 1146 err = kstrtol(buf, 10, &val);
11e57812
GR
1147 if (err < 0)
1148 return err;
30d7394b 1149
eb1c8f43
GR
1150 switch (val) {
1151 case 0:
1152 client->flags &= ~I2C_CLIENT_PEC;
1153 break;
1154 case 1:
1155 client->flags |= I2C_CLIENT_PEC;
1156 break;
1157 default:
1158 return -EINVAL;
1159 }
06e1c0a2 1160
30d7394b 1161 return count;
1da177e4 1162}
30d7394b 1163
e57959a6 1164static DEVICE_ATTR_RW(pec);
eb1c8f43
GR
1165
1166static int lm90_get_temp11(struct lm90_data *data, int index)
30d7394b 1167{
eb1c8f43 1168 s16 temp11 = data->temp11[index];
23b2d477
NC
1169 int temp;
1170
f347e249 1171 if (data->flags & LM90_HAVE_EXTENDED_TEMP)
eb1c8f43 1172 temp = temp_from_u16_adt7461(data, temp11);
271dabf5 1173 else if (data->kind == max6646)
eb1c8f43 1174 temp = temp_from_u16(temp11);
23b2d477 1175 else
eb1c8f43 1176 temp = temp_from_s16(temp11);
23b2d477 1177
97ae60bb 1178 /* +16 degrees offset for temp2 for the LM99 */
eb1c8f43 1179 if (data->kind == lm99 && index <= 2)
97ae60bb
JD
1180 temp += 16000;
1181
eb1c8f43 1182 return temp;
1da177e4 1183}
30d7394b 1184
eb1c8f43 1185static int lm90_set_temp11(struct lm90_data *data, int index, long val)
30d7394b 1186{
eb1c8f43 1187 static struct reg {
96512861
GR
1188 u8 high;
1189 u8 low;
eb1c8f43
GR
1190 } reg[] = {
1191 [REMOTE_LOW] = { LM90_REG_W_REMOTE_LOWH, LM90_REG_W_REMOTE_LOWL },
1192 [REMOTE_HIGH] = { LM90_REG_W_REMOTE_HIGHH, LM90_REG_W_REMOTE_HIGHL },
1193 [REMOTE_OFFSET] = { LM90_REG_W_REMOTE_OFFSH, LM90_REG_W_REMOTE_OFFSL },
1194 [REMOTE2_LOW] = { LM90_REG_W_REMOTE_LOWH, LM90_REG_W_REMOTE_LOWL },
1195 [REMOTE2_HIGH] = { LM90_REG_W_REMOTE_HIGHH, LM90_REG_W_REMOTE_HIGHL }
30d7394b 1196 };
1de8b250 1197 struct i2c_client *client = data->client;
eb1c8f43 1198 struct reg *regp = &reg[index];
11e57812
GR
1199 int err;
1200
97ae60bb 1201 /* +16 degrees offset for temp2 for the LM99 */
b50aa496
DO
1202 if (data->kind == lm99 && index <= 2) {
1203 /* prevent integer underflow */
1204 val = max(val, -128000l);
97ae60bb 1205 val -= 16000;
b50aa496 1206 }
97ae60bb 1207
f347e249 1208 if (data->flags & LM90_HAVE_EXTENDED_TEMP)
96512861 1209 data->temp11[index] = temp_to_u16_adt7461(data, val);
271dabf5 1210 else if (data->kind == max6646)
96512861 1211 data->temp11[index] = temp_to_u8(val) << 8;
88073bb1 1212 else if (data->flags & LM90_HAVE_REM_LIMIT_EXT)
96512861 1213 data->temp11[index] = temp_to_s16(val);
88073bb1 1214 else
96512861 1215 data->temp11[index] = temp_to_s8(val) << 8;
5f502a83 1216
7a1d220c 1217 lm90_select_remote_channel(data, index >= 3);
eb1c8f43 1218 err = i2c_smbus_write_byte_data(client, regp->high,
96512861 1219 data->temp11[index] >> 8);
eb1c8f43
GR
1220 if (err < 0)
1221 return err;
88073bb1 1222 if (data->flags & LM90_HAVE_REM_LIMIT_EXT)
eb1c8f43
GR
1223 err = i2c_smbus_write_byte_data(client, regp->low,
1224 data->temp11[index] & 0xff);
06e1c0a2 1225
7a1d220c 1226 lm90_select_remote_channel(data, 0);
eb1c8f43 1227 return err;
1da177e4 1228}
30d7394b 1229
eb1c8f43 1230static int lm90_get_temp8(struct lm90_data *data, int index)
30d7394b 1231{
eb1c8f43 1232 s8 temp8 = data->temp8[index];
23b2d477
NC
1233 int temp;
1234
f347e249 1235 if (data->flags & LM90_HAVE_EXTENDED_TEMP)
eb1c8f43 1236 temp = temp_from_u8_adt7461(data, temp8);
ec38fa2b 1237 else if (data->kind == max6646)
eb1c8f43 1238 temp = temp_from_u8(temp8);
23b2d477 1239 else
eb1c8f43 1240 temp = temp_from_s8(temp8);
23b2d477 1241
97ae60bb 1242 /* +16 degrees offset for temp2 for the LM99 */
eb1c8f43 1243 if (data->kind == lm99 && index == 3)
97ae60bb
JD
1244 temp += 16000;
1245
eb1c8f43 1246 return temp;
1da177e4 1247}
1da177e4 1248
eb1c8f43 1249static int lm90_set_temp8(struct lm90_data *data, int index, long val)
1da177e4 1250{
eb1c8f43
GR
1251 static const u8 reg[TEMP8_REG_NUM] = {
1252 LM90_REG_W_LOCAL_LOW,
1253 LM90_REG_W_LOCAL_HIGH,
1254 LM90_REG_W_LOCAL_CRIT,
1255 LM90_REG_W_REMOTE_CRIT,
1256 MAX6659_REG_W_LOCAL_EMERG,
1257 MAX6659_REG_W_REMOTE_EMERG,
1258 LM90_REG_W_REMOTE_CRIT,
1259 MAX6659_REG_W_REMOTE_EMERG,
1260 };
1de8b250 1261 struct i2c_client *client = data->client;
11e57812 1262 int err;
1da177e4 1263
eb1c8f43 1264 /* +16 degrees offset for temp2 for the LM99 */
b50aa496
DO
1265 if (data->kind == lm99 && index == 3) {
1266 /* prevent integer underflow */
1267 val = max(val, -128000l);
eb1c8f43 1268 val -= 16000;
b50aa496 1269 }
11e57812 1270
f347e249 1271 if (data->flags & LM90_HAVE_EXTENDED_TEMP)
eb1c8f43 1272 data->temp8[index] = temp_to_u8_adt7461(data, val);
ec38fa2b 1273 else if (data->kind == max6646)
eb1c8f43 1274 data->temp8[index] = temp_to_u8(val);
ec38fa2b 1275 else
eb1c8f43 1276 data->temp8[index] = temp_to_s8(val);
ec38fa2b 1277
7a1d220c 1278 lm90_select_remote_channel(data, index >= 6);
eb1c8f43 1279 err = i2c_smbus_write_byte_data(client, reg[index], data->temp8[index]);
7a1d220c 1280 lm90_select_remote_channel(data, 0);
37ad04d7 1281
eb1c8f43 1282 return err;
1da177e4
LT
1283}
1284
eb1c8f43 1285static int lm90_get_temphyst(struct lm90_data *data, int index)
2d45771e 1286{
eb1c8f43 1287 int temp;
37ad04d7 1288
f347e249 1289 if (data->flags & LM90_HAVE_EXTENDED_TEMP)
eb1c8f43
GR
1290 temp = temp_from_u8_adt7461(data, data->temp8[index]);
1291 else if (data->kind == max6646)
1292 temp = temp_from_u8(data->temp8[index]);
1293 else
1294 temp = temp_from_s8(data->temp8[index]);
2d45771e 1295
eb1c8f43
GR
1296 /* +16 degrees offset for temp2 for the LM99 */
1297 if (data->kind == lm99 && index == 3)
1298 temp += 16000;
0c01b644 1299
eb1c8f43 1300 return temp - temp_from_s8(data->temp_hyst);
0c01b644
GR
1301}
1302
eb1c8f43 1303static int lm90_set_temphyst(struct lm90_data *data, long val)
0c01b644 1304{
1de8b250 1305 struct i2c_client *client = data->client;
eb1c8f43 1306 int temp;
0c01b644
GR
1307 int err;
1308
f347e249 1309 if (data->flags & LM90_HAVE_EXTENDED_TEMP)
eb1c8f43
GR
1310 temp = temp_from_u8_adt7461(data, data->temp8[LOCAL_CRIT]);
1311 else if (data->kind == max6646)
1312 temp = temp_from_u8(data->temp8[LOCAL_CRIT]);
1313 else
1314 temp = temp_from_s8(data->temp8[LOCAL_CRIT]);
0c01b644 1315
55840b9e
GR
1316 /* prevent integer overflow/underflow */
1317 val = clamp_val(val, -128000l, 255000l);
b50aa496 1318
eb1c8f43
GR
1319 data->temp_hyst = hyst_to_reg(temp - val);
1320 err = i2c_smbus_write_byte_data(client, LM90_REG_W_TCRIT_HYST,
1321 data->temp_hyst);
1322 return err;
0c01b644
GR
1323}
1324
eb1c8f43
GR
1325static const u8 lm90_temp_index[3] = {
1326 LOCAL_TEMP, REMOTE_TEMP, REMOTE2_TEMP
0e39e01c
JD
1327};
1328
eb1c8f43
GR
1329static const u8 lm90_temp_min_index[3] = {
1330 LOCAL_LOW, REMOTE_LOW, REMOTE2_LOW
0e39e01c
JD
1331};
1332
eb1c8f43
GR
1333static const u8 lm90_temp_max_index[3] = {
1334 LOCAL_HIGH, REMOTE_HIGH, REMOTE2_HIGH
742192f5
GR
1335};
1336
eb1c8f43
GR
1337static const u8 lm90_temp_crit_index[3] = {
1338 LOCAL_CRIT, REMOTE_CRIT, REMOTE2_CRIT
742192f5
GR
1339};
1340
eb1c8f43
GR
1341static const u8 lm90_temp_emerg_index[3] = {
1342 LOCAL_EMERG, REMOTE_EMERG, REMOTE2_EMERG
6948708d
GR
1343};
1344
eb1c8f43 1345static const u8 lm90_min_alarm_bits[3] = { 5, 3, 11 };
e9572fdd 1346static const u8 lm90_max_alarm_bits[3] = { 6, 4, 12 };
eb1c8f43 1347static const u8 lm90_crit_alarm_bits[3] = { 0, 1, 9 };
da7dc056 1348static const u8 lm90_crit_alarm_bits_swapped[3] = { 1, 0, 9 };
eb1c8f43
GR
1349static const u8 lm90_emergency_alarm_bits[3] = { 15, 13, 14 };
1350static const u8 lm90_fault_bits[3] = { 0, 2, 10 };
6948708d 1351
eb1c8f43
GR
1352static int lm90_temp_read(struct device *dev, u32 attr, int channel, long *val)
1353{
1354 struct lm90_data *data = dev_get_drvdata(dev);
f6d07751 1355 int err, bit;
06e1c0a2 1356
eb1c8f43
GR
1357 mutex_lock(&data->update_lock);
1358 err = lm90_update_device(dev);
1359 mutex_unlock(&data->update_lock);
1360 if (err)
1361 return err;
06e1c0a2 1362
eb1c8f43
GR
1363 switch (attr) {
1364 case hwmon_temp_input:
1365 *val = lm90_get_temp11(data, lm90_temp_index[channel]);
1366 break;
1367 case hwmon_temp_min_alarm:
eb1c8f43 1368 case hwmon_temp_max_alarm:
eb1c8f43 1369 case hwmon_temp_crit_alarm:
eb1c8f43 1370 case hwmon_temp_emergency_alarm:
eb1c8f43 1371 case hwmon_temp_fault:
f6d07751
GR
1372 switch (attr) {
1373 case hwmon_temp_min_alarm:
1374 bit = BIT(lm90_min_alarm_bits[channel]);
1375 break;
1376 case hwmon_temp_max_alarm:
1377 bit = BIT(lm90_max_alarm_bits[channel]);
1378 break;
1379 case hwmon_temp_crit_alarm:
1380 if (data->flags & LM90_HAVE_CRIT_ALRM_SWP)
1381 bit = BIT(lm90_crit_alarm_bits_swapped[channel]);
1382 else
1383 bit = BIT(lm90_crit_alarm_bits[channel]);
1384 break;
1385 case hwmon_temp_emergency_alarm:
1386 bit = BIT(lm90_emergency_alarm_bits[channel]);
1387 break;
1388 case hwmon_temp_fault:
1389 bit = BIT(lm90_fault_bits[channel]);
1390 break;
1391 }
1392 *val = !!(data->alarms & bit);
1393 data->alarms &= ~bit;
1394 data->alarms |= data->current_alarms;
eb1c8f43
GR
1395 break;
1396 case hwmon_temp_min:
1397 if (channel == 0)
1398 *val = lm90_get_temp8(data,
1399 lm90_temp_min_index[channel]);
1400 else
1401 *val = lm90_get_temp11(data,
1402 lm90_temp_min_index[channel]);
1403 break;
1404 case hwmon_temp_max:
1405 if (channel == 0)
1406 *val = lm90_get_temp8(data,
1407 lm90_temp_max_index[channel]);
1408 else
1409 *val = lm90_get_temp11(data,
1410 lm90_temp_max_index[channel]);
1411 break;
1412 case hwmon_temp_crit:
1413 *val = lm90_get_temp8(data, lm90_temp_crit_index[channel]);
1414 break;
1415 case hwmon_temp_crit_hyst:
1416 *val = lm90_get_temphyst(data, lm90_temp_crit_index[channel]);
1417 break;
1418 case hwmon_temp_emergency:
1419 *val = lm90_get_temp8(data, lm90_temp_emerg_index[channel]);
1420 break;
1421 case hwmon_temp_emergency_hyst:
1422 *val = lm90_get_temphyst(data, lm90_temp_emerg_index[channel]);
1423 break;
1424 case hwmon_temp_offset:
1425 *val = lm90_get_temp11(data, REMOTE_OFFSET);
1426 break;
1427 default:
1428 return -EOPNOTSUPP;
1429 }
1430 return 0;
1431}
06e1c0a2 1432
eb1c8f43
GR
1433static int lm90_temp_write(struct device *dev, u32 attr, int channel, long val)
1434{
1435 struct lm90_data *data = dev_get_drvdata(dev);
1436 int err;
06e1c0a2 1437
eb1c8f43 1438 mutex_lock(&data->update_lock);
06e1c0a2 1439
eb1c8f43
GR
1440 err = lm90_update_device(dev);
1441 if (err)
1442 goto error;
1443
1444 switch (attr) {
1445 case hwmon_temp_min:
1446 if (channel == 0)
1447 err = lm90_set_temp8(data,
1448 lm90_temp_min_index[channel],
1449 val);
1450 else
1451 err = lm90_set_temp11(data,
1452 lm90_temp_min_index[channel],
1453 val);
1454 break;
1455 case hwmon_temp_max:
1456 if (channel == 0)
1457 err = lm90_set_temp8(data,
1458 lm90_temp_max_index[channel],
1459 val);
1460 else
1461 err = lm90_set_temp11(data,
1462 lm90_temp_max_index[channel],
1463 val);
1464 break;
1465 case hwmon_temp_crit:
1466 err = lm90_set_temp8(data, lm90_temp_crit_index[channel], val);
1467 break;
1468 case hwmon_temp_crit_hyst:
1469 err = lm90_set_temphyst(data, val);
1470 break;
1471 case hwmon_temp_emergency:
1472 err = lm90_set_temp8(data, lm90_temp_emerg_index[channel], val);
1473 break;
1474 case hwmon_temp_offset:
1475 err = lm90_set_temp11(data, REMOTE_OFFSET, val);
1476 break;
1477 default:
1478 err = -EOPNOTSUPP;
1479 break;
1480 }
1481error:
1482 mutex_unlock(&data->update_lock);
1483
1484 return err;
1485}
1486
1487static umode_t lm90_temp_is_visible(const void *data, u32 attr, int channel)
c3df5806 1488{
eb1c8f43
GR
1489 switch (attr) {
1490 case hwmon_temp_input:
1491 case hwmon_temp_min_alarm:
1492 case hwmon_temp_max_alarm:
1493 case hwmon_temp_crit_alarm:
1494 case hwmon_temp_emergency_alarm:
1495 case hwmon_temp_emergency_hyst:
1496 case hwmon_temp_fault:
3334851d 1497 return 0444;
eb1c8f43
GR
1498 case hwmon_temp_min:
1499 case hwmon_temp_max:
1500 case hwmon_temp_crit:
1501 case hwmon_temp_emergency:
1502 case hwmon_temp_offset:
3334851d 1503 return 0644;
eb1c8f43
GR
1504 case hwmon_temp_crit_hyst:
1505 if (channel == 0)
3334851d
GR
1506 return 0644;
1507 return 0444;
eb1c8f43
GR
1508 default:
1509 return 0;
1510 }
c3df5806
JD
1511}
1512
eb1c8f43 1513static int lm90_chip_read(struct device *dev, u32 attr, int channel, long *val)
c3df5806 1514{
eb1c8f43 1515 struct lm90_data *data = dev_get_drvdata(dev);
11e57812
GR
1516 int err;
1517
eb1c8f43
GR
1518 mutex_lock(&data->update_lock);
1519 err = lm90_update_device(dev);
1520 mutex_unlock(&data->update_lock);
1521 if (err)
11e57812 1522 return err;
c3df5806 1523
eb1c8f43
GR
1524 switch (attr) {
1525 case hwmon_chip_update_interval:
1526 *val = data->update_interval;
c3df5806 1527 break;
eb1c8f43
GR
1528 case hwmon_chip_alarms:
1529 *val = data->alarms;
c3df5806
JD
1530 break;
1531 default:
eb1c8f43 1532 return -EOPNOTSUPP;
c3df5806
JD
1533 }
1534
eb1c8f43 1535 return 0;
c3df5806
JD
1536}
1537
eb1c8f43
GR
1538static int lm90_chip_write(struct device *dev, u32 attr, int channel, long val)
1539{
1540 struct lm90_data *data = dev_get_drvdata(dev);
1541 struct i2c_client *client = data->client;
1542 int err;
c3df5806 1543
eb1c8f43
GR
1544 mutex_lock(&data->update_lock);
1545
1546 err = lm90_update_device(dev);
1547 if (err)
1548 goto error;
1549
1550 switch (attr) {
1551 case hwmon_chip_update_interval:
1552 err = lm90_set_convrate(client, data,
1553 clamp_val(val, 0, 100000));
1554 break;
1555 default:
1556 err = -EOPNOTSUPP;
1557 break;
1558 }
1559error:
1560 mutex_unlock(&data->update_lock);
1561
1562 return err;
1563}
1564
1565static umode_t lm90_chip_is_visible(const void *data, u32 attr, int channel)
1566{
1567 switch (attr) {
1568 case hwmon_chip_update_interval:
3334851d 1569 return 0644;
eb1c8f43 1570 case hwmon_chip_alarms:
3334851d 1571 return 0444;
eb1c8f43
GR
1572 default:
1573 return 0;
1574 }
1575}
1576
1577static int lm90_read(struct device *dev, enum hwmon_sensor_types type,
1578 u32 attr, int channel, long *val)
1579{
1580 switch (type) {
1581 case hwmon_chip:
1582 return lm90_chip_read(dev, attr, channel, val);
1583 case hwmon_temp:
1584 return lm90_temp_read(dev, attr, channel, val);
1585 default:
1586 return -EOPNOTSUPP;
1587 }
1588}
1589
1590static int lm90_write(struct device *dev, enum hwmon_sensor_types type,
1591 u32 attr, int channel, long val)
1592{
1593 switch (type) {
1594 case hwmon_chip:
1595 return lm90_chip_write(dev, attr, channel, val);
1596 case hwmon_temp:
1597 return lm90_temp_write(dev, attr, channel, val);
1598 default:
1599 return -EOPNOTSUPP;
1600 }
1601}
1602
1603static umode_t lm90_is_visible(const void *data, enum hwmon_sensor_types type,
1604 u32 attr, int channel)
1605{
1606 switch (type) {
1607 case hwmon_chip:
1608 return lm90_chip_is_visible(data, attr, channel);
1609 case hwmon_temp:
1610 return lm90_temp_is_visible(data, attr, channel);
1611 default:
1612 return 0;
1613 }
1614}
1da177e4 1615
15b66ab6 1616/* Return 0 if detection is successful, -ENODEV otherwise */
b2589ab0 1617static int lm90_detect(struct i2c_client *client,
15b66ab6 1618 struct i2c_board_info *info)
8256fe0f 1619{
b2589ab0
JD
1620 struct i2c_adapter *adapter = client->adapter;
1621 int address = client->addr;
15b66ab6 1622 const char *name = NULL;
b2589ab0 1623 int man_id, chip_id, config1, config2, convrate;
8256fe0f 1624
15b66ab6
GR
1625 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1626 return -ENODEV;
1da177e4 1627
8f2fa77c 1628 /* detection and identification */
b2589ab0
JD
1629 man_id = i2c_smbus_read_byte_data(client, LM90_REG_R_MAN_ID);
1630 chip_id = i2c_smbus_read_byte_data(client, LM90_REG_R_CHIP_ID);
1631 config1 = i2c_smbus_read_byte_data(client, LM90_REG_R_CONFIG1);
1632 convrate = i2c_smbus_read_byte_data(client, LM90_REG_R_CONVRATE);
1633 if (man_id < 0 || chip_id < 0 || config1 < 0 || convrate < 0)
8f2fa77c
JD
1634 return -ENODEV;
1635
fce15c45 1636 if (man_id == 0x01 || man_id == 0x5C || man_id == 0xA1) {
b2589ab0
JD
1637 config2 = i2c_smbus_read_byte_data(client, LM90_REG_R_CONFIG2);
1638 if (config2 < 0)
9b0e8526 1639 return -ENODEV;
fce15c45 1640 }
8f2fa77c 1641
f90be42f
JD
1642 if ((address == 0x4C || address == 0x4D)
1643 && man_id == 0x01) { /* National Semiconductor */
b2589ab0
JD
1644 if ((config1 & 0x2A) == 0x00
1645 && (config2 & 0xF8) == 0x00
1646 && convrate <= 0x09) {
8f2fa77c
JD
1647 if (address == 0x4C
1648 && (chip_id & 0xF0) == 0x20) { /* LM90 */
1649 name = "lm90";
32c82a93 1650 } else
8f2fa77c
JD
1651 if ((chip_id & 0xF0) == 0x30) { /* LM89/LM99 */
1652 name = "lm99";
1653 dev_info(&adapter->dev,
1654 "Assuming LM99 chip at 0x%02x\n",
1655 address);
1656 dev_info(&adapter->dev,
1657 "If it is an LM89, instantiate it "
1658 "with the new_device sysfs "
1659 "interface\n");
271dabf5 1660 } else
8f2fa77c
JD
1661 if (address == 0x4C
1662 && (chip_id & 0xF0) == 0x10) { /* LM86 */
1663 name = "lm86";
1da177e4
LT
1664 }
1665 }
8f2fa77c
JD
1666 } else
1667 if ((address == 0x4C || address == 0x4D)
1668 && man_id == 0x41) { /* Analog Devices */
1669 if ((chip_id & 0xF0) == 0x40 /* ADM1032 */
b2589ab0
JD
1670 && (config1 & 0x3F) == 0x00
1671 && convrate <= 0x0A) {
8f2fa77c 1672 name = "adm1032";
f36ffeab
GR
1673 /*
1674 * The ADM1032 supports PEC, but only if combined
1675 * transactions are not used.
1676 */
8f2fa77c
JD
1677 if (i2c_check_functionality(adapter,
1678 I2C_FUNC_SMBUS_BYTE))
1679 info->flags |= I2C_CLIENT_PEC;
1680 } else
1681 if (chip_id == 0x51 /* ADT7461 */
b2589ab0
JD
1682 && (config1 & 0x1B) == 0x00
1683 && convrate <= 0x0A) {
8f2fa77c 1684 name = "adt7461";
5a4e5e6a
GR
1685 } else
1686 if (chip_id == 0x57 /* ADT7461A, NCT1008 */
b2589ab0
JD
1687 && (config1 & 0x1B) == 0x00
1688 && convrate <= 0x0A) {
5a4e5e6a 1689 name = "adt7461a";
8f2fa77c
JD
1690 }
1691 } else
1692 if (man_id == 0x4D) { /* Maxim */
b2589ab0 1693 int emerg, emerg2, status2;
06e1c0a2
GR
1694
1695 /*
1696 * We read MAX6659_REG_R_REMOTE_EMERG twice, and re-read
1697 * LM90_REG_R_MAN_ID in between. If MAX6659_REG_R_REMOTE_EMERG
1698 * exists, both readings will reflect the same value. Otherwise,
1699 * the readings will be different.
1700 */
b2589ab0
JD
1701 emerg = i2c_smbus_read_byte_data(client,
1702 MAX6659_REG_R_REMOTE_EMERG);
1703 man_id = i2c_smbus_read_byte_data(client,
8dc089d6 1704 LM90_REG_R_MAN_ID);
b2589ab0 1705 emerg2 = i2c_smbus_read_byte_data(client,
8dc089d6 1706 MAX6659_REG_R_REMOTE_EMERG);
b2589ab0
JD
1707 status2 = i2c_smbus_read_byte_data(client,
1708 MAX6696_REG_R_STATUS2);
1709 if (emerg < 0 || man_id < 0 || emerg2 < 0 || status2 < 0)
06e1c0a2
GR
1710 return -ENODEV;
1711
8f2fa77c
JD
1712 /*
1713 * The MAX6657, MAX6658 and MAX6659 do NOT have a chip_id
1714 * register. Reading from that address will return the last
1715 * read value, which in our case is those of the man_id
1716 * register. Likewise, the config1 register seems to lack a
1717 * low nibble, so the value will be those of the previous
1718 * read, so in our case those of the man_id register.
13c84951
GR
1719 * MAX6659 has a third set of upper temperature limit registers.
1720 * Those registers also return values on MAX6657 and MAX6658,
1721 * thus the only way to detect MAX6659 is by its address.
1722 * For this reason it will be mis-detected as MAX6657 if its
1723 * address is 0x4C.
8f2fa77c
JD
1724 */
1725 if (chip_id == man_id
13c84951 1726 && (address == 0x4C || address == 0x4D || address == 0x4E)
b2589ab0
JD
1727 && (config1 & 0x1F) == (man_id & 0x0F)
1728 && convrate <= 0x09) {
13c84951
GR
1729 if (address == 0x4C)
1730 name = "max6657";
1731 else
1732 name = "max6659";
8f2fa77c 1733 } else
06e1c0a2
GR
1734 /*
1735 * Even though MAX6695 and MAX6696 do not have a chip ID
1736 * register, reading it returns 0x01. Bit 4 of the config1
1737 * register is unused and should return zero when read. Bit 0 of
1738 * the status2 register is unused and should return zero when
1739 * read.
1740 *
1741 * MAX6695 and MAX6696 have an additional set of temperature
1742 * limit registers. We can detect those chips by checking if
1743 * one of those registers exists.
1744 */
1745 if (chip_id == 0x01
b2589ab0
JD
1746 && (config1 & 0x10) == 0x00
1747 && (status2 & 0x01) == 0x00
1748 && emerg == emerg2
1749 && convrate <= 0x07) {
06e1c0a2
GR
1750 name = "max6696";
1751 } else
8f2fa77c
JD
1752 /*
1753 * The chip_id register of the MAX6680 and MAX6681 holds the
1754 * revision of the chip. The lowest bit of the config1 register
1755 * is unused and should return zero when read, so should the
1756 * second to last bit of config1 (software reset).
1757 */
1758 if (chip_id == 0x01
b2589ab0
JD
1759 && (config1 & 0x03) == 0x00
1760 && convrate <= 0x07) {
8f2fa77c
JD
1761 name = "max6680";
1762 } else
1763 /*
1764 * The chip_id register of the MAX6646/6647/6649 holds the
1765 * revision of the chip. The lowest 6 bits of the config1
1766 * register are unused and should return zero when read.
1767 */
1768 if (chip_id == 0x59
b2589ab0
JD
1769 && (config1 & 0x3f) == 0x00
1770 && convrate <= 0x07) {
8f2fa77c 1771 name = "max6646";
229d495d
JL
1772 } else
1773 /*
1774 * The chip_id of the MAX6654 holds the revision of the chip.
1775 * The lowest 3 bits of the config1 register are unused and
1776 * should return zero when read.
1777 */
1778 if (chip_id == 0x08
1779 && (config1 & 0x07) == 0x00
1780 && convrate <= 0x07) {
1781 name = "max6654";
1da177e4 1782 }
6771ea1f
JD
1783 } else
1784 if (address == 0x4C
1785 && man_id == 0x5C) { /* Winbond/Nuvoton */
b2589ab0
JD
1786 if ((config1 & 0x2A) == 0x00
1787 && (config2 & 0xF8) == 0x00) {
c4f99a2b 1788 if (chip_id == 0x01 /* W83L771W/G */
b2589ab0 1789 && convrate <= 0x09) {
c4f99a2b
JD
1790 name = "w83l771";
1791 } else
1792 if ((chip_id & 0xFE) == 0x10 /* W83L771AWG/ASG */
b2589ab0 1793 && convrate <= 0x08) {
c4f99a2b
JD
1794 name = "w83l771";
1795 }
6771ea1f 1796 }
2ef01793 1797 } else
6d101c58
JD
1798 if (address >= 0x48 && address <= 0x4F
1799 && man_id == 0xA1) { /* NXP Semiconductor/Philips */
6d101c58 1800 if (chip_id == 0x00
b2589ab0
JD
1801 && (config1 & 0x2A) == 0x00
1802 && (config2 & 0xFE) == 0x00
1803 && convrate <= 0x09) {
2ef01793
SD
1804 name = "sa56004";
1805 }
ae544f64
GR
1806 } else
1807 if ((address == 0x4C || address == 0x4D)
1808 && man_id == 0x47) { /* GMT */
1809 if (chip_id == 0x01 /* G781 */
1810 && (config1 & 0x3F) == 0x00
1811 && convrate <= 0x08)
1812 name = "g781";
1daaceb2 1813 } else
f8344f76
GR
1814 if (man_id == 0x55 && chip_id == 0x00 &&
1815 (config1 & 0x1B) == 0x00 && convrate <= 0x09) {
1816 int local_ext, conalert, chen, dfc;
1daaceb2
WN
1817
1818 local_ext = i2c_smbus_read_byte_data(client,
1819 TMP451_REG_R_LOCAL_TEMPL);
f8344f76
GR
1820 conalert = i2c_smbus_read_byte_data(client,
1821 TMP451_REG_CONALERT);
1822 chen = i2c_smbus_read_byte_data(client, TMP461_REG_CHEN);
1823 dfc = i2c_smbus_read_byte_data(client, TMP461_REG_DFC);
1824
1825 if ((local_ext & 0x0F) == 0x00 &&
1826 (conalert & 0xf1) == 0x01 &&
1827 (chen & 0xfc) == 0x00 &&
1828 (dfc & 0xfc) == 0x00) {
1829 if (address == 0x4c && !(chen & 0x03))
1830 name = "tmp451";
1831 else if (address >= 0x48 && address <= 0x4f)
1832 name = "tmp461";
1833 }
1da177e4
LT
1834 }
1835
8f2fa77c
JD
1836 if (!name) { /* identification failed */
1837 dev_dbg(&adapter->dev,
1838 "Unsupported chip at 0x%02x (man_id=0x%02X, "
1839 "chip_id=0x%02X)\n", address, man_id, chip_id);
1840 return -ENODEV;
1da177e4 1841 }
8f2fa77c 1842
9b0e8526
JD
1843 strlcpy(info->type, name, I2C_NAME_SIZE);
1844
1845 return 0;
1846}
1847
1f17a444 1848static void lm90_restore_conf(void *_data)
f7001bb0 1849{
1f17a444
GR
1850 struct lm90_data *data = _data;
1851 struct i2c_client *client = data->client;
1852
f6d07751
GR
1853 cancel_delayed_work_sync(&data->alert_work);
1854
f7001bb0 1855 /* Restore initial configuration */
7a1d220c 1856 lm90_write_convrate(data, data->convrate_orig);
f7001bb0
GR
1857 i2c_smbus_write_byte_data(client, LM90_REG_W_CONFIG1,
1858 data->config_orig);
1859}
1860
37ad04d7 1861static int lm90_init_client(struct i2c_client *client, struct lm90_data *data)
15b66ab6 1862{
45988d90 1863 struct device_node *np = client->dev.of_node;
37ad04d7 1864 int config, convrate;
15b66ab6 1865
37ad04d7
GR
1866 convrate = lm90_read_reg(client, LM90_REG_R_CONVRATE);
1867 if (convrate < 0)
1868 return convrate;
0c01b644
GR
1869 data->convrate_orig = convrate;
1870
15b66ab6
GR
1871 /*
1872 * Start the conversions.
1873 */
37ad04d7
GR
1874 config = lm90_read_reg(client, LM90_REG_R_CONFIG1);
1875 if (config < 0)
1876 return config;
15b66ab6 1877 data->config_orig = config;
b849e5d1 1878 data->config = config;
15b66ab6 1879
62456189
BY
1880 lm90_set_convrate(client, data, 500); /* 500ms; 2Hz conversion rate */
1881
15b66ab6 1882 /* Check Temperature Range Select */
f347e249 1883 if (data->flags & LM90_HAVE_EXTENDED_TEMP) {
45988d90
HB
1884 if (of_property_read_bool(np, "ti,extended-range-enable"))
1885 config |= 0x04;
1886
15b66ab6
GR
1887 if (config & 0x04)
1888 data->flags |= LM90_FLAG_ADT7461_EXT;
1889 }
1890
1891 /*
1892 * Put MAX6680/MAX8881 into extended resolution (bit 0x10,
1893 * 0.125 degree resolution) and range (0x08, extend range
1894 * to -64 degree) mode for the remote temperature sensor.
1895 */
1896 if (data->kind == max6680)
1897 config |= 0x18;
1898
229d495d
JL
1899 /*
1900 * Put MAX6654 into extended range (0x20, extend minimum range from
1901 * 0 degrees to -64 degrees). Note that extended resolution is not
1902 * possible on the MAX6654 unless conversion rate is set to 1 Hz or
1903 * slower, which is intentionally not done by default.
1904 */
1905 if (data->kind == max6654)
1906 config |= 0x20;
1907
15b66ab6
GR
1908 /*
1909 * Select external channel 0 for max6695/96
1910 */
1911 if (data->kind == max6696)
1912 config &= ~0x08;
1913
2abdc357
DO
1914 /*
1915 * Interrupt is enabled by default on reset, but it may be disabled
1916 * by bootloader, unmask it.
1917 */
1918 if (client->irq)
1919 config &= ~0x80;
1920
15b66ab6 1921 config &= 0xBF; /* run */
7a1d220c 1922 lm90_update_confreg(data, config);
1f17a444 1923
c5fcf01b 1924 return devm_add_action_or_reset(&client->dev, lm90_restore_conf, data);
15b66ab6
GR
1925}
1926
f6d07751 1927static bool lm90_is_tripped(struct i2c_client *client)
072de496
WN
1928{
1929 struct lm90_data *data = i2c_get_clientdata(client);
f6d07751 1930 int ret;
072de496 1931
f6d07751
GR
1932 ret = lm90_update_alarms(data, true);
1933 if (ret < 0)
072de496
WN
1934 return false;
1935
f6d07751 1936 return !!data->current_alarms;
072de496
WN
1937}
1938
109b1283
WN
1939static irqreturn_t lm90_irq_thread(int irq, void *dev_id)
1940{
1941 struct i2c_client *client = dev_id;
109b1283 1942
f6d07751 1943 if (lm90_is_tripped(client))
109b1283
WN
1944 return IRQ_HANDLED;
1945 else
1946 return IRQ_NONE;
1947}
1948
1f17a444
GR
1949static void lm90_remove_pec(void *dev)
1950{
1951 device_remove_file(dev, &dev_attr_pec);
1952}
1953
1954static void lm90_regulator_disable(void *regulator)
1955{
1956 regulator_disable(regulator);
1957}
1958
eb1c8f43
GR
1959
1960static const struct hwmon_ops lm90_ops = {
1961 .is_visible = lm90_is_visible,
1962 .read = lm90_read,
1963 .write = lm90_write,
1964};
1965
67487038 1966static int lm90_probe(struct i2c_client *client)
9b0e8526 1967{
b2589ab0 1968 struct device *dev = &client->dev;
e67776cc 1969 struct i2c_adapter *adapter = client->adapter;
eb1c8f43 1970 struct hwmon_channel_info *info;
3e0f964f 1971 struct regulator *regulator;
6e5f62b9 1972 struct device *hwmon_dev;
eb1c8f43 1973 struct lm90_data *data;
9b0e8526 1974 int err;
1da177e4 1975
3e0f964f
WN
1976 regulator = devm_regulator_get(dev, "vcc");
1977 if (IS_ERR(regulator))
1978 return PTR_ERR(regulator);
1979
1980 err = regulator_enable(regulator);
1981 if (err < 0) {
d89fa686 1982 dev_err(dev, "Failed to enable regulator: %d\n", err);
3e0f964f
WN
1983 return err;
1984 }
1985
c5fcf01b
GR
1986 err = devm_add_action_or_reset(dev, lm90_regulator_disable, regulator);
1987 if (err)
1988 return err;
1f17a444 1989
d89fa686 1990 data = devm_kzalloc(dev, sizeof(struct lm90_data), GFP_KERNEL);
20f426ff
GR
1991 if (!data)
1992 return -ENOMEM;
1993
1de8b250 1994 data->client = client;
b2589ab0 1995 i2c_set_clientdata(client, data);
9a61bf63 1996 mutex_init(&data->update_lock);
f6d07751 1997 INIT_DELAYED_WORK(&data->alert_work, lm90_alert_work);
1da177e4 1998
9b0e8526 1999 /* Set the device type */
df8d57bf
JMC
2000 if (client->dev.of_node)
2001 data->kind = (enum chips)of_device_get_match_data(&client->dev);
2002 else
67487038 2003 data->kind = i2c_match_id(lm90_id, client)->driver_data;
9b0e8526
JD
2004 if (data->kind == adm1032) {
2005 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE))
b2589ab0 2006 client->flags &= ~I2C_CLIENT_PEC;
9b0e8526 2007 }
1da177e4 2008
f36ffeab
GR
2009 /*
2010 * Different devices have different alarm bits triggering the
2011 * ALERT# output
2012 */
4667bcb8 2013 data->alert_alarms = lm90_params[data->kind].alert_alarms;
53de3342 2014
88073bb1 2015 /* Set chip capabilities */
4667bcb8 2016 data->flags = lm90_params[data->kind].flags;
eb1c8f43
GR
2017
2018 data->chip.ops = &lm90_ops;
2019 data->chip.info = data->info;
2020
a4d41e67
GR
2021 data->info[0] = HWMON_CHANNEL_INFO(chip,
2022 HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL | HWMON_C_ALARMS);
eb1c8f43
GR
2023 data->info[1] = &data->temp_info;
2024
2025 info = &data->temp_info;
2026 info->type = hwmon_temp;
2027 info->config = data->channel_config;
2028
2029 data->channel_config[0] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
16ba51b5 2030 HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM;
eb1c8f43 2031 data->channel_config[1] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
16ba51b5
GR
2032 HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM | HWMON_T_FAULT;
2033
2034 if (data->flags & LM90_HAVE_CRIT) {
2035 data->channel_config[0] |= HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_CRIT_HYST;
2036 data->channel_config[1] |= HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_CRIT_HYST;
2037 }
eb1c8f43
GR
2038
2039 if (data->flags & LM90_HAVE_OFFSET)
2040 data->channel_config[1] |= HWMON_T_OFFSET;
2041
2042 if (data->flags & LM90_HAVE_EMERGENCY) {
2043 data->channel_config[0] |= HWMON_T_EMERGENCY |
2044 HWMON_T_EMERGENCY_HYST;
2045 data->channel_config[1] |= HWMON_T_EMERGENCY |
2046 HWMON_T_EMERGENCY_HYST;
2047 }
2048
2049 if (data->flags & LM90_HAVE_EMERGENCY_ALARM) {
2050 data->channel_config[0] |= HWMON_T_EMERGENCY_ALARM;
2051 data->channel_config[1] |= HWMON_T_EMERGENCY_ALARM;
2052 }
2053
2054 if (data->flags & LM90_HAVE_TEMP3) {
2055 data->channel_config[2] = HWMON_T_INPUT |
2056 HWMON_T_MIN | HWMON_T_MAX |
2057 HWMON_T_CRIT | HWMON_T_CRIT_HYST |
2058 HWMON_T_EMERGENCY | HWMON_T_EMERGENCY_HYST |
2059 HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM |
2060 HWMON_T_CRIT_ALARM | HWMON_T_EMERGENCY_ALARM |
2061 HWMON_T_FAULT;
2062 }
2063
a095f687 2064 data->reg_local_ext = lm90_params[data->kind].reg_local_ext;
06e1c0a2 2065
0c01b644
GR
2066 /* Set maximum conversion rate */
2067 data->max_convrate = lm90_params[data->kind].max_convrate;
2068
1da177e4 2069 /* Initialize the LM90 chip */
37ad04d7
GR
2070 err = lm90_init_client(client, data);
2071 if (err < 0) {
2072 dev_err(dev, "Failed to initialize device\n");
2073 return err;
2074 }
1da177e4 2075
eb1c8f43
GR
2076 /*
2077 * The 'pec' attribute is attached to the i2c device and thus created
2078 * separately.
2079 */
b2589ab0
JD
2080 if (client->flags & I2C_CLIENT_PEC) {
2081 err = device_create_file(dev, &dev_attr_pec);
11e57812 2082 if (err)
1f17a444 2083 return err;
c5fcf01b
GR
2084 err = devm_add_action_or_reset(dev, lm90_remove_pec, dev);
2085 if (err)
2086 return err;
06e1c0a2 2087 }
0e39e01c 2088
eb1c8f43
GR
2089 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
2090 data, &data->chip,
2091 NULL);
6e5f62b9
GR
2092 if (IS_ERR(hwmon_dev))
2093 return PTR_ERR(hwmon_dev);
943b0830 2094
94dbd23e
DO
2095 data->hwmon_dev = hwmon_dev;
2096
109b1283
WN
2097 if (client->irq) {
2098 dev_dbg(dev, "IRQ: %d\n", client->irq);
2099 err = devm_request_threaded_irq(dev, client->irq,
2100 NULL, lm90_irq_thread,
d97fb837 2101 IRQF_ONESHOT, "lm90", client);
109b1283
WN
2102 if (err < 0) {
2103 dev_err(dev, "cannot request IRQ %d\n", client->irq);
6e5f62b9 2104 return err;
109b1283
WN
2105 }
2106 }
2107
1da177e4
LT
2108 return 0;
2109}
2110
b4f21054
BT
2111static void lm90_alert(struct i2c_client *client, enum i2c_alert_protocol type,
2112 unsigned int flag)
53de3342 2113{
b4f21054
BT
2114 if (type != I2C_PROTOCOL_SMBUS_ALERT)
2115 return;
2116
f6d07751 2117 if (lm90_is_tripped(client)) {
f36ffeab
GR
2118 /*
2119 * Disable ALERT# output, because these chips don't implement
2120 * SMBus alert correctly; they should only hold the alert line
2121 * low briefly.
2122 */
072de496
WN
2123 struct lm90_data *data = i2c_get_clientdata(client);
2124
37ad04d7 2125 if ((data->flags & LM90_HAVE_BROKEN_ALERT) &&
f6d07751 2126 (data->current_alarms & data->alert_alarms)) {
53de3342 2127 dev_dbg(&client->dev, "Disabling ALERT#\n");
7a1d220c 2128 lm90_update_confreg(data, data->config | 0x80);
f6d07751
GR
2129 schedule_delayed_work(&data->alert_work,
2130 max_t(int, HZ, msecs_to_jiffies(data->update_interval)));
53de3342 2131 }
072de496 2132 } else {
94dbd23e 2133 dev_dbg(&client->dev, "Everything OK\n");
53de3342
JD
2134 }
2135}
2136
4c7f85a3
DO
2137static int __maybe_unused lm90_suspend(struct device *dev)
2138{
2139 struct lm90_data *data = dev_get_drvdata(dev);
2140 struct i2c_client *client = data->client;
2141
2142 if (client->irq)
2143 disable_irq(client->irq);
2144
2145 return 0;
2146}
2147
2148static int __maybe_unused lm90_resume(struct device *dev)
2149{
2150 struct lm90_data *data = dev_get_drvdata(dev);
2151 struct i2c_client *client = data->client;
2152
2153 if (client->irq)
2154 enable_irq(client->irq);
2155
2156 return 0;
2157}
2158
2159static SIMPLE_DEV_PM_OPS(lm90_pm_ops, lm90_suspend, lm90_resume);
2160
15b66ab6
GR
2161static struct i2c_driver lm90_driver = {
2162 .class = I2C_CLASS_HWMON,
2163 .driver = {
2164 .name = "lm90",
df8d57bf 2165 .of_match_table = of_match_ptr(lm90_of_match),
4c7f85a3 2166 .pm = &lm90_pm_ops,
15b66ab6 2167 },
67487038 2168 .probe_new = lm90_probe,
15b66ab6
GR
2169 .alert = lm90_alert,
2170 .id_table = lm90_id,
2171 .detect = lm90_detect,
2172 .address_list = normal_i2c,
2173};
1da177e4 2174
f0967eea 2175module_i2c_driver(lm90_driver);
1da177e4 2176
7c81c60f 2177MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
1da177e4
LT
2178MODULE_DESCRIPTION("LM90/ADM1032 driver");
2179MODULE_LICENSE("GPL");