mmc: omap_hsmmc: use a default 52MHz max clock rate if none is specified mmc_of_parse() doesn't set a default value if none is available in DT. In that case, use a default 52MHz clock rate. Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Tested-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
mmc: omap_hsmmc: make it possible to compile out ADMA support Some platforms don't have ADMA controllers. For those platforms, compiling it out reduces the size of the binary by about 600 bytes. Leaving the support in doesn't break things as the driver checks at runtime if the ADMA2 controller is present. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Tested-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
mmc: omap_hsmmc: do not embed struct mmc in struct omap_hsmmc_plat The area for struct mmc can be allocated dynamically. It greatly reduces the size of struct omap_hsmmc_plat. This is useful in cases where the board level code declares one or two struct omap_hsmmc_plat because it doesn't use the Driver Model. This saves around 740 bytes for the am335x_evm SPL. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Tested-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Merge git://git.denx.de/u-boot-imx
bootcount: Migrate CONFIG_SYS_BOOTCOUNT_ADDR Migrate the users of CONFIG_SYS_BOOTCOUNT_ADDR to Kconfig. We can provide a default for BOOTCOUNT_AM33XX as that's a specific part of the RTC in use. We can also provide a default for ARCH_LS1043A and ARCH_LS1021A as they had been previously calculated and their symbols are in Kconfig. In the case of other QE-enabled platforms, they are not so we must update the relevant defconfig files. The previous default only applied in some cases, even on a specific SoC family. Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Alex Kiernan <alex.kiernan@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
imx: spl: Partially revert "spl: eMMC/SD: Provide one __weak spl_boot_mode() function" Commit d695d6627803 ("spl: eMMC/SD: Provide one __weak spl_boot_mode() function") breaks the boot on several i.MX6 boards, such as cuboxi and wandboard: U-Boot SPL 2018.03-rc1-00212-g48914fc119 (Feb 10 2018 - 11:04:33 +1300) Trying to boot from MMC1 Failed to mount ext2 filesystem... spl_load_image_ext: ext4fs mount err - 0 Partially revert it so that we can boot U-Boot again on these i.MX6 platforms. Reported-by: Jonathan Gray <jsg@jsg.id.au> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Breno Lima <breno.lima@nxp.com>
rockchip: clk: rk3399: handle set_rate/get_rate for PLL_PPLL The device-tree node for the PMU clk controller assigns to its parent (i.e. PLL_PPLL) even though this clock currently is set up statically by an init-function. In order to avoid unexpected failures, a simple implementation of set_rate (which accepts requests, but notifies the caller of the preset frequency in its return value) and get_rate (which always returns the preset frequency) are added. Note that this is required for the RK808 PMIC to probe successfully on the RK3399-Q7, following the support for the assigned-clocks property. References: commit f4fcba5c5baa ("clk: implement clk_set_defaults()") Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
rockchip: rk3288: Fix wrong TPL_TEXT_BASE TPL offset 0xff704004 is unaligned address which is adding nearest 8-bytes for next instruction, So 0xff704004 is adding 0x20 for proper alignment which is causing the next instruction data 0xefffffff is moved. Hexdump with overlaped bytes: ----------------------------- 0000000 0000 0000 0000 0000 0000 0000 0000 0000 0000010 0000 0000 0000 0000 0000 0000 ffff eaff So, Fix the TEXT_BASE for proper aligned address 0xff704000 Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
rockchip: rk3288: Add TPL_LDSCRIPT Due to size limitations in SPL by adding falcon mode, rk3288 support TPL. In order to not overlap SPL_TEXT_BASE add TPL_TEXT_BASE with u-boot-tpl.lds that intern call u-boot-spl.lds with proper TEXT_BASE values. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
rockchip: clk: rk3368: handle clk_enable requests for GMAC Since commit ba1f96672522 ("net: designware: add clock support"), the designware GMAC driver enables all referenced clocks. While this is a no-op for the RK3368 during boot-up (reset behaviour has all the clock gates open anyway), we still need to handle the clock-ids passed in the enable op of the clock-driver and return a success. This change extends the RK3368 clk driver to: (a) provide a enable op (b) signals success to the caller when the clocks for the GMAC are enabled (no actual action is necessary as the gates are open after reset) References: commit ba1f96672522 ("net: designware: add clock support") Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
rockchip: clk: rk3399: handle clk_enable requests for GMAC Since commit ba1f96672522 ("net: designware: add clock support"), the designware GMAC driver enables all referenced clocks. While this is a no-op for the RK3399 during boot-up (reset behaviour has all the clock gates open anyway), we still need to handle the clock-ids passed in the enable op of the clock-driver and return a success. This change extends the enable-op of the rk3399 clk driver to signal success to the caller when the clocks for the GMAC are enabled. References: commit ba1f96672522 ("net: designware: add clock support") Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Convert CONFIG_BOOTCOUNT_EXT to Kconfig This converts the following to Kconfig: CONFIG_BOOTCOUNT_EXT Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>