[people/ms/u-boot.git] / CHANGELOG

commit 246c69225c7b962d5c93e92282b78ca9fc5fefee
Author: Peter Tyser <ptyser@xes-inc.com>
Date:	Sun Oct 25 15:12:56 2009 -0500

    Add 'editenv' command

    The editenv command can be used to edit an environment variable.
    Editing an environment variable is useful when one wants to tweak an
    existing variable, for example fix a typo or change the baudrate in the
    'bootargs' environment variable.

    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>

commit b0fa8e50632a628766db23f5c884ec63f1469552
Author: Peter Tyser <ptyser@xes-inc.com>
Date:	Sun Oct 25 15:12:55 2009 -0500

    setenv(): Delete 0-length environment variables

    Previously setenv() would only delete an environment variable if it
    was passed a NULL string pointer as a value.  It should also delete an
    environment variable when it encounters a valid string pointer of
    0-length.

    This change/fix is generally useful and is necessary for the upcoming
    "editenv" command.

    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>

commit ecc5500ee487170d8af6ff893fd1e0082380a01a
Author: Peter Tyser <ptyser@xes-inc.com>
Date:	Sun Oct 25 15:12:54 2009 -0500

    readline(): Add ability to modify a string buffer

    If the 'buf' parameter is a non-0-length string, its contents will be
    edited.  Previously, the initial contents of 'buf' were ignored and the
    user entered its contents from scratch.

    This change is necessary to support the upcoming "editenv" command but
    could also be used for future commands which require a user to modify
    an existing string.

    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>

commit f923943843cd617d681387e7fe81a48060cc6401
Author: Peter Tyser <ptyser@xes-inc.com>
Date:	Sun Oct 25 15:12:53 2009 -0500

    cread_line(): Remove unused variables

    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>

commit e491a71e578e93bd3b2f8f20d8ef8f111c98010d
Author: Peter Tyser <ptyser@xes-inc.com>
Date:	Sun Oct 25 15:12:52 2009 -0500

    Check for NULL prompt in readline_into_buffer()

    Previously, passing readline() or readline_into_buffer() a NULL 'prompt'
    parameter would result in puts() printing garbage when
    CONFIG_CMDLINE_EDITING was enabled.

    Note that no board currently triggers this bug.  Enabling
    CONFIG_CMDLINE_EDITING on some boards (eg bab7xx) would result in
    the bug appearing.	This change is only intended to prevent someone
    from running into this issue in the future.

    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>

commit 16d1c10783660f3fdbc3c19141f42f3b0d1834d3
Author: Wolfgang Denk <wd@denx.de>
Date:	Sun Oct 25 23:00:09 2009 +0100

    drivers/net/phy/miiphybb.c: fix warning: no newline at end of file

    Add missing newline.

    Signed-off-by: Wolfgang Denk <wd@denx.de>
    Cc: Luigi Mantellini <luigi.mantellini@idf-hit.com>
    Cc: Ben Warren <biggerbadderben@gmail.com>

commit a747a7f31059b9069e97c78bba5496409c33aa05
Author: Wolfgang Denk <wd@denx.de>
Date:	Tue Oct 27 00:03:32 2009 +0100

    Revert "env: only build env_embedded and envcrc when needed"

    Breaks building on many boards, and no really clean fix available yet.

    This reverts commit 6dab6add2d8ee80905234b326abc3de11be1d178.

commit 3fca80375981fe83d4674a0267183b469a1ea7ff
Author: Anton Vorontsov <avorontsov@ru.mvista.com>
Date:	Thu Oct 15 17:47:16 2009 +0400

    mpc85xx: Configure QE USB for MPC8569E-MDS boards

    Setup QE pin multiplexing for USB function, configure needed BCSRs
    and add some fdt fixups.

    Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

commit 14809b6c21c89dd65abaf3fea7627fb5ea0f78a3
Author: Anton Vorontsov <avorontsov@ru.mvista.com>
Date:	Thu Oct 15 17:47:13 2009 +0400

    mpc85xx: Configure QE UART for MPC8569E-MDS boards

    To make QE UART usable by Linux we should setup pin multiplexing
    and turn UCC2 Ethernet node into UCC2 QE UART node.

    Also, QE UART is mutually exclusive with UART0, so we can't enable
    it if eSDHC is in 4-bits mode on pilot boards, or if it's a prototype
    board with eSDHC in 1- or 4-bits mode.

    Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

commit 70d665b1d230b9575a647948e8db3da1e6743e5c
Author: Anton Vorontsov <avorontsov@ru.mvista.com>
Date:	Thu Oct 15 17:47:11 2009 +0400

    mpc85xx: Setup QE pinmux for SPI Flash on MPC8569E-MDS boards

    SPI Flash (M25P40) is connected to the SPI1 bus, we need a few
    qe_iop entries to actually enable SPI1 on these boards.

    Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

commit 65dec3b4599a17e83ec69dfd059e4ea1e795ef37
Author: Anton Vorontsov <avorontsov@ru.mvista.com>
Date:	Thu Oct 15 17:47:09 2009 +0400

    mpc85xx: Setup SRIO memory region LAW for MPC8569E-MDS boards

    This patch sets memory window for Serial RapidIO on MPC8569E-MDS
    boards.

    Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

commit a29155e12286cc5ec2df72c1cab28e3659bfdad5
Author: Anton Vorontsov <avorontsov@ru.mvista.com>
Date:	Thu Oct 15 17:47:08 2009 +0400

    mpc85xx: Add eLBC NAND support for MPC8569E-MDS boards

    Simply add some defines, and adjust TLBe setup to include some
    space for eLBC NAND.

    Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

commit 7f52ed5ef1b490da282ace3316be381a6abf96a5
Author: Anton Vorontsov <avorontsov@ru.mvista.com>
Date:	Thu Oct 15 17:47:06 2009 +0400

    mpc85xx: Add eSDHC support for MPC8569E-MDS boards

    eSDHC is mutually exlusive with UART0 (in 4-bits mode) and I2C2
    (in 1-bit mode). When eSDHC is used, we should switch u-boot console to
    UART1, and make the proper device-tree fixups.

    Because of an erratum in prototype boards it is impossible to use eSDHC
    without disabling UART0 (which makes it quite easy to 'brick' the board
    by simply issung 'setenv hwconfig esdhc', and not able to interact with
    U-Boot anylonger).

    So, but default we assume that the board is a prototype, which is a most
    safe assumption. There is no way to determine board revision from a
    register, so we use hwconfig.

    Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

commit 48618126f78f05042dae428811809b594f747eb9
Author: Peter Tyser <ptyser@xes-inc.com>
Date:	Fri Oct 23 15:55:48 2009 -0500

    xpedite5370: Enable multi-core support

    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

commit 5ccd29c3679b3669b0bde5c501c1aa0f325a7acb
Author: Peter Tyser <ptyser@xes-inc.com>
Date:	Fri Oct 23 15:55:47 2009 -0500

    85xx: MP Boot Page Translation update

    This change has 3 goals:
    - Have secondary cores be released into spin loops at their 'true'
      address in SDRAM.  Previously, secondary cores were put into spin
      loops in the 0xfffffxxx address range which required that boot page
      translation was always enabled while cores were in their spin loops.

    - Allow the TLB window that the primary core uses to access the
      secondary cores boot page to be placed at any address.  Previously, a
      TLB window at 0xfffff000 was always used to access the seconary cores'
      boot page.  This TLB address requirement overlapped with other
      peripherals on some boards (eg XPedite5370).  By default, the boot
      page TLB will still use the 0xfffffxxx address range, but this can be
      overridden on a board-by-board basis by defining a custom
      CONFIG_BPTR_VIRT_ADDR.  Note that the TLB used to map the boot page
      remains in use while U-Boot executes.  Previously it was only
      temporarily used, then restored to its initial value.

    - Allow Boot Page Translation to be disabled on bootup.  Previously,
      Boot Page Translation was always left enabled after secondary cores
      were brought out of reset.  This caused the 0xfffffxxx address range
      to somewhat "magically" be translated to an address in SDRAM.  Some
      boards may not want this oddity in their memory map, so defining
      CONFIG_MPC8xxx_DISABLE_BPTR will turn off Boot Page Translation after
      the secondary cores are initialized.

    These changes are only applicable to 85xx boards with CONFIG_MP defined.

    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

commit 70ed869ea5f6b1d13d7b140c83ec0dcd8a127ddc
Author: Vivek Mahajan <vivek.mahajan@freescale.com>
Date:	Tue Oct 27 12:18:55 2009 +0530

    ppc/85xx/pci: fsl_pci_init: pcie agent mode support

    Originally written by Jason Jin and Mingkai Hu for mpc8536.

    When QorIQ based board is configured as a PCIe agent, then unlock/enable
    inbound PCI configuration cycles and init a 4K inbound memory window;
    so that a PCIe host can access the PCIe agents SDRAM at address 0x0

    * Supported in fsl_pci_init_port() after adding pcie_ep as a param
    * Revamped copyright in drivers/pci/fsl_pci_init.c
    * Mods in 85xx based board specific pci init after this change

    Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

commit 273a28ad9ef59dcfcd4c056ec1f61f1e0896cfaa
Author: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Date:	Tue Oct 27 09:36:38 2009 +0530

    85xx/p1_p2_rdb: Fixing DDR configuration for 800MHz data rate

    Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

commit 924024c396761c267b948f38d78e9905f2036501
Author: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Date:	Tue Oct 27 09:26:55 2009 +0530

    85xx/p1_p2rdb: Fix crash while configuring 32 bit DDR i/f for P1020RDB.

    The data being modified was in NOR flash which caused the crash.

    Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

commit 3e303f748cf57fb23e8ec95ab7eac0074be50e2b
Author: Anton Vorontsov <avorontsov@ru.mvista.com>
Date:	Thu Oct 15 17:47:04 2009 +0400

    fdt_support: Add multi-serial support for stdout fixup

    Currently fdt_fixup_stdout() is using hard-coded CONFIG_CONS_INDEX
    constant. With multi-serial support, the CONS_INDEX may no longer
    represent actual console, so we should try to extract port number
    from the current stdio device name instead of always hard-coding the
    constant value.

    Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
    Acked-by: Gerald Van Baren <vanbaren@cideas.com>
    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

commit da0e5f7ee828f246d85997486fff308837069453
Author: Leon Woestenberg <leon.woestenberg@gmail.com>
Date:	Mon Oct 26 10:03:32 2009 +0100

    ppc/85xx: Fix crashes due to generation of SPE instruction

    U-Boot crashed on the last instruction:

    int parse_stream_outer(struct in_str *inp, int flag)
    {
    effa4784:	    94 21 ff 38     stwu    r1,-200(r1)
    effa4788:	    7c 08 02 a6     mflr    r0
    effa478c:	    42 9f 00 05     bcl-    20,4*cr7+so,effa4790 <parse_stream_outer+0xc>
    effa4790:	    7d 80 00 26     mfcr    r12
    effa4794:	    13 c1 b3 21     evstdd  r30,176(r1)

    ...which is a  SPE instruction, although -mno-spe was used.

    tmp/cross/ppce500v2/bin/powerpc-angstrom-linux-gnuspe-gcc --version
    powerpc-angstrom-linux-gnuspe-gcc (GCC) 4.3.3

    Seems to be a known issue (since 2008-04?!)

    Googled some, turns out this patch/workaround works for me on MPC8536DS.

    See http://gcc.gnu.org/ml/gcc-patches/2008-04/msg00311.html for more info

    Signed-off-by: Leon Woestenberg <leon@sidebranch.com>
    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

commit 654ea1f3184235694306ddc5874baa27ad3018fe
Author: Dave Liu <daveliu@freescale.com>
Date:	Thu Oct 22 00:10:23 2009 -0500

    ppc/85xx: Make L2 support more robust

    According the user manual, we need loop-check the L2 enable bit set.

    Signed-off-by: Dave Liu <daveliu@freescale.com>
    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

commit 613ad28c3da4c7fc6336ef9d94993b25a5d0586e
Author: Kumar Gala <galak@kernel.crashing.org>
Date:	Mon Oct 26 21:21:25 2009 -0500

    ppc/85xx: Fix compiler warning in nand_spl/.../p1_p2_rdb/nand_boot.c

    nand_boot.c: In function 'board_init_f':
    nand_boot.c:44: warning: 'sys_clk' may be used uninitialized in this function

    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

commit e8967d96a0e8d09d91a3b7bd292746996dd8e7ac
Author: Kumar Gala <galak@kernel.crashing.org>
Date:	Mon Oct 26 21:18:33 2009 -0500

    ppc/85xx: Fix building NAND_SPL out of tree

    We need to source files to exist in the O=<FOO> nand_spl dir when
    we build out of tree.

    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

commit f3ee25859e3920ee7c7cc519a3e6f60d70d7a53f
Author: Matthias Fuchs <matthias.fuchs@esd.eu>
Date:	Fri Oct 23 10:52:38 2009 +0200

    License cleanup: Fix license header for some esd display configurations

    These files were autogenerated by EPSON configuration tools.
    This patch replaces the autogenerated file headers by the GPL
    license notice.

    This change is done with the explicit permission
    of Epson Research & Development / IC Software Development.

    Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>

commit 4166ee58d30ada7b298b9c941067f0341c2dccbe
Author: Mike Frysinger <vapier@gentoo.org>
Date:	Fri Oct 9 17:12:44 2009 -0400

    sf: add GPL-2 license info

    Some of the new spi flash files were missing explicit license lines.

    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
    CC: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>

commit d535a493004fb701f131b132402a7704f9c9342d
Author: Kumar Gala <galak@kernel.crashing.org>
Date:	Wed Oct 21 23:29:51 2009 -0500

    fdt: Fix fdt padding issue for initrd mem_rsv

    Its possible that we end up with a device tree that happens to be a
    particular size that after we call fdt_resize() we don't have any
    space left for the initrd mem_rsv.

    Fix this be adding a second mem_rsv into the size calculation.  We
    had one to cover the fdt itself and we have the potential of adding
    a second for the initrd.

    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
    Acked-by: Gerald Van Baren <vanbaren@cideas.com>

commit 4bc3d2afb380e78fdbb9c501d9a8da6d59eb178e
Author: Steve Sakoman <sakoman@gmail.com>
Date:	Tue Oct 20 18:21:18 2009 +0200

    ARM: OMAP3: Refactors the SM911x driver

    Move the test up in the function to not hang on systems without ethernet.

    Signed-off-by: Steve Sakoman <sakoman@gmail.com>
    Acked-by: Ben Warren <biggerbadderben@gmail.com>

commit f3807374787e4394efb767e2e8527887f57e51b8
Author: Minkyu Kang <mk7.kang@samsung.com>
Date:	Thu Oct 15 11:19:15 2009 +0900

    s5pc1xx: SMDKC100: fix compile warnings

    fix the following compile warnings
    warning: dereferencing type-punned pointer will break strict-aliasing rules

    Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

commit 8003c361deec3ee651451662efd05352f1abdd40
Author: Simon Kagstrom <simon.kagstrom@netinsight.net>
Date:	Tue Oct 6 08:44:22 2009 +0200

    arm926ejs: 8-byte align stack to avoid LDRD/STRD problems

    U-boot for Marvell Kirkwood boards no longer work after the EABI changes
    introduced in commit f772acf8a584067033eff1e231fcd1fb3a00d3d9. This
    turns out to be caused by a stack alignment issue. The armv5te
    instructions ldrd/strd instructions require 8-byte alignment to work
    properly (otherwise undefined behavior).

    Tested on an OpenRD base board, where both printouts and ubifs stuff now
    works.

    Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>

commit e63e5904b48528f3f3cc98317df6fc62fab25bf9
Author: Tom Rix <Tom.Rix@windriver.com>
Date:	Sat Oct 17 12:41:06 2009 -0500

    TI OMAP3 SDP3430: Initial Support

    Start of support of
    Texas Instruments Software Development Platform(SDP)
    for OMAP3430 - SDP3430

    Highlights of this platform are:
    Flash Memory devices:
	Sibley NOR, Micron 8bit NAND and OneNAND
    Connectivity:
	3 UARTs and expanded 4 UART ports + IrDA
	Ethernet, USB
    Other peripherals:
	TWL5030 PMIC+Audio+Keypad
	VGA display
    Expansion ports:
	Memory devices plugin boards (PISMO)
	Connectivity board for GPS,WLAN etc.
    Completely configurable boot sequence and device mapping
    etc.

    Support default jumpering and:
     - UART1/ttyS0 console(legacy sdp3430 u-boot)
     - UART3/ttyS2 console (matching other boards,
		 and SDP HW docs)
     - Ethernet
     - mmc0
     - NOR boot

    Currently the UART1 is enabled by default.	for
    compatibility with other OMAP3 u-boot platforms,
    enable the #define of CONSOLE_J9.

    Conflicts:

	Makefile

    Fixed the conflict with smdkc100_config by moving omap_sdp3430_config
    to it is alphabetically sorted location above zoom1.

    Signed-off-by: David Brownell <david-b@pacbell.net>
    Signed-off-by: Nishanth Menon <nm@ti.com>
    Signed-off-by: Tom Rix <Tom.Rix@windriver.com>

commit a4474ff8629be5f28aefb8a9f48d4411d62fb0d2
Author: Sandeep Paulraj <s-paulraj@ti.com>
Date:	Tue Oct 13 19:35:11 2009 -0400

    TI DaVinci: Adding Copyright for DM365 EVM

    Forgot to add Copyright while submitting the patch.
    This patch adds the copyright.

    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

commit 11b0102218bbb50ac5c04f1521f2a22ed4e90cf1
Author: Sandeep Paulraj <s-paulraj@ti.com>
Date:	Tue Oct 13 12:32:32 2009 -0400

    TI DaVinci: Fix DM6467 EVM Compilation Warning

    Due to new TI boards being added to U-Boot, the hardware.h
    is getting very messy. The warning being fixed is due to
    the EMIF addresses being redefined.

    The long term solution(after 2009.11) to this is to
    have SOC specific header files.

    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

commit fac1ef4ba685606bf28349d18e050ea08b50e669
Author: Sandeep Paulraj <s-paulraj@ti.com>
Date:	Tue Oct 13 12:01:52 2009 -0400

    TI DaVinci: DM355 Leopard: Fix compilation warning

    We get a compliation warning when we enable the NAND driver
    for DM355 leopard. The waring we get is that we have
    an implicit declaration of davinci_nand_init.

    It is fixed by including the asm/arch/nand_defs.h header file

    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

commit f8a812aa656bc34622303a26fa5003d19c34aeed
Author: Nishanth Menon <nm@ti.com>
Date:	Tue Oct 13 12:49:55 2009 -0400

    TI OMAP3: make gpmc_config as const

    gpmc_config should not be a variant as it is board specific
    hence make it a const parameter

    Fixes issues identified by Dirk:
    - build issue for zoom2
    - warnings for all other OMAP3 platforms using nand/onenand etc

    Signed-off-by: Nishanth Menon <nm@ti.com>

commit cfc25874624a328f53ad59b1206e2103f2e62d74
Author: Stefan Roese <sr@denx.de>
Date:	Mon Oct 19 16:19:36 2009 +0200

    ppc4xx: Sequoia: Add chip_config command

    This patch removes the Sequoia "bootstrap" command and replaces it
    with the now common command "chip_config".

    Please note that the patches with the dynamic PCI sync clock
    configuration have to be applied, before this one should go in.
    This is because Sequoia has 2 different bootstrap EEPROMs, and
    the old bootstrap command configured different values depending
    on the detected PCI async clock (33 vs. 66MHz). With the PCI sync
    clock patches, this is not necessary anymore. The PCI sync clock
    will be configured correctly on-the-fly now.

    Signed-off-by: Stefan Roese <sr@denx.de>

commit c85b58397030e25e146ccf5085c86221c40c53b3
Author: Stefan Roese <sr@denx.de>
Date:	Mon Oct 19 14:14:08 2009 +0200

    ppc4xx: Yosemite/Yellowstone: Check and reconfigure the PCI sync clock

    This patch now uses the 440EP(x)/GR(x) function to check and dynamically
    reconfigure the PCI sync clock.

    Signed-off-by: Stefan Roese <sr@denx.de>

commit 23c51a2d6393cd3be9eb62cb42d92138ff6db8a9
Author: Stefan Roese <sr@denx.de>
Date:	Mon Oct 19 14:10:50 2009 +0200

    ppc4xx: Sequoia/Rainer: Check and reconfigure the PCI sync clock

    This patch now uses the 440EP(x)/GR(x) function to check and dynamically
    reconfigure the PCI sync clock.

    Signed-off-by: Stefan Roese <sr@denx.de>

commit 08c6a2628478ace808b3767db17e4148cac5a7fb
Author: Stefan Roese <sr@denx.de>
Date:	Mon Oct 19 14:44:11 2009 +0200

    ppc4xx: Print PCI synchronous clock frequency upon bootup

    Some 4xx variants (e.g. 440EP(x)/GR(x)) have an internal
    synchronous PCI clock. Knowledge about the currently configured
    value might be helpful. So let's print it out upon bootup.

    Signed-off-by: Stefan Roese <sr@denx.de>

commit 5e47f9535f53fd4cc05f32fb6166870f976fbb4e
Author: Stefan Roese <sr@denx.de>
Date:	Mon Oct 19 14:06:23 2009 +0200

    ppc4xx: Add function to check and dynamically change PCI sync clock

    PPC440EP(x)/PPC440GR(x):
    In asynchronous PCI mode, the synchronous PCI clock must meet
    certain requirements. The following equation describes the
    relationship that must be maintained between the asynchronous PCI
    clock and synchronous PCI clock. Select an appropriate PCI:PLB
    ratio to maintain the relationship:

    AsyncPCIClk - 1MHz <= SyncPCIclock <= (2 * AsyncPCIClk) - 1MHz

    This patch now adds a function to check and reconfigure the sync
    PCI clock to meet this requirement. This is in preparation for
    some AMCC boards (Sequoia/Rainier and Yosemite/Yellowstone) using this
    function to not violate the PCI clocking rules.

    Signed-off-by: Stefan Roese <sr@denx.de>

commit 92b8964bed0d1b779d9e26be4e16755b5c635415
Author: Stefan Roese <sr@denx.de>
Date:	Fri Oct 16 10:01:09 2009 +0200

    ppc4xx: Update flash size in reg property of the NOR flash node

    Till now only the ranges in the ebc node are updated with the values
    currently configured in the PPC4xx EBC controller. With this patch now
    the NOR flash size is updated in the device tree blob as well. This is
    done by scanning the compatible nodes "cfi-flash" and "jedec-flash"
    for the correct chip select number.

    This size fixup is enabled for all AMCC eval board right now. Other
    4xx boards may want to enable it as well, if this problem with multiple
    NOR FLASH sizes exists.

    Signed-off-by: Stefan Roese <sr@denx.de>
    Cc: Wolfgang Denk <wd@denx.de>

commit 30d45c0d3ea2231f9131276ea113595959a0720e
Author: Stefan Roese <sr@denx.de>
Date:	Wed Oct 21 11:59:52 2009 +0200

    fdt: Add fdt_fixup_nor_flash_size() to fixup NOR FLASH size in dtb

    This function can be used to update the size in the "reg" property
    of the NOR FLASH device nodes. This is necessary for boards with
    non-fixed NOR FLASH sizes.

    Signed-off-by: Stefan Roese <sr@denx.de>
    Acked-by: Gerald Van Baren <vanbaren@cideas.com>
    Acked-by: Wolfgang Denk <wd@denx.de>

commit 76706cb86b1c76954ff5353db6757ab99cfd95fb
Author: Wolfgang Denk <wd@denx.de>
Date:	Tue Oct 20 23:12:13 2009 +0200

    cpu/ppc4xx/fdt.c: avoid strcpy() to constant string

    strcpy() was iused with the target address being a pointer to a
    constant string, which potentially is read-only. Use a (writable)
    array of characters instead.

    Signed-off-by: Wolfgang Denk <wd@denx.de>
    Signed-off-by: Stefan Roese <sr@denx.de>

commit 0e1ac981194aa0d92eff0934442cec48a4f57834
Author: Wolfgang Denk <wd@denx.de>
Date:	Tue Oct 20 23:07:04 2009 +0200

    cpu/ppc4xx/fdt.c: avoid strcpy() to constant string

    strcpy() was iused with the target address being a pointer to a
    constant string, which potentially is read-only. Use a (writable)
    array of characters instead.

    Signed-off-by: Wolfgang Denk <wd@denx.de>

commit c55096c084308c08bf8891c190f90bdc3a232394
Author: Daniel Mack <daniel@caiaq.de>
Date:	Wed Apr 8 13:23:38 2009 +0200

    smc911x: add support for LAN9220

    Signed-off-by: Daniel Mack <daniel@caiaq.de>
    Cc: Sascha Hauer <s.hauer@pengutronix.de>
    Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

commit f67066b6b0740b826ed862615c5ab022aaf4779a
Author: Mike Frysinger <vapier@gentoo.org>
Date:	Sun Oct 18 20:43:14 2009 -0400

    envcrc: check return value of fwrite()

    Newer toolchains will often complain about unchecked fwrite():