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1commit 161e4ae46046282fde6a69a0f1f80965f2a1b6f4
2Author: Heiko Schocher <hs@denx.de>
3Date: Thu Jun 17 07:01:40 2010 +0200
4
5 powerpc: fix wrong comment at GOT definitions
6
7 r12 is used for accessing the GOT not r14. Fix this in the
8 comment.
9
10 Signed-off-by: Heiko Schocher <hs@denx.de>
11
12commit 7030d56b7946c8db2e8082a9b84cd69b9540a0ca
13Author: Becky Bruce <beckyb@kernel.crashing.org>
14Date: Thu Jun 17 11:37:27 2010 -0500
15
16 MAKEALL: Add missing powerpc 36-bit targets
17
18 We were missing 8641HPCN_36BIT and MPC8536DS_36BIT.
19
20 Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
21
22commit e03b4d296b27790de3b25edd32784d20538240d8
23Author: Anatolij Gustschin <agust@denx.de>
24Date: Sat Jun 26 00:39:28 2010 +0200
25
26 Fix compiler warnings for EVB64260, P3G4 and ZUMA
27
28 Fix following warnings:
29
30 $ ./MAKEALL EVB64260 P3G4 ZUMA
31 Configuring for EVB64260 board...
32 mpsc.c: In function 'mpsc_putchar_early':
33 mpsc.c:121: warning: dereferencing type-punned pointer will break strict-aliasing rules
34 mpsc.c:127: warning: dereferencing type-punned pointer will break strict-aliasing rules
35 ...
36
37 Signed-off-by: Anatolij Gustschin <agust@denx.de>
38
39commit 9fb3b5085787baad8a133e347ad12c5b3a022e98
40Author: Sergei Shtylyov <sshtylyov@ru.mvista.com>
41Date: Mon Jun 28 22:44:49 2010 +0400
42
43 EHCI: zero out QH transfer overlay in ehci_submit_async()
44
45 ehci_submit_async() doesn't really zero out the QH transfer overlay (as the EHCI
46 specification suggests) which leads to the controller seeing the "token" field
47 as the previous call has left it, i.e.:
48 - if a timeout occured on the previous call (Active bit left as 1), controller
49 incorrectly tries to complete a previous transaction on a newly programmed
50 endpoint;
51 - if a halt occured on the previous call (Halted bit set to 1), controller just
52 ignores the newly programmed TD(s) and the function then keeps returning error
53 ad infinitum.
54
55 This turned out to be caused by the wrong orger of the arguments to the memset()
56 call in ehci_alloc(), so the allocated TDs weren't cleared either.
57
58 While at it, stop needlessly initializing the alternate next TD pointer in the
59 QH transfer overlay...
60
61 Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
62 Acked-by: Remy Bohmer <linux@bohmer.net>
63
64commit 0d7f4abcf6bbef06504c82e03f11054468262430
65Author: Remy Bohmer <linux@bohmer.net>
66Date: Thu Jun 17 21:17:08 2010 +0200
67
68 Fix console_buffer size conflict error.
69
70 The console_buffer size is declared in common/main.c as
71 -- char console_buffer[CONFIG_SYS_CBSIZE + 1];
72 so this extern definition is wrong.
73
74 Signed-off-by: Remy Bohmer <linux@bohmer.net>
75
76commit 38c38c344c200ee90cfd243671473c449b6f0815
77Author: Poonam Aggrwal <poonam.aggrwal@freescale.com>
78Date: Tue Jun 22 12:50:46 2010 +0530
79
80 85xx/p1_p2_rdb: Added RevD board version support
81
82 - Also modified the code to use io accessors.
83
84 Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
85 Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
86 Acked-by: Kumar Gala <galak@kernel.crashing.org>
87
88commit c987f4753b0afadb38acd7e61df7ba11e8a0203f
89Author: Felix Radensky <felix@embedded-sol.com>
90Date: Mon Jun 28 01:57:39 2010 +0300
91
92 tsec: Fix eTSEC2 link problem on P2020RDB
93
94 On P2020RDB eTSEC2 is connected to Vitesse VSC8221 PHY via SGMII.
95 Current TBI PHY settings for SGMII mode cause link problems on
96 this platform, link never comes up.
97
98 Fix this by making TBI PHY settings configurable and add a working
99 configuration for P2020RDB.
100
101 Signed-off-by: Felix Radensky <felix@embedded-sol.com>
102 Acked-by: Andy Fleming <afleming@freescale.com>
103 Acked-by: Peter Tyser <ptyser@xes-inc.com>
104 Tested-by: Peter Tyser <ptyser@xes-inc.com>
105
106commit d3bee08332fbc9cc5b6dc22ecd34050a85d44d0a
107Author: Poonam Aggrwal <poonam.aggrwal@freescale.com>
108Date: Wed Jun 23 19:32:28 2010 +0530
109
110 85xx/p1_p2_rdb: Modify the CLK_CTRL value for DDR at 667MHz
111
112 Use a slighly larger value of CLK_CTRL for DDR at 667MHz
113 which fixes random crashes while linux booting.
114
115 Applicable for both NAND and NOR boot.
116
117 Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
118 Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
119 Acked-by: Andy Fleming <afleming@freescale.com>
120
121commit cdc6363f423900645265563d705a0a5a964ae40c
122Author: Poonam Aggrwal <poonam.aggrwal@freescale.com>
123Date: Wed Jun 23 19:42:07 2010 +0530
124
125 85xx/p1_p2_rdb: not able to modify "$bootfile" environment variable
126
127 Because the variable was getting defined twice.
128
129 Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
130 Acked-by: Andy Fleming <afleming@freescale.com>
131
132commit 4ccd5510e50b5675227a1fe0e5ca099d333f637d
133Author: Wolfgang Denk <wd@denx.de>
134Date: Tue Jun 29 01:33:35 2010 +0200
135
136 MPC512x: workaround data corruption for unaligned local bus accesses
137
138 Commit 460c2ce3 "MPC5200: workaround data corruption for unaligned
139 local bus accesses" fixed the problem for MPC5200 only, but MPC512x is
140 affected as well, so apply the same fix here, too.
141
142 Signed-off-by: Wolfgang Denk <wd@denx.de>
143 Cc: Detlev Zundel <dzu@denx.de>
144 Cc: Anatolij Gustschin <agust@denx.de>
145 Acked-by: Detlev Zundel <dzu@denx.de>
146
147commit 482126e27b3dbf0e69a6445da8b94b3551adf05d
148Author: Wolfgang Denk <wd@denx.de>
149Date: Wed Jun 23 20:50:54 2010 +0200
150
151 Prepare v2010.06-rc3
152
153 Signed-off-by: Wolfgang Denk <wd@denx.de>
154
482126e2
WD
155commit 460c2ce362e56890c2a029e2c3b1ff2796c7fc54
156Author: Wolfgang Denk <wd@denx.de>
157Date: Mon Jun 21 22:29:59 2010 +0200
158
159 MPC5200: workaround data corruption for unaligned local bus accesses
160
161 The MPC5200 has a nasty problem that will cause silent data corruption
162 when performing unaligned 16 or 32 byte accesses when reading from the
163 local bus - typically this affects reading from flash. The problem can
164 be easily shown:
165
166 => md fc0c0000 10
167 fc0c0000: 323e4337 01626f6f 74636d64 3d72756e 2>C7.bootcmd=run
168 fc0c0010: 206e6574 5f6e6673 00626f6f 7464656c net_nfs.bootdel
169 fc0c0020: 61793d35 00626175 64726174 653d3131 ay=5.baudrate=11
170 fc0c0030: 35323030 00707265 626f6f74 3d656368 5200.preboot=ech
171 => md fc0c0001 10
172 fc0c0001: 65636801 00000074 0000003d 00000020 ech....t...=...
173 fc0c0011: 0000005f 00000000 00000074 00000061 ..._.......t...a
174 fc0c0021: 00000000 00000064 00000065 00000035 .......d...e...5
175 fc0c0031: 00000000 00000062 0000003d 0000006f .......b...=...o
176 => md.w fc0c0001 10
177 fc0c0001: 0000 3701 0000 6f74 0000 643d 0000 6e20 ..7...ot..d=..n
178 fc0c0011: 0000 745f 0000 7300 0000 6f74 0000 6c61 ..t_..s...ot..la
179
180 This commit implements a workaround at least for the most blatant
181 problem: using memcpy() from NOR flash. We rename the assembler
182 routine into __memcpy() and provide a wrapper, which will use a
183 byte-wise copy loop for unaligned source or target addresses when
184 reading from NOR flash, and branch to the optimized __memcpy()
185 in all other cases, thus minimizing the performance impact.
186
187 Tested on lite5200b and TQM5200S.
188
189 Signed-off-by: Wolfgang Denk <wd@denx.de>
190 Cc: Detlev Zundel <dzu@denx.de>
191
192commit 47ea6edfb3004fb2d2a979e19c3f6e4e32f45e51
193Author: Minkyu Kang <mk7.kang@samsung.com>
194Date: Fri Jun 18 19:31:10 2010 +0900
195
196 ARM: remove unused VIDEOLFB ATAG
197
198 ATAG_VIDEOLFB is not used anywhere.
199 The belowing warning is occurred due to this ATAG.
200
201 [ 0.000000] Ignoring unrecognised tag 0x54410008
202
203 This patch fixed it.
204
205 Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
206 Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
207 Acked-by: Martin Krause <Martin.Krause@tqs.de>
208
209commit ceeba0030844b2e84ce4e47f4be7ad347cd1e827
210Author: Peter Horton <zero@colonel-panic.org>
211Date: Sat Jun 12 10:11:56 2010 +0900
212
213 UBI: initialise update marker
214
215 UBI: initialise update marker
216
217 The in kernel copy of a volume's update marker is not initialised from the
218 volume table. This means that volumes where an update was unfinnished will
219 not be treated as "forbidden to use". This is basically that the update
220 functionality was broken.
221
222 Signed-off-by: Peter Horton <zero@colonel-panic.org>
223 Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
224 Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
225 Acked-by: Stefan Roese <sr@denx.de>
226
227commit b8c4eea56b5f41f9bdbb89d3d5c79b7d282d513c
228Author: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
229Date: Wed Apr 14 15:32:06 2010 +0200
230
231 remove myself as a maintainer of several ARM boards
232
233 Since I haven't been actively maintaining these boards for a long while,
234 keeping myself as their maintainer makes no sense.
235
236 Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
237
238commit d6b937142008463d628ef26a753f9c20c57f3617
239Author: Ilya Yanok <yanok@emcraft.com>
240Date: Mon Jun 21 18:13:21 2010 +0400
241
242 Makefile: always call date with LC_ALL=C set
243
244 Ensure that date is called only with LC_ALL=C locale set to make dates
245 locale neutral thus preventing lurking of non-ASCII characters into
246 U-Boot binary.
247
248 Signed-off-by: Ilya Yanok <yanok@emcraft.com>
249
250 Changed LANG= into LC_ALL= as suggested by Mike Frysinger <vapier@gentoo.org>
251 Signed-off-by: Wolfgang Denk <wd@denx.de>
252
253commit 23fdf0580660edf38cb7118f05b8865f2f73c674
254Author: Albert Aribaud <[albert.aribaud@free.fr]>
255Date: Tue Jun 22 15:50:28 2010 +0530
256
257 Fix wrong orion5x MPP and GIPO writel arguments
258
259 Orion5x MPP and GPIO setting code had writel arguments
260 the wrong way around. Fixed and tested.
261
262 Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
263
264commit 95bc39e848dd3f741a064c826d1c282c48125d41
265Author: Terry Lv <r65388@freescale.com>
266Date: Thu May 6 18:30:55 2010 +0800
267
268 ARM: fix bug in macro __arch_ioremap.
269
270 Signed-off-by: Terry Lv <r65388@freescale.com>
271
272 Fix commit message and code formatting.
273
274 Signed-off-by: Wolfgang Denk <wd@denx.de>
275
276commit a71da1b6c96205549ca2e7cf991e2340181bbfcf
277Author: Vitaly Kuzmichev <vkuzmichev@mvista.com>
278Date: Tue Jun 15 22:18:11 2010 +0400
279
280 ARM: Align stack to 8 bytes
281
282 The ARM ABI requires that the stack be aligned to 8 bytes as it is noted
283 in Procedure Call Standard for the ARM Architecture:
284 http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042d/index.html
285
286 Unaligned SP also causes the problem with variable-length arrays
287 allocation when VLA address becomes less than stack pointer during
288 aligning of this address, so the next 'push' in the stack overwrites
289 first 4 bytes of VLA.
290
291 Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
292
293 Tested on tx25(mx25), imx27lite(mx27), qong(mx31) and trab(s3c2400)
294 Tested-by: Wolfgang Denk <wd@denx.de>
295
296commit 6de27bdc788e7c4532ee0721ae291aeb5df475dc
297Author: Wolfgang Denk <wd@denx.de>
298Date: Sun Jun 20 12:32:37 2010 +0200
299
300 net/eth.c: eth_mac_skip() is only needed when CONFIG_NET_MULTI is set
301
302 Move it inside the #ifdef CONFIG_NET_MULTI to avoid
303
304 eth.c:64: warning: 'eth_mac_skip' defined but not used
305
306 messages from a number of old, non-CONFIG_NET_MULTI boards.
307
308 Signed-off-by: Wolfgang Denk <wd@denx.de>
309 Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
310
311commit e397e59e861aa818cda12a23206dde06f7e9f660
312Author: Fillod Stephane <stephane.fillod@grassvalley.com>
313Date: Fri Jun 11 19:26:43 2010 +0200
314
315 ip/defrag: fix processing of last short fragment
316
317 TFTP'ing a file of size 1747851 bytes with CONFIG_IP_DEFRAG and
318 CONFIG_TFTP_BLOCKSIZE set to 4096 fails with a timeout, because
319 the last fragment is not taken into account. This patch fixes
320 IP fragments having less than 8 bytes of payload.
321
322 Signed-off-by: Stephane Fillod <stephane.fillod@grassvalley.com>
323 Acked-by: Alessandro Rubini <rubini@gnudd.com>
324 Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
325
326commit 9c00b2f0a3fe0f779761607024f99b7690c9776c
327Author: Wolfgang Denk <wd@denx.de>
328Date: Sun Jun 20 12:30:22 2010 +0200
329
330 net/eth.c: eth_mac_skip() is only needed when CONFIG_NET_MULTI is set
331
332 Move it inside the #ifdef CONFIG_NET_MULTI to avoid
333
334 eth.c:64: warning: 'eth_mac_skip' defined but not used
335
336 messages from anumber of old, non-CONFIG_NET_MULTI boards.
337
338 Signed-off-by: Wolfgang Denk <wd@denx.de>
339 Cc: Ben Warren <biggerbadderben@gmail.com>
340
341commit 9312bba01a41191f20821b66b84b3ff1d2902e8a
342Author: Wolfgang Denk <wd@denx.de>
343Date: Sun Jun 20 02:16:44 2010 +0200
344
345 include/compiler.h: remove redundant declaration of errno
346
347 Commit 37566090 "compiler.h: unify system ifdef cruft here" added both
348 a "#include <errno.h>" and a "extern int errno;" to include/compiler.h
349 which is causing build warnings for some systems, for example for the
350 "netstar" board:
351
352 In file included from /home/wd/git/u-boot/work/lib/crc32.c:15:
353 include/compiler.h:28: warning: function declaration isn't a prototype
354
355 The declaration of "errno" should be redundant, as <errno.h> is
356 supposed to provide a correct declaration, so drop it.
357
358 Signed-off-by: Wolfgang Denk <wd@denx.de>
359 Cc: Mike Frysinger <vapier@gentoo.org>
360
361commit cd040a4953e55efe89dc3af4acf0302d5923026f
362Author: Wolfgang Denk <wd@denx.de>
363Date: Fri Jun 18 15:55:15 2010 +0200
364
365 arch/arm/cpu/arm_cortexa8/omap3/cache.S: make build with older tools
366
367 The push / pop instructions used in this file are available only with
368 more recent tool chains:
369
370 cache.S: Assembler messages:
371 cache.S:133: Error: bad instruction `push {r0,r1,r2,lr}'
372 cache.S:160: Error: bad instruction `pop {r1,r2,r3,pc}'
373 cache.S:164: Error: bad instruction `push {r0,r1,r2,lr}'
374 cache.S:191: Error: bad instruction `pop {r1,r2,r3,pc}'
375
376 Change push/pop into stmfd/ldmfd instructions to support older
377 versions of binutils as well.
378
379 I verified that the modified source code generates exactly the same
380 binary code.
381
382 Signed-off-by: Wolfgang Denk <wd@denx.de>
383 Cc: Sandeep Paulraj <s-paulraj@ti.com>
384 Cc: Tom Rix <tom@bumblecow.com>
385
386commit ce9c227cc71afc3b4c78dcc0a565c40d4ad943e4
387Author: Albert Aribaud <[albert.aribaud@free.fr]>
388Date: Thu Jun 17 19:38:21 2010 +0530
389
390 Add support for the LaCie ED Mini V2 board
391
392 This patch adds support for the LaCie ED Mini V2 product
393 which is based on the Marvell Orion5x SoC.
394
395 Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
396
397commit 83142c112d30ee3da23b62387909d33db064bdc4
398Author: Albert Aribaud <[albert.aribaud@free.fr]>
399Date: Thu Jun 17 19:37:01 2010 +0530
400
401 Add Orion5x support to 16550 device driver
402
403 This patch provides access to the 16550-compatible
404 serial device of the Orion5x SoC.
405
406 Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
407
408commit 0c61e6f9257ef416959b740ee3cf191bf682007d
409Author: Albert Aribaud <[albert.aribaud@free.fr]>
410Date: Thu Jun 17 19:36:07 2010 +0530
411
412 Initial support for Marvell Orion5x SoC
413
414 This patch adds support for the Marvell Orion5x SoC.
415 It has no use alone, and must be followed by a patch
416 to add Orion5x support for serial, then support for
417 the ED Mini V2, an Orion5x-based product from LaCie.
418
419 Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
420
421commit 376e7fadbad3285231e390c6534feb5af86d594b
422Author: Minkyu Kang <mk7.kang@samsung.com>
423Date: Tue Jun 8 14:40:47 2010 +0900
424
425 SAMSUNG: goni: add the GPL licence
426
427 Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
428 Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
429 Acked-by: Tom <Tom@bumblecow.com>
430
431commit c474a8ebb880e564df0c701c6a8cf73b7779b1d2
432Author: Minkyu Kang <mk7.kang@samsung.com>
433Date: Mon May 31 22:02:42 2010 +0900
434
435 s5pc1xx: Add support for Samsung Goni board
436
437 This patch adds support for the Samsung Goni board (S5PC110 SoC)
438
439 Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
440 Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
441
442commit ffb4b02554d9972d66502efbe97b3933620c8a31
443Author: Minkyu Kang <mk7.kang@samsung.com>
444Date: Fri May 28 12:34:29 2010 +0900
445
446 s5pc1xx: gpio: bug fix at gpio_set_pull function
447
448 When set to PULL_NONE, gpio_set_pull function is returned without write the register.
449 This patch fixed it.
450
451 Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
452
453commit a9046b9e1aeeedc66ddf1d00474ad0ce8c6aa6e4
454Author: Wolfgang Denk <wd@denx.de>
455Date: Sun Jun 13 17:48:15 2010 +0200
456
457 Prepare v2010-rc2
458
459 Signed-off-by: Wolfgang Denk <wd@denx.de>
460
461commit 3a96ad851f4f9267e1199b700cb838a77334e4b2
462Author: Marek Vasut <marek.vasut@gmail.com>
463Date: Sun Apr 11 08:53:55 2010 +0200
464
465 PXA: Align stack to 8 bytes
466
467 Part of this patch is by: Mikhail Kshevetskiy.
468
469 Stack must be aligned to 8 bytes on PXA (possibly all armv5te) for LDRD/STRD
470 instructions. In case LDRD/STRD is issued on an unaligned address, the behaviour
471 is undefined.
472
473 The issue was observed when working with the NAND code, which was rendered
474 disfunctional. Also, the vsprintf() function had serious problems with printing
475 64bit wide long longs. After aligning the stack, this wrong behaviour is no
476 longer present.
477
478 Tested on:
479 Marvell Littleton PXA310 board
480 Toradex Colibri PXA320 board
481 Aeronix Zipit Z2 PXA270 handheld
482 Voipac PXA270 board
483
484 Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
485
486commit 89b765c7f6ddfde07ba673dd4adbeb5da391a81b
487Author: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
488Date: Thu Jun 10 15:18:15 2010 +0530
489
490 TI: DaVinci: Add board specific code for da850 EVM
491
492 Provides initial support for TI OMAP-L138/DA850 SoC devices on
493 a Logic PD EVM board.
494
495 Provides:
496 Initial boot and configuration.
497 Support for i2c.
498 UART support (console).
499
500 Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
501 Acked-by: Ben Gardiner <bengardiner@nanometrics.ca>
502 Reviewed-by: Wolfgang Denk <wd@denx.de>
503 Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
504
505commit 158557001afe167dcb848bb14ba0f2f20aeb25a1
506Author: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
507Date: Tue Jun 8 11:01:58 2010 +0530
508
509 TI: DaVinci: Prepare for da850 support
510
511 DA850/OMAP-L138 is a new SoC from Texas Instruments
512 (http://focus.ti.com/docs/prod/folders/print/omap-l138.html).
513 This SoC is similar to DA830/OMAP-L137 in many aspects. Hence
514 rename the da830 specific files and folders to da8xx to
515 accommodate DA850/OMAP-L138.
516
517 Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
518 Acked-by: Ben Gardiner <bengardiner@nanometrics.ca>
519 Reviewed-by: Wolfgang Denk <wd@denx.de>
520 Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
521
522commit 9d79956029ec379e7137948ba3a7debbea61325f
523Author: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
524Date: Mon Jun 7 12:39:59 2010 +0530
525
526 da830: Move common code out of da830evm.c file
527
528 TI's DA850/OMAP-L138 platform is similar to DA830/OMAP-L137
529 in many aspects. So instead of repeating the same code in
530 multiple files, move the common code to a different file
531 and call those functions from the respective da830/da850
532 files.
533
534 Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
535 Acked-by: Nick Thompson <nick.thompson@ge.com>
536 Acked-by: Ben Gardiner <bengardiner@nanometrics.ca>
537 Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
538
539commit 5246d01edd8935e04cdf79a5b9a03874509a31b1
540Author: Grazvydas Ignotas <notasas@gmail.com>
541Date: Tue Jun 8 17:19:22 2010 -0400
542
543 OMAP3: pandora: enable battery backup capacitor
544
545 Pandora has a capacitor connected as backup battery, which allows
546 retaining RTC for some time while main battery is removed. Enable backup
547 battery charge function to charge that capacitor.
548
549 Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
550 Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
551
552commit 9268236529161312c877e638a14c011fd3c883e1
553Author: Delio Brignoli <dbrignoli@audioscience.com>
554Date: Mon Jun 7 17:16:13 2010 -0400
555
556 DaVinci: Improve DaVinci SPI speed.
557
558 I have updated this patch based on the comments [1] by Wolfgang Denk and
559 removed unused variables.
560 [1][http://lists.denx.de/pipermail/u-boot/2010-May/071728.html]
561
562 Reduce the number of reads per byte transferred on the BUF register from 2 to 1 and
563 take advantage of the TX buffer in the SPI module. On LogicPD OMAP-L138 EVM,
564 SPI read throughput goes up from ~0.8Mbyte/s to ~1.3Mbyte/s. Tested with a 2Mbyte image file.
565 Remove unused variables in the spi_xfer() function.
566
567 Signed-off-by: Delio Brignoli <dbrignoli@audioscience.com>
568 Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
569 Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
570
571commit 1a5038ca6831e31875cf67c46226f04743574032
572Author: Vaibhav Hiremath <hvaibhav@ti.com>
573Date: Mon Jun 7 15:20:53 2010 -0400
574
575 AM35x: Add support for EMIF4
576
577 This patch adds support for the EMIF4 interface
578 available in the AM35x processors.
579
580 Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
581 Signed-off-by: Sanjeev Premi <premi@ti.com>
582 Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
583
584commit ed01e45cfa20d60ee83a4ee0128d843730055294
585Author: Vaibhav Hiremath <hvaibhav@ti.com>
586Date: Mon Jun 7 15:20:43 2010 -0400
587
588 AM35x: Add support for AM3517EVM
589
590 This patch adds basic support for the AM3517EVM.
591 It includes:
592 - Board files (.c and .h)
593 - Default configuration file
594 - Updates for Makefile
595
596 Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
597 Signed-off-by: Sanjeev Premi <premi@ti.com>
598 Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
599
600commit cae377b59a179e34d27cd6b79dee24d967de839c
601Author: Vaibhav Hiremath <hvaibhav@ti.com>
602Date: Mon Jun 7 15:20:34 2010 -0400
603
604 omap3: Consolidate SDRC related operations
605
606 Consolidated SDRC related functions into one file - sdrc.c
607
608 And also replaced sdrc_init with generic memory init
609 function (mem_init), this generalization of omap memory setup
610 is necessary to support the new emif4 interface introduced in AM3517.
611
612 Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
613 Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
614
615commit d11212e3772c8fe43a1f487bbf58f3341118a241
616Author: Vaibhav Hiremath <hvaibhav@ti.com>
617Date: Mon Jun 7 15:20:29 2010 -0400
618
619 omap3: Calculate CS1 size only when SDRC is
620
621 initialized for CS1
622
623 From: Vaibhav Hiremath <hvaibhav@ti.com>
624
625 The patch makes sure that size for SDRC CS1 gets calculated
626 only when the CS1 SDRC is initialized.
627
628 Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
629 Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
630
631commit 675e0eaf0f0429aac3c6fb41634fbcea2350fe49
632Author: Vaibhav Hiremath <hvaibhav@ti.com>
633Date: Mon Jun 7 15:20:19 2010 -0400
634
635 OMAP3EVM: Added NAND support
636
637 The EVMS have been shipping with NAND (instead of OneNAND) as default.
638 So, this patch sets NAND as default.
639
640 To choose OneNAND, define CMD_ONENAND instead of CMD_NAND in the
641 config file omap3_evm.h.
642
643 Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
644 Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
645
646commit 5cc48f7e55df0d74a12d338de2117f05951fc536
647Author: Cyril Chemparathy <cyril@ti.com>
648Date: Mon Jun 7 14:13:36 2010 -0400
649
650 TI: TNETV107X EVM initial support
651
652 TNETV107X is a Texas Instruments SoC based on an ARM1176 core, and with a
653 bunch on on-chip integrated peripherals. This patch adds support for the
654 TNETV107X EVM board.
655
656 Signed-off-by: Cyril Chemparathy <cyril@ti.com>
657 Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
658
659commit 3712367c4830e87b4e7af5b480e82d316bab1251
660Author: Cyril Chemparathy <cyril@ti.com>
661Date: Mon Jun 7 14:13:32 2010 -0400
662
663 ARM1176: TI: TNETV107X soc initial support
664
665 TNETV107X is a Texas Instruments SoC based on an ARM1176 core, and with a
666 bunch on on-chip integrated peripherals. This is an initial commit with
667 basic functionality, more commits with drivers, etc. to follow.
668
669 Signed-off-by: Cyril Chemparathy <cyril@ti.com>
670 Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
671
672commit 678e008c3a3a27fe2d30cf423679d2d11d0fa5c2
673Author: Cyril Chemparathy <cyril@ti.com>
674Date: Mon Jun 7 14:13:27 2010 -0400
675
676 ARM1176: Coexist with other ARM1176 platforms
677
678 The current ARM1176 CPU specific code is too specific to the SMDK6400
679 architecture. The following changes were necessary prerequisites for the
680 addition of other SoCs based on ARM1176.
681
682 Existing board's (SMDK6400) configuration has been modified to keep behavior
683 unchanged despite these changes.
684
685 1. Peripheral port remap configurability
686 The earlier code had hardcoded remap values specific to s3c64xx in start.S.
687 This change makes the peripheral port remap addresses and sizes configurable.
688
689 2. U-Boot code relocation support
690 Most architectures allow u-boot code to run initially at a different
691 address (possibly in NOR) and then get relocated to its final resting place
692 in RAM. Added support for this capability in ARM1176 architecture.
693
694 3. Disable TCM if necessary
695 If a ROM based bootloader happened to have initialized TCM, we disable it here
696 to keep things sane.
697
698 4. Remove unnecessary SoC specific includes
699 ARM1176 code does not really need this SoC specific include. The presence
700 of this include prevents builds on other ARM1176 archs.
701
702 5. Modified virt-to-phys conversion during MMU disable
703 The original MMU disable code masks out too many bits from the load address
704 when it tries to figure out the physical address of the jump target label.
705 Consequently, it ends up branching to the wrong address after disabling the
706 MMU.
707
708 Signed-off-by: Cyril Chemparathy <cyril@ti.com>
709 Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
710
711commit 23911740486c59851df57521c49bfd81ce1865ec
712Author: Delio Brignoli <dbrignoli@audioscience.com>
713Date: Mon Jun 7 17:16:13 2010 -0400
714
715 DaVinci: Improve DaVinci SPI speed.
716
717 I have updated this patch based on the comments [1] by Wolfgang Denk and
718 removed unused variables.
719 [1][http://lists.denx.de/pipermail/u-boot/2010-May/071728.html]
720
721 Reduce the number of reads per byte transferred on the BUF register from 2 to 1 and
722 take advantage of the TX buffer in the SPI module. On LogicPD OMAP-L138 EVM,
723 SPI read throughput goes up from ~0.8Mbyte/s to ~1.3Mbyte/s. Tested with a 2Mbyte image file.
724 Remove unused variables in the spi_xfer() function.
725
726 Signed-off-by: Delio Brignoli <dbrignoli@audioscience.com>
727 Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
728 Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
729
730commit 05ee415e316e3b1617aba06a747649f4d4053d41
731Author: Vaibhav Hiremath <hvaibhav@ti.com>
732Date: Mon Jun 7 15:20:53 2010 -0400
733
734 AM35x: Add support for EMIF4
735
736 This patch adds support for the EMIF4 interface
737 available in the AM35x processors.
738
739 Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
740 Signed-off-by: Sanjeev Premi <premi@ti.com>
741 Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
742
743commit 3d9f0ffddaf1ece95a826785b971860ebdadf424
744Author: Vaibhav Hiremath <hvaibhav@ti.com>
745Date: Mon Jun 7 15:20:43 2010 -0400
746
747 AM35x: Add support for AM3517EVM
748
749 This patch adds basic support for the AM3517EVM.
750 It includes:
751 - Board files (.c and .h)
752 - Default configuration file
753 - Updates for Makefile
754
755 Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
756 Signed-off-by: Sanjeev Premi <premi@ti.com>
757 Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
758
759commit 8aa5c7cdc4e534df9129485ba317a2871c4f9880
760Author: Vaibhav Hiremath <hvaibhav@ti.com>
761Date: Mon Jun 7 15:20:34 2010 -0400
762
763 omap3: Consolidate SDRC related operations
764
765 Consolidated SDRC related functions into one file - sdrc.c
766
767 And also replaced sdrc_init with generic memory init
768 function (mem_init), this generalization of omap memory setup
769 is necessary to support the new emif4 interface introduced in AM3517.
770
771 Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
772 Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
773
774commit 16807ee411d83762804d075a3fe11f0a2b5eaf39
775Author: Vaibhav Hiremath <hvaibhav@ti.com>
776Date: Mon Jun 7 15:20:29 2010 -0400
777
778 omap3: Calculate CS1 size only when SDRC is
779
780 initialized for CS1
781
782 From: Vaibhav Hiremath <hvaibhav@ti.com>
783
784 The patch makes sure that size for SDRC CS1 gets calculated
785 only when the CS1 SDRC is initialized.
786
787 Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
788 Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
789
790commit 7ca4766bd7f74e5f7371fb331b573ec384230c1d
791Author: Vaibhav Hiremath <hvaibhav@ti.com>
792Date: Mon Jun 7 15:20:19 2010 -0400
793
794 OMAP3EVM: Added NAND support
795
796 The EVMS have been shipping with NAND (instead of OneNAND) as default.
797 So, this patch sets NAND as default.
798
799 To choose OneNAND, define CMD_ONENAND instead of CMD_NAND in the
800 config file omap3_evm.h.
801
802 Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
803 Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
804
805commit 04cbc19fedb55265d08cddea294c3b6d9f8b2d18
806Author: Cyril Chemparathy <cyril@ti.com>
807Date: Mon Jun 7 14:13:36 2010 -0400
808
809 TI: TNETV107X EVM initial support
810
811 TNETV107X is a Texas Instruments SoC based on an ARM1176 core, and with a
812 bunch on on-chip integrated peripherals. This patch adds support for the
813 TNETV107X EVM board.
814
815 Signed-off-by: Cyril Chemparathy <cyril@ti.com>
816 Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
817
818commit da1ec42aafcc821ce6b5d316a2d4105292960d6b
819Author: Cyril Chemparathy <cyril@ti.com>
820Date: Mon Jun 7 14:13:32 2010 -0400
821
822 ARM1176: TI: TNETV107X soc initial support
823
824 TNETV107X is a Texas Instruments SoC based on an ARM1176 core, and with a
825 bunch on on-chip integrated peripherals. This is an initial commit with
826 basic functionality, more commits with drivers, etc. to follow.
827
828 Signed-off-by: Cyril Chemparathy <cyril@ti.com>
829 Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
830
831commit b87996d24a41cfc15fea125e5c805163af4acba1
832Author: Cyril Chemparathy <cyril@ti.com>
833Date: Mon Jun 7 14:13:27 2010 -0400
834
835 ARM1176: Coexist with other ARM1176 platforms
836
837 The current ARM1176 CPU specific code is too specific to the SMDK6400
838 architecture. The following changes were necessary prerequisites for the
839 addition of other SoCs based on ARM1176.
840
841 Existing board's (SMDK6400) configuration has been modified to keep behavior
842 unchanged despite these changes.
843
844 1. Peripheral port remap configurability
845 The earlier code had hardcoded remap values specific to s3c64xx in start.S.
846 This change makes the peripheral port remap addresses and sizes configurable.
847
848 2. U-Boot code relocation support
849 Most architectures allow u-boot code to run initially at a different
850 address (possibly in NOR) and then get relocated to its final resting place
851 in RAM. Added support for this capability in ARM1176 architecture.
852
853 3. Disable TCM if necessary
854 If a ROM based bootloader happened to have initialized TCM, we disable it here
855 to keep things sane.
856
857 4. Remove unnecessary SoC specific includes
858 ARM1176 code does not really need this SoC specific include. The presence
859 of this include prevents builds on other ARM1176 archs.
860
861 5. Modified virt-to-phys conversion during MMU disable
862 The original MMU disable code masks out too many bits from the load address
863 when it tries to figure out the physical address of the jump target label.
864 Consequently, it ends up branching to the wrong address after disabling the
865 MMU.
866
867 Signed-off-by: Cyril Chemparathy <cyril@ti.com>
868 Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
869
870commit b5d289fc29842095d5cd0f82cceab1b0b2e824ba
871Author: Asen Dimov <dimov@ronetix.at>
872Date: Tue Apr 20 22:49:04 2010 +0300
873
874 add new board pm9g45
875
876 Add the new board PM9G45 from Ronetix GmbH.
877 * AT91SAM9G45 MCU at 400Mhz.
878 * 128MB DDR2 SDRAM
879 * 256MB NAND
880 * 10/100 MBits Ethernet DP83848
881 * Serial number chip DS2401
882
883 The board is made as SODIMM200 module.
884 For more info www.ronatix.at or info@ronetix.at.
885
886 Signed-off-by: Asen Dimov <dimov@ronetix.at>
887
a9046b9e
WD
888commit f986325dd569faeaec4186f678d113505c5c4828
889Author: Ron Madrid <ron_madrid@sbcglobal.net>
890Date: Tue Jun 1 17:00:49 2010 -0700
891
892 Update SICRL_USBDR to reflect 4 different settings
893
894 This patch changed the SICRL_USBDR define to reflect the 4 different bit
895 settings for this two-bit field. The four different options are '00', '01',
896 '10', and '11'. This patch also corrects the config file for SIMPC8313 and
897 MPC8313ERDB for the appropriate fields. This change only affects the MPC8313
898 cpu.
899
900 Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
901 Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
902
482126e2
WD
903commit 409a07c9d72b0d833c1cce264bdb4bb2628fe28e
904Author: George G. Davis <gdavis@mvista.com>
905Date: Tue May 11 10:15:36 2010 -0400
906
907 ARM1136: Fix cache_flush() error and correct cpu_init_crit() comments
908
909 The ARM1136 cache_flush() function uses the "mcr p15, 0, rn, c7, c7, 0"
910 instruction which means "Invalidate Both Caches" when in fact the intent
911 is to clean and invalidate all caches. So add an "mcr p15, 0, %0, c7,
912 c10, 0" instruction to "Clean Entire Data Cache" prior to the "Invalidate
913 Both Caches" instruction to insure that memory is consistent with any
914 dirty cache lines.
915
916 Also fix a couple of "flush v*" comments in ARM1136 cpu_init_crit() so
917 that they correctly describe the actual ARM1136 CP15 C7 Cache Operations
918 used.
919
920 Signed-off-by: George G. Davis <gdavis@mvista.com>
921
a9046b9e
WD
922commit 3057c6be5efda781a72ca04432e0a4ed6e670030
923Author: Kim Phillips <kim.phillips@freescale.com>
924Date: Fri Apr 23 12:20:11 2010 -0500
925
926 fdt_support: add entry for sec3.1 and fix sec3.3
927
928 Add sec3.1 h/w geometry for fdt node fixups.
929
930 Also, technically, whilst SEC v3.3 h/w honours the tls_ssl_stream descriptor
931 type, it lacks the ARC4 algorithm execution unit required to be able
932 to execute anything meaningful with it. Change the node to agree with
933 the documentation that declares that the sec3.3 really doesn't have such
934 a descriptor type.
935
936 Reported-by: Haiying Wang <Haiying.Wang@freescale.com>
937 Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
938 Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
939
940commit 5f4d36825a028e300b7d56a566d2cf84418b7a68
941Author: Timur Tabi <timur@freescale.com>
942Date: Thu May 20 11:16:16 2010 -0500
943
944 fsl: rename 'dma' to 'brdcfg1' in the ngPIXIS structure
945
946 The ngPIXIS is a board-specific FPGA, but the definition of the registers
947 is mostly consistent. On boards where it matter, register 9 is called
948 'brdcfg1' instead of 'dma', so rename the variable in the ngpixis_t
949 definition.
950
951 Signed-off-by: Timur Tabi <timur@freescale.com>
952 Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
953
954commit 6e37a044076896ba88b0d6316fadd492032c5193
955Author: Timur Tabi <timur@freescale.com>
956Date: Thu May 20 12:45:39 2010 -0500
957
958 fsl/85xx: add clkdvdr and pmuxcr2 to global utilities structure definition
959
960 Add the 'clkdvdr' and 'pmuxcr2' registers to the 85xx definition of
961 struct ccsr_gur.
962
963 Signed-off-by: Timur Tabi <timur@freescale.com>
964 Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
965
966commit 39c209546ab5b11ca6410c5cc57dcbf457e50800
967Author: Tom <Tom@bumblecow.com>
968Date: Fri May 28 13:23:16 2010 -0500
969
970 ARM Update mach-types
971
972 Fetched from http://www.arm.linux.org.uk/developer/machines/download.php
973 And built with
974
975 repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
976 commit 3defb2476166445982a90c12d33f8947e75476c4
977
978 Signed-off-by: Tom <Tom@bumblecow.com>
979
980commit 551bd947bd6f982fa38dde840576eba52346160c
981Author: Tom <Tom@bumblecow.com>
982Date: Sun May 9 16:58:11 2010 -0500
983
984 ARM Update mach-types
985
986 Fetched from http://www.arm.linux.org.uk/developer/machines/download.php
987 And built with
988
989 repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
990 commit 257dab81413b31b8648becfe11586b3a41e5c29a
991
992 Signed-off-by: Tom <Tom@bumblecow.com>
993
994commit 1117cbf2adac59050af1751af6c6a524afa5c3ef
995Author: Thomas Chou <thomas@wytron.com.tw>
996Date: Fri May 28 10:56:50 2010 +0800
997
998 nios: remove nios-32 arch
999
1000 The nios-32 arch is obsolete and broken. So it is removed.
1001
1002 Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
1003
1004commit 6803336c9f21ba428f5c1b1cf825bbbac0a762e5
1005Author: Thomas Chou <thomas@wytron.com.tw>
1006Date: Fri May 21 11:08:02 2010 +0800
1007
1008 nios2: allow STANDALONE_LOAD_ADDR overriding
1009
1010 This patch allows users to override default STANDALONE_LOAD_ADDR.
1011 The gcclibdir path was duplicated in the standalone Makefile and
1012 can be removed.
1013
1014 Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
1015 Signed-off-by: Scott McNutt <smcnutt@psyent.com>
1016
1017commit 8d52ea6db484c689a75ef8a36a4e525753b8f078
1018Author: Thomas Chou <thomas@wytron.com.tw>
1019Date: Sat May 15 06:00:05 2010 +0800
1020
1021 nios2: fix div64 issue for gcc4
1022
1023 This patch fixes the run-time error on div64 when built with
1024 gcc4, which was reported by jhwu0625 on nios forum. It merges
1025 math support from libgcc of gcc4. This patch is copied from
1026 nios2-linux.
1027
1028 It works with both gcc3 and gcc4. The old mult.c, divmod.c and
1029 math.h are removed.
1030
1031 Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
1032 Signed-off-by: Scott McNutt <smcnutt@psyent.com>
1033
1034commit 0df01fd3d71481b5cc7aeea6a741b9fc3be15178
1035Author: Thomas Chou <thomas@wytron.com.tw>
1036Date: Fri May 21 11:08:03 2010 +0800
1037
1038 nios2: fix r15 issue for gcc4
1039
1040 The "-ffixed-r15" option doesn't work well for gcc4. Since we
1041 don't use gp for small data with option "-G0", we can use gp
1042 as global data pointer. This allows compiler to use r15. It
1043 is necessary for gcc4 to work properly.
1044
1045 Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
1046 Signed-off-by: Scott McNutt <smcnutt@psyent.com>
1047
1048commit 661ba14051db6766932fcb50ba1ec7c67f230054
1049Author: Thomas Chou <thomas@wytron.com.tw>
1050Date: Fri Apr 30 11:34:16 2010 +0800
1051
1052 spi: add altera spi controller support
1053
1054 This patch adds the driver of altera spi controller, which is
1055 used as epcs/spi flash controller. It also works with mmc_spi
1056 driver.
1057
1058 This driver support more than one spi bus, with base list declared
1059 #define CONFIG_SYS_ALTERA_SPI_LIST { BASE_0,BASE_1,... }
1060
1061 Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
1062 Tested-by: Ian Abbott <abbotti@mev.co.uk>
1063 Signed-off-by: Scott McNutt <smcnutt@psyent.com>
1064
1065commit 1e8e9bad2db38e93c3bc9f4b6238b3d8be99e469
1066Author: Thomas Chou <thomas@wytron.com.tw>
1067Date: Fri Apr 30 11:34:15 2010 +0800
1068
1069 nios2: add gpio support to nios2-generic board
1070
1071 This patch adds gpio support of Altera PIO component to the
1072 nios2-generic board. Though it drives only gpio_led at the
1073 moment, it supports bidirectional port to control bit-banging
1074 I2C, NAND flash busy status or button switches, etc.
1075
1076 Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
1077 Tested-by: Ian Abbott <abbotti@mev.co.uk>
1078 Signed-off-by: Scott McNutt <smcnutt@psyent.com>
1079
1080commit 3e6b86b5552840bb4147871a753840eb3923374c
1081Author: Thomas Chou <thomas@wytron.com.tw>
1082Date: Fri Apr 30 11:34:14 2010 +0800
1083
1084 misc: add gpio based status led driver
1085
1086 This patch adds a status led driver followed the GPIO access
1087 conventions of Linux. The led mask is used to specify the gpio pin.
1088
1089 Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
1090 Tested-by: Ian Abbott <abbotti@mev.co.uk>
1091 Signed-off-by: Scott McNutt <smcnutt@psyent.com>
1092
1093commit cedd341d551b6b705e97ab1953a87575b9ff9ef9
1094Author: Thomas Chou <thomas@wytron.com.tw>
1095Date: Fri Apr 30 11:34:13 2010 +0800
1096
1097 nios2: add gpio support
1098
1099 This patch adds driver for a trivial gpio core, which is described
1100 in http://nioswiki.com/GPIO. It is used for gpio led and nand flash
1101 interface in u-boot.
1102
1103 When CONFIG_SYS_GPIO_BASE is not defined, board may provide
1104 its own driver.
1105
1106 Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
1107 Tested-by: Ian Abbott <abbotti@mev.co.uk>
1108 Signed-off-by: Scott McNutt <smcnutt@psyent.com>
1109
1110commit adf55679af1ed98c15a136eb81d6204ebe740b30
1111Author: Wolfgang Wegner <w.wegner@astro-kom.de>
1112Date: Tue Mar 30 19:19:51 2010 +0100
1113
1114 add CONFIG_SYS_FEC_FULL_MII for MCF5445x
1115
1116 This patch adds support for full MII interface on MCF5445x (in contrast
1117 to RMII as used on the evaluation boards).
1118
1119 Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>
1120
1121commit ae49099755affc942171a7727c1b12c51d167abf
1122Author: Wolfgang Wegner <w.wegner@astro-kom.de>
1123Date: Tue Mar 30 19:19:50 2010 +0100
1124
1125 add CONFIG_SYS_FEC_NO_SHARED_PHY for MCF5445x
1126
1127 This patch adds the possibility to handle seperate PHYs to MCF5445x.
1128 Naming is chosen to resemble the contrary CONFIG_FEC_SHARED_PHY in the
1129 linux kernel.
1130
1131 Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>
1132
1133commit e9b43cae1a20af13d1baeb13038b3f34905c14b5
1134Author: Wolfgang Wegner <w.wegner@astro-kom.de>
1135Date: Tue Mar 30 19:20:31 2010 +0100
1136
1137 add missing PCS3 for MCF5445x
1138
1139 This patch adds the code for handling PCS3 (DSPI chip select 3) in
1140 cpu_init.c and m5445x.h
1141
1142 Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>
1143
1144commit d0fe1128c4451327b9cb0fac1a76efd194b078b5
1145Author: Sergei Shtylyov <sshtylyov@ru.mvista.com>
1146Date: Wed May 26 21:26:43 2010 +0400
1147
1148 USB: fix create_pipe()
1149
1150 create_pipe() can give wrong result if an expression is passed as the 'endpoint'
1151 argument -- due to missing parentheses.
1152
1153 Thanks to Martin Mueller for finding the bug and providing the patch.
1154
1155 Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
1156
1157commit c941b77adc40f344215e367b3d1fc638addff870
1158Author: Andrew Caldwell <Andrew.Caldwell@analog.com>
1159Date: Fri May 7 15:10:07 2010 -0400
1160
1161 Blackfin: nand: drain the write buffer before returning
1162
1163 The current Blackfin nand write function fills up the write buffer but
1164 returns before it has had a chance to drain. On faster systems, this
1165 isn't a problem as the operation finishes before the ECC registers are
1166 read, but on slower systems the ECC may be incomplete when the core tries
1167 to read it.
1168
1169 So wait for the buffer to drain once we're done writing to it.
1170
1171 Signed-off-by: Andrew Caldwell <Andrew.Caldwell@analog.com>
1172 Signed-off-by: Mike Frysinger <vapier@gentoo.org>
1173
1174commit 01f03bda5b22e5aeae5f02fd537da97a41485c73
1175Author: Wolfgang Denk <wd@denx.de>
1176Date: Wed May 26 23:57:08 2010 +0200
1177
1178 Prepare v2010.06-rc1
1179
1180 Signed-off-by: Wolfgang Denk <wd@denx.de>
1181
1182commit c4976807cbbabd281f45466ac5e47e5639bcc9cb
1183Author: Wolfgang Denk <wd@denx.de>
1184Date: Wed May 26 23:51:22 2010 +0200
1185
1186 Coding style cleanup, update CHANGELOG.
1187
1188 Signed-off-by: Wolfgang Denk <wd@denx.de>
1189
c4976807
WD
1190commit c7da8c19b5f7fd58b5b4b1d247648851af56e1f0
1191Author: Andreas Biessmann <andreas.devel@googlemail.com>
1192Date: Sat May 22 13:17:21 2010 +0200
1193
1194 config.mk: use different host compiler for OS X 10.6
1195
1196 Compiling tools subdirectory on Mac OS X 10.6 (Snow Leopard) complains about
1197 wrong syntax in system includes.
1198
1199 In file included from /usr/include/stdio.h:444,
1200 from ../source/u-boot/include/compiler.h:26,
1201 from ../source/u-boot/lib/crc32.c:15:
1202 /usr/include/secure/_stdio.h:46: error: syntax error in macro parameter list
1203
1204 This can be fixed by reverting the workaround for prior OS X releases in
1205 config.mk conditionally for OS X 10.6+.
1206
1207