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c609719b 1#
eca3aeb3 2# (C) Copyright 2000 - 2013
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3# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4#
eca3aeb3 5# SPDX-License-Identifier: GPL-2.0+
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6#
7
8Summary:
9========
10
24ee89b9 11This directory contains the source code for U-Boot, a boot loader for
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12Embedded boards based on PowerPC, ARM, MIPS and several other
13processors, which can be installed in a boot ROM and used to
14initialize and test the hardware or to download and run application
15code.
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16
17The development of U-Boot is closely related to Linux: some parts of
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18the source code originate in the Linux source tree, we have some
19header files in common, and special provision has been made to
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20support booting of Linux images.
21
22Some attention has been paid to make this software easily
23configurable and extendable. For instance, all monitor commands are
24implemented with the same call interface, so that it's very easy to
25add new commands. Also, instead of permanently adding rarely used
26code (for instance hardware test utilities) to the monitor, you can
27load and run it dynamically.
28
29
30Status:
31=======
32
33In general, all boards for which a configuration option exists in the
24ee89b9 34Makefile have been tested to some extent and can be considered
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35"working". In fact, many of them are used in production systems.
36
24ee89b9 37In case of problems see the CHANGELOG and CREDITS files to find out
27af930e 38who contributed the specific port. The boards.cfg file lists board
218ca724 39maintainers.
c609719b 40
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41Note: There is no CHANGELOG file in the actual U-Boot source tree;
42it can be created dynamically from the Git log using:
43
44 make CHANGELOG
45
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46
47Where to get help:
48==================
49
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50In case you have questions about, problems with or contributions for
51U-Boot you should send a message to the U-Boot mailing list at
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52<u-boot@lists.denx.de>. There is also an archive of previous traffic
53on the mailing list - please search the archive before asking FAQ's.
54Please see http://lists.denx.de/pipermail/u-boot and
55http://dir.gmane.org/gmane.comp.boot-loaders.u-boot
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56
57
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58Where to get source code:
59=========================
60
61The U-Boot source code is maintained in the git repository at
62git://www.denx.de/git/u-boot.git ; you can browse it online at
63http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=summary
64
65The "snapshot" links on this page allow you to download tarballs of
11ccc33f 66any version you might be interested in. Official releases are also
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67available for FTP download from the ftp://ftp.denx.de/pub/u-boot/
68directory.
69
d4ee711d 70Pre-built (and tested) images are available from
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71ftp://ftp.denx.de/pub/u-boot/images/
72
73
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74Where we come from:
75===================
76
77- start from 8xxrom sources
24ee89b9 78- create PPCBoot project (http://sourceforge.net/projects/ppcboot)
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79- clean up code
80- make it easier to add custom boards
81- make it possible to add other [PowerPC] CPUs
82- extend functions, especially:
83 * Provide extended interface to Linux boot loader
84 * S-Record download
85 * network boot
11ccc33f 86 * PCMCIA / CompactFlash / ATA disk / SCSI ... boot
24ee89b9 87- create ARMBoot project (http://sourceforge.net/projects/armboot)
c609719b 88- add other CPU families (starting with ARM)
24ee89b9 89- create U-Boot project (http://sourceforge.net/projects/u-boot)
0d28f34b 90- current project page: see http://www.denx.de/wiki/U-Boot
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91
92
93Names and Spelling:
94===================
95
96The "official" name of this project is "Das U-Boot". The spelling
97"U-Boot" shall be used in all written text (documentation, comments
98in source files etc.). Example:
99
100 This is the README file for the U-Boot project.
101
102File names etc. shall be based on the string "u-boot". Examples:
103
104 include/asm-ppc/u-boot.h
105
106 #include <asm/u-boot.h>
107
108Variable names, preprocessor constants etc. shall be either based on
109the string "u_boot" or on "U_BOOT". Example:
110
111 U_BOOT_VERSION u_boot_logo
112 IH_OS_U_BOOT u_boot_hush_start
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113
114
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115Versioning:
116===========
117
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118Starting with the release in October 2008, the names of the releases
119were changed from numerical release numbers without deeper meaning
120into a time stamp based numbering. Regular releases are identified by
121names consisting of the calendar year and month of the release date.
122Additional fields (if present) indicate release candidates or bug fix
123releases in "stable" maintenance trees.
124
125Examples:
c0f40859 126 U-Boot v2009.11 - Release November 2009
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127 U-Boot v2009.11.1 - Release 1 in version November 2009 stable tree
128 U-Boot v2010.09-rc1 - Release candiate 1 for September 2010 release
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129
130
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131Directory Hierarchy:
132====================
133
8d321b81 134/arch Architecture specific files
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135 /arc Files generic to ARC architecture
136 /cpu CPU specific files
137 /arc700 Files specific to ARC 700 CPUs
138 /lib Architecture specific library files
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139 /arm Files generic to ARM architecture
140 /cpu CPU specific files
141 /arm720t Files specific to ARM 720 CPUs
142 /arm920t Files specific to ARM 920 CPUs
6eb0921a 143 /at91 Files specific to Atmel AT91RM9200 CPU
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144 /imx Files specific to Freescale MC9328 i.MX CPUs
145 /s3c24x0 Files specific to Samsung S3C24X0 CPUs
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146 /arm926ejs Files specific to ARM 926 CPUs
147 /arm1136 Files specific to ARM 1136 CPUs
8d321b81 148 /pxa Files specific to Intel XScale PXA CPUs
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149 /sa1100 Files specific to Intel StrongARM SA1100 CPUs
150 /lib Architecture specific library files
151 /avr32 Files generic to AVR32 architecture
152 /cpu CPU specific files
153 /lib Architecture specific library files
154 /blackfin Files generic to Analog Devices Blackfin architecture
155 /cpu CPU specific files
156 /lib Architecture specific library files
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157 /m68k Files generic to m68k architecture
158 /cpu CPU specific files
159 /mcf52x2 Files specific to Freescale ColdFire MCF52x2 CPUs
160 /mcf5227x Files specific to Freescale ColdFire MCF5227x CPUs
161 /mcf532x Files specific to Freescale ColdFire MCF5329 CPUs
162 /mcf5445x Files specific to Freescale ColdFire MCF5445x CPUs
163 /mcf547x_8x Files specific to Freescale ColdFire MCF547x_8x CPUs
164 /lib Architecture specific library files
165 /microblaze Files generic to microblaze architecture
166 /cpu CPU specific files
167 /lib Architecture specific library files
168 /mips Files generic to MIPS architecture
169 /cpu CPU specific files
92bbd64e 170 /mips32 Files specific to MIPS32 CPUs
6eae68e4 171 /mips64 Files specific to MIPS64 CPUs
8d321b81 172 /lib Architecture specific library files
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173 /nds32 Files generic to NDS32 architecture
174 /cpu CPU specific files
175 /n1213 Files specific to Andes Technology N1213 CPUs
176 /lib Architecture specific library files
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177 /nios2 Files generic to Altera NIOS2 architecture
178 /cpu CPU specific files
179 /lib Architecture specific library files
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180 /openrisc Files generic to OpenRISC architecture
181 /cpu CPU specific files
182 /lib Architecture specific library files
a47a12be 183 /powerpc Files generic to PowerPC architecture
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184 /cpu CPU specific files
185 /74xx_7xx Files specific to Freescale MPC74xx and 7xx CPUs
186 /mpc5xx Files specific to Freescale MPC5xx CPUs
187 /mpc5xxx Files specific to Freescale MPC5xxx CPUs
188 /mpc8xx Files specific to Freescale MPC8xx CPUs
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189 /mpc824x Files specific to Freescale MPC824x CPUs
190 /mpc8260 Files specific to Freescale MPC8260 CPUs
191 /mpc85xx Files specific to Freescale MPC85xx CPUs
192 /ppc4xx Files specific to AMCC PowerPC 4xx CPUs
193 /lib Architecture specific library files
194 /sh Files generic to SH architecture
195 /cpu CPU specific files
196 /sh2 Files specific to sh2 CPUs
197 /sh3 Files specific to sh3 CPUs
198 /sh4 Files specific to sh4 CPUs
199 /lib Architecture specific library files
200 /sparc Files generic to SPARC architecture
201 /cpu CPU specific files
202 /leon2 Files specific to Gaisler LEON2 SPARC CPU
203 /leon3 Files specific to Gaisler LEON3 SPARC CPU
204 /lib Architecture specific library files
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205 /x86 Files generic to x86 architecture
206 /cpu CPU specific files
207 /lib Architecture specific library files
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208/api Machine/arch independent API for external apps
209/board Board dependent files
210/common Misc architecture independent functions
211/disk Code for disk drive partition handling
212/doc Documentation (don't expect too much)
213/drivers Commonly used device drivers
33c7731b 214/dts Contains Makefile for building internal U-Boot fdt.
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215/examples Example code for standalone applications, etc.
216/fs Filesystem code (cramfs, ext2, jffs2, etc.)
217/include Header Files
218/lib Files generic to all architectures
219 /libfdt Library files to support flattened device trees
220 /lzma Library files to support LZMA decompression
221 /lzo Library files to support LZO decompression
222/net Networking code
223/post Power On Self Test
33c7731b 224/spl Secondary Program Loader framework
8d321b81 225/tools Tools to build S-Record or U-Boot images, etc.
c609719b 226
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227Software Configuration:
228=======================
229
230Configuration is usually done using C preprocessor defines; the
231rationale behind that is to avoid dead code whenever possible.
232
233There are two classes of configuration variables:
234
235* Configuration _OPTIONS_:
236 These are selectable by the user and have names beginning with
237 "CONFIG_".
238
239* Configuration _SETTINGS_:
240 These depend on the hardware etc. and should not be meddled with if
241 you don't know what you're doing; they have names beginning with
6d0f6bcf 242 "CONFIG_SYS_".
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243
244Later we will add a configuration tool - probably similar to or even
245identical to what's used for the Linux kernel. Right now, we have to
246do the configuration by hand, which means creating some symbolic
247links and editing some configuration files. We use the TQM8xxL boards
248as an example here.
249
250
251Selection of Processor Architecture and Board Type:
252---------------------------------------------------
253
254For all supported boards there are ready-to-use default
ab584d67 255configurations available; just type "make <board_name>_defconfig".
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256
257Example: For a TQM823L module type:
258
259 cd u-boot
ab584d67 260 make TQM823L_defconfig
c609719b 261
11ccc33f 262For the Cogent platform, you need to specify the CPU type as well;
ab584d67 263e.g. "make cogent_mpc8xx_defconfig". And also configure the cogent
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264directory according to the instructions in cogent/README.
265
266
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267Sandbox Environment:
268--------------------
269
270U-Boot can be built natively to run on a Linux host using the 'sandbox'
271board. This allows feature development which is not board- or architecture-
272specific to be undertaken on a native platform. The sandbox is also used to
273run some of U-Boot's tests.
274
6b1978f8 275See board/sandbox/README.sandbox for more details.
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276
277
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278Configuration Options:
279----------------------
280
281Configuration depends on the combination of board and CPU type; all
282such information is kept in a configuration file
283"include/configs/<board_name>.h".
284
285Example: For a TQM823L module, all configuration settings are in
286"include/configs/TQM823L.h".
287
288
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289Many of the options are named exactly as the corresponding Linux
290kernel configuration options. The intention is to make it easier to
291build a config tool - later.
292
293
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294The following options need to be configured:
295
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296- CPU Type: Define exactly one, e.g. CONFIG_MPC85XX.
297
298- Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS.
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299
300- CPU Daughterboard Type: (if CONFIG_ATSTK1000 is defined)
09ea0de0 301 Define exactly one, e.g. CONFIG_ATSTK1002
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302
303- CPU Module Type: (if CONFIG_COGENT is defined)
304 Define exactly one of
305 CONFIG_CMA286_60_OLD
306--- FIXME --- not tested yet:
307 CONFIG_CMA286_60, CONFIG_CMA286_21, CONFIG_CMA286_60P,
308 CONFIG_CMA287_23, CONFIG_CMA287_50
309
310- Motherboard Type: (if CONFIG_COGENT is defined)
311 Define exactly one of
312 CONFIG_CMA101, CONFIG_CMA102
313
314- Motherboard I/O Modules: (if CONFIG_COGENT is defined)
315 Define one or more of
316 CONFIG_CMA302
317
318- Motherboard Options: (if CONFIG_CMA101 or CONFIG_CMA102 are defined)
319 Define one or more of
320 CONFIG_LCD_HEARTBEAT - update a character position on
11ccc33f 321 the LCD display every second with
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322 a "rotator" |\-/|\-/
323
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324- Marvell Family Member
325 CONFIG_SYS_MVFS - define it if you want to enable
326 multiple fs option at one time
327 for marvell soc family
328
c609719b 329- MPC824X Family Member (if CONFIG_MPC824X is defined)
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330 Define exactly one of
331 CONFIG_MPC8240, CONFIG_MPC8245
c609719b 332
11ccc33f 333- 8xx CPU Options: (if using an MPC8xx CPU)
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334 CONFIG_8xx_GCLK_FREQ - deprecated: CPU clock if
335 get_gclk_freq() cannot work
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336 e.g. if there is no 32KHz
337 reference PIT/RTC clock
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338 CONFIG_8xx_OSCLK - PLL input clock (either EXTCLK
339 or XTAL/EXTAL)
c609719b 340
66ca92a5 341- 859/866/885 CPU options: (if using a MPC859 or MPC866 or MPC885 CPU):
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342 CONFIG_SYS_8xx_CPUCLK_MIN
343 CONFIG_SYS_8xx_CPUCLK_MAX
66ca92a5 344 CONFIG_8xx_CPUCLK_DEFAULT
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345 See doc/README.MPC866
346
6d0f6bcf 347 CONFIG_SYS_MEASURE_CPUCLK
75d1ea7f 348
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349 Define this to measure the actual CPU clock instead
350 of relying on the correctness of the configured
351 values. Mostly useful for board bringup to make sure
352 the PLL is locked at the intended frequency. Note
353 that this requires a (stable) reference clock (32 kHz
6d0f6bcf 354 RTC clock or CONFIG_SYS_8XX_XIN)
75d1ea7f 355
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356 CONFIG_SYS_DELAYED_ICACHE
357
358 Define this option if you want to enable the
359 ICache only when Code runs from RAM.
360
66412c63 361- 85xx CPU Options:
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362 CONFIG_SYS_PPC64
363
364 Specifies that the core is a 64-bit PowerPC implementation (implements
365 the "64" category of the Power ISA). This is necessary for ePAPR
366 compliance, among other possible reasons.
367
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368 CONFIG_SYS_FSL_TBCLK_DIV
369
370 Defines the core time base clock divider ratio compared to the
371 system clock. On most PQ3 devices this is 8, on newer QorIQ
372 devices it can be 16 or 32. The ratio varies from SoC to Soc.
373
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374 CONFIG_SYS_FSL_PCIE_COMPAT
375
376 Defines the string to utilize when trying to match PCIe device
377 tree nodes for the given platform.
378
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379 CONFIG_SYS_PPC_E500_DEBUG_TLB
380
381 Enables a temporary TLB entry to be used during boot to work
382 around limitations in e500v1 and e500v2 external debugger
383 support. This reduces the portions of the boot code where
384 breakpoints and single stepping do not work. The value of this
385 symbol should be set to the TLB1 entry to be used for this
386 purpose.
387
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388 CONFIG_SYS_FSL_ERRATUM_A004510
389
390 Enables a workaround for erratum A004510. If set,
391 then CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV and
392 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY must be set.
393
394 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV
395 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 (optional)
396
397 Defines one or two SoC revisions (low 8 bits of SVR)
398 for which the A004510 workaround should be applied.
399
400 The rest of SVR is either not relevant to the decision
401 of whether the erratum is present (e.g. p2040 versus
402 p2041) or is implied by the build target, which controls
403 whether CONFIG_SYS_FSL_ERRATUM_A004510 is set.
404
405 See Freescale App Note 4493 for more information about
406 this erratum.
407
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408 CONFIG_A003399_NOR_WORKAROUND
409 Enables a workaround for IFC erratum A003399. It is only
410 requred during NOR boot.
411
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412 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
413
414 This is the value to write into CCSR offset 0x18600
415 according to the A004510 workaround.
416
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417 CONFIG_SYS_FSL_DSP_DDR_ADDR
418 This value denotes start offset of DDR memory which is
419 connected exclusively to the DSP cores.
420
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421 CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
422 This value denotes start offset of M2 memory
423 which is directly connected to the DSP core.
424
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425 CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
426 This value denotes start offset of M3 memory which is directly
427 connected to the DSP core.
428
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429 CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
430 This value denotes start offset of DSP CCSR space.
431
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432 CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
433 Single Source Clock is clocking mode present in some of FSL SoC's.
434 In this mode, a single differential clock is used to supply
435 clocks to the sysclock, ddrclock and usbclock.
436
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437 CONFIG_SYS_CPC_REINIT_F
438 This CONFIG is defined when the CPC is configured as SRAM at the
439 time of U-boot entry and is required to be re-initialized.
440
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441 CONFIG_DEEP_SLEEP
442 Inidcates this SoC supports deep sleep feature. If deep sleep is
443 supported, core will start to execute uboot when wakes up.
444
6cb461b4 445- Generic CPU options:
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446 CONFIG_SYS_GENERIC_GLOBAL_DATA
447 Defines global data is initialized in generic board board_init_f().
448 If this macro is defined, global data is created and cleared in
449 generic board board_init_f(). Without this macro, architecture/board
450 should initialize global data before calling board_init_f().
451
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452 CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
453
454 Defines the endianess of the CPU. Implementation of those
455 values is arch specific.
456
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457 CONFIG_SYS_FSL_DDR
458 Freescale DDR driver in use. This type of DDR controller is
459 found in mpc83xx, mpc85xx, mpc86xx as well as some ARM core
460 SoCs.
461
462 CONFIG_SYS_FSL_DDR_ADDR
463 Freescale DDR memory-mapped register base.
464
465 CONFIG_SYS_FSL_DDR_EMU
466 Specify emulator support for DDR. Some DDR features such as
467 deskew training are not available.
468
469 CONFIG_SYS_FSL_DDRC_GEN1
470 Freescale DDR1 controller.
471
472 CONFIG_SYS_FSL_DDRC_GEN2
473 Freescale DDR2 controller.
474
475 CONFIG_SYS_FSL_DDRC_GEN3
476 Freescale DDR3 controller.
477
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478 CONFIG_SYS_FSL_DDRC_GEN4
479 Freescale DDR4 controller.
480
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481 CONFIG_SYS_FSL_DDRC_ARM_GEN3
482 Freescale DDR3 controller for ARM-based SoCs.
483
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484 CONFIG_SYS_FSL_DDR1
485 Board config to use DDR1. It can be enabled for SoCs with
486 Freescale DDR1 or DDR2 controllers, depending on the board
487 implemetation.
488
489 CONFIG_SYS_FSL_DDR2
490 Board config to use DDR2. It can be eanbeld for SoCs with
491 Freescale DDR2 or DDR3 controllers, depending on the board
492 implementation.
493
494 CONFIG_SYS_FSL_DDR3
495 Board config to use DDR3. It can be enabled for SoCs with
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496 Freescale DDR3 or DDR3L controllers.
497
498 CONFIG_SYS_FSL_DDR3L
499 Board config to use DDR3L. It can be enabled for SoCs with
500 DDR3L controllers.
501
502 CONFIG_SYS_FSL_DDR4
503 Board config to use DDR4. It can be enabled for SoCs with
504 DDR4 controllers.
5614e71b 505
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506 CONFIG_SYS_FSL_IFC_BE
507 Defines the IFC controller register space as Big Endian
508
509 CONFIG_SYS_FSL_IFC_LE
510 Defines the IFC controller register space as Little Endian
511
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512 CONFIG_SYS_FSL_PBL_PBI
513 It enables addition of RCW (Power on reset configuration) in built image.
514 Please refer doc/README.pblimage for more details
515
516 CONFIG_SYS_FSL_PBL_RCW
517 It adds PBI(pre-boot instructions) commands in u-boot build image.
518 PBI commands can be used to configure SoC before it starts the execution.
519 Please refer doc/README.pblimage for more details
520
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521 CONFIG_SPL_FSL_PBL
522 It adds a target to create boot binary having SPL binary in PBI format
523 concatenated with u-boot binary.
524
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525 CONFIG_SYS_FSL_DDR_BE
526 Defines the DDR controller register space as Big Endian
527
528 CONFIG_SYS_FSL_DDR_LE
529 Defines the DDR controller register space as Little Endian
530
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531 CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY
532 Physical address from the view of DDR controllers. It is the
533 same as CONFIG_SYS_DDR_SDRAM_BASE for all Power SoCs. But
534 it could be different for ARM SoCs.
535
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536 CONFIG_SYS_FSL_DDR_INTLV_256B
537 DDR controller interleaving on 256-byte. This is a special
538 interleaving mode, handled by Dickens for Freescale layerscape
539 SoCs with ARM core.
540
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541 CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
542 Number of controllers used as main memory.
543
544 CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
545 Number of controllers used for other than main memory.
546
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547 CONFIG_SYS_FSL_SEC_BE
548 Defines the SEC controller register space as Big Endian
549
550 CONFIG_SYS_FSL_SEC_LE
551 Defines the SEC controller register space as Little Endian
552
0b953ffc 553- Intel Monahans options:
6d0f6bcf 554 CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO
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555
556 Defines the Monahans run mode to oscillator
557 ratio. Valid values are 8, 16, 24, 31. The core
558 frequency is this value multiplied by 13 MHz.
559
6d0f6bcf 560 CONFIG_SYS_MONAHANS_TURBO_RUN_MODE_RATIO
cf48eb9a 561
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562 Defines the Monahans turbo mode to oscillator
563 ratio. Valid values are 1 (default if undefined) and
cf48eb9a 564 2. The core frequency as calculated above is multiplied
0b953ffc 565 by this value.
cf48eb9a 566
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567- MIPS CPU options:
568 CONFIG_SYS_INIT_SP_OFFSET
569
570 Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack
571 pointer. This is needed for the temporary stack before
572 relocation.
573
574 CONFIG_SYS_MIPS_CACHE_MODE
575
576 Cache operation mode for the MIPS CPU.
577 See also arch/mips/include/asm/mipsregs.h.
578 Possible values are:
579 CONF_CM_CACHABLE_NO_WA
580 CONF_CM_CACHABLE_WA
581 CONF_CM_UNCACHED
582 CONF_CM_CACHABLE_NONCOHERENT
583 CONF_CM_CACHABLE_CE
584 CONF_CM_CACHABLE_COW
585 CONF_CM_CACHABLE_CUW
586 CONF_CM_CACHABLE_ACCELERATED
587
588 CONFIG_SYS_XWAY_EBU_BOOTCFG
589
590 Special option for Lantiq XWAY SoCs for booting from NOR flash.
591 See also arch/mips/cpu/mips32/start.S.
592
593 CONFIG_XWAY_SWAP_BYTES
594
595 Enable compilation of tools/xway-swap-bytes needed for Lantiq
596 XWAY SoCs for booting from NOR flash. The U-Boot image needs to
597 be swapped if a flash programmer is used.
598
b67d8816
CR
599- ARM options:
600 CONFIG_SYS_EXCEPTION_VECTORS_HIGH
601
602 Select high exception vectors of the ARM core, e.g., do not
603 clear the V bit of the c1 register of CP15.
604
5356f545
A
605 CONFIG_SYS_THUMB_BUILD
606
607 Use this flag to build U-Boot using the Thumb instruction
608 set for ARM architectures. Thumb instruction set provides
609 better code density. For ARM architectures that support
610 Thumb2 this flag will result in Thumb2 code generated by
611 GCC.
612
c5d4752c 613 CONFIG_ARM_ERRATA_716044
0678587f
SW
614 CONFIG_ARM_ERRATA_742230
615 CONFIG_ARM_ERRATA_743622
616 CONFIG_ARM_ERRATA_751472
f71cbfe3 617 CONFIG_ARM_ERRATA_794072
b7588e3b 618 CONFIG_ARM_ERRATA_761320
0678587f
SW
619
620 If set, the workarounds for these ARM errata are applied early
621 during U-Boot startup. Note that these options force the
622 workarounds to be applied; no CPU-type/version detection
623 exists, unlike the similar options in the Linux kernel. Do not
624 set these options unless they apply!
625
5da627a4 626- Linux Kernel Interface:
c609719b
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627 CONFIG_CLOCKS_IN_MHZ
628
629 U-Boot stores all clock information in Hz
630 internally. For binary compatibility with older Linux
631 kernels (which expect the clocks passed in the
632 bd_info data to be in MHz) the environment variable
633 "clocks_in_mhz" can be defined so that U-Boot
634 converts clock data to MHZ before passing it to the
635 Linux kernel.
c609719b 636 When CONFIG_CLOCKS_IN_MHZ is defined, a definition of
218ca724 637 "clocks_in_mhz=1" is automatically included in the
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638 default environment.
639
5da627a4
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640 CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only]
641
11ccc33f 642 When transferring memsize parameter to linux, some versions
5da627a4
WD
643 expect it to be in bytes, others in MB.
644 Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.
645
fec6d9ee 646 CONFIG_OF_LIBFDT
f57f70aa
WD
647
648 New kernel versions are expecting firmware settings to be
213bf8c8
GVB
649 passed using flattened device trees (based on open firmware
650 concepts).
651
652 CONFIG_OF_LIBFDT
653 * New libfdt-based support
654 * Adds the "fdt" command
3bb342fc 655 * The bootm command automatically updates the fdt
213bf8c8 656
b55ae402
MZ
657 OF_CPU - The proper name of the cpus node (only required for
658 MPC512X and MPC5xxx based boards).
659 OF_SOC - The proper name of the soc node (only required for
660 MPC512X and MPC5xxx based boards).
f57f70aa 661 OF_TBCLK - The timebase frequency.
c2871f03 662 OF_STDOUT_PATH - The path to the console device
f57f70aa 663
11ccc33f
MZ
664 boards with QUICC Engines require OF_QE to set UCC MAC
665 addresses
3bb342fc 666
4e253137
KG
667 CONFIG_OF_BOARD_SETUP
668
669 Board code has addition modification that it wants to make
670 to the flat device tree before handing it off to the kernel
f57f70aa 671
0267768e
MM
672 CONFIG_OF_BOOT_CPU
673
11ccc33f 674 This define fills in the correct boot CPU in the boot
0267768e
MM
675 param header, the default value is zero if undefined.
676
3887c3fb
HS
677 CONFIG_OF_IDE_FIXUP
678
679 U-Boot can detect if an IDE device is present or not.
680 If not, and this new config option is activated, U-Boot
681 removes the ATA node from the DTS before booting Linux,
682 so the Linux IDE driver does not probe the device and
683 crash. This is needed for buggy hardware (uc101) where
684 no pull down resistor is connected to the signal IDE5V_DD7.
685
7eb29398
IG
686 CONFIG_MACH_TYPE [relevant for ARM only][mandatory]
687
688 This setting is mandatory for all boards that have only one
689 machine type and must be used to specify the machine type
690 number as it appears in the ARM machine registry
691 (see http://www.arm.linux.org.uk/developer/machines/).
692 Only boards that have multiple machine types supported
693 in a single configuration file and the machine type is
694 runtime discoverable, do not have to use this setting.
695
0b2f4eca
NG
696- vxWorks boot parameters:
697
698 bootvx constructs a valid bootline using the following
699 environments variables: bootfile, ipaddr, serverip, hostname.
700 It loads the vxWorks image pointed bootfile.
701
702 CONFIG_SYS_VXWORKS_BOOT_DEVICE - The vxworks device name
703 CONFIG_SYS_VXWORKS_MAC_PTR - Ethernet 6 byte MA -address
704 CONFIG_SYS_VXWORKS_SERVERNAME - Name of the server
705 CONFIG_SYS_VXWORKS_BOOT_ADDR - Address of boot parameters
706
707 CONFIG_SYS_VXWORKS_ADD_PARAMS
708
709 Add it at the end of the bootline. E.g "u=username pw=secret"
710
711 Note: If a "bootargs" environment is defined, it will overwride
712 the defaults discussed just above.
713
2c451f78
A
714- Cache Configuration:
715 CONFIG_SYS_ICACHE_OFF - Do not enable instruction cache in U-Boot
716 CONFIG_SYS_DCACHE_OFF - Do not enable data cache in U-Boot
717 CONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot
718
93bc2193
A
719- Cache Configuration for ARM:
720 CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache
721 controller
722 CONFIG_SYS_PL310_BASE - Physical base address of PL310
723 controller register space
724
6705d81e 725- Serial Ports:
48d0192f 726 CONFIG_PL010_SERIAL
6705d81e
WD
727
728 Define this if you want support for Amba PrimeCell PL010 UARTs.
729
48d0192f 730 CONFIG_PL011_SERIAL
6705d81e
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731
732 Define this if you want support for Amba PrimeCell PL011 UARTs.
733
734 CONFIG_PL011_CLOCK
735
736 If you have Amba PrimeCell PL011 UARTs, set this variable to
737 the clock speed of the UARTs.
738
739 CONFIG_PL01x_PORTS
740
741 If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
742 define this to a list of base addresses for each (supported)
743 port. See e.g. include/configs/versatile.h
744
910f1ae3
JR
745 CONFIG_PL011_SERIAL_RLCR
746
747 Some vendor versions of PL011 serial ports (e.g. ST-Ericsson U8500)
748 have separate receive and transmit line control registers. Set
749 this variable to initialize the extra register.
750
751 CONFIG_PL011_SERIAL_FLUSH_ON_INIT
752
753 On some platforms (e.g. U8500) U-Boot is loaded by a second stage
754 boot loader that has already initialized the UART. Define this
755 variable to flush the UART at init time.
756
d57dee57
KM
757 CONFIG_SERIAL_HW_FLOW_CONTROL
758
759 Define this variable to enable hw flow control in serial driver.
760 Current user of this option is drivers/serial/nsl16550.c driver
6705d81e 761
c609719b 762- Console Interface:
43d9616c
WD
763 Depending on board, define exactly one serial port
764 (like CONFIG_8xx_CONS_SMC1, CONFIG_8xx_CONS_SMC2,
765 CONFIG_8xx_CONS_SCC1, ...), or switch off the serial
766 console by defining CONFIG_8xx_CONS_NONE
c609719b
WD
767
768 Note: if CONFIG_8xx_CONS_NONE is defined, the serial
769 port routines must be defined elsewhere
770 (i.e. serial_init(), serial_getc(), ...)
771
772 CONFIG_CFB_CONSOLE
773 Enables console device for a color framebuffer. Needs following
c53043b7 774 defines (cf. smiLynxEM, i8042)
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WD
775 VIDEO_FB_LITTLE_ENDIAN graphic memory organisation
776 (default big endian)
777 VIDEO_HW_RECTFILL graphic chip supports
778 rectangle fill
779 (cf. smiLynxEM)
780 VIDEO_HW_BITBLT graphic chip supports
781 bit-blit (cf. smiLynxEM)
782 VIDEO_VISIBLE_COLS visible pixel columns
783 (cols=pitch)
ba56f625
WD
784 VIDEO_VISIBLE_ROWS visible pixel rows
785 VIDEO_PIXEL_SIZE bytes per pixel
c609719b
WD
786 VIDEO_DATA_FORMAT graphic data format
787 (0-5, cf. cfb_console.c)
ba56f625 788 VIDEO_FB_ADRS framebuffer address
c609719b
WD
789 VIDEO_KBD_INIT_FCT keyboard int fct
790 (i.e. i8042_kbd_init())
791 VIDEO_TSTC_FCT test char fct
792 (i.e. i8042_tstc)
793 VIDEO_GETC_FCT get char fct
794 (i.e. i8042_getc)
795 CONFIG_CONSOLE_CURSOR cursor drawing on/off
796 (requires blink timer
797 cf. i8042.c)
6d0f6bcf 798 CONFIG_SYS_CONSOLE_BLINK_COUNT blink interval (cf. i8042.c)
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WD
799 CONFIG_CONSOLE_TIME display time/date info in
800 upper right corner
602ad3b3 801 (requires CONFIG_CMD_DATE)
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WD
802 CONFIG_VIDEO_LOGO display Linux logo in
803 upper left corner
a6c7ad2f
WD
804 CONFIG_VIDEO_BMP_LOGO use bmp_logo.h instead of
805 linux_logo.h for logo.
806 Requires CONFIG_VIDEO_LOGO
c609719b 807 CONFIG_CONSOLE_EXTRA_INFO
11ccc33f 808 additional board info beside
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WD
809 the logo
810
33a35bbb
PR
811 When CONFIG_CFB_CONSOLE_ANSI is defined, console will support
812 a limited number of ANSI escape sequences (cursor control,
813 erase functions and limited graphics rendition control).
814
43d9616c
WD
815 When CONFIG_CFB_CONSOLE is defined, video console is
816 default i/o. Serial console can be forced with
817 environment 'console=serial'.
c609719b 818
d4ca31c4
WD
819 When CONFIG_SILENT_CONSOLE is defined, all console
820 messages (by U-Boot and Linux!) can be silenced with
821 the "silent" environment variable. See
822 doc/README.silent for more information.
a3ad8e26 823
45ae2546
HS
824 CONFIG_SYS_CONSOLE_BG_COL: define the backgroundcolor, default
825 is 0x00.
826 CONFIG_SYS_CONSOLE_FG_COL: define the foregroundcolor, default
827 is 0xa0.
828
c609719b
WD
829- Console Baudrate:
830 CONFIG_BAUDRATE - in bps
831 Select one of the baudrates listed in
6d0f6bcf
JCPV
832 CONFIG_SYS_BAUDRATE_TABLE, see below.
833 CONFIG_SYS_BRGCLK_PRESCALE, baudrate prescale
c609719b 834
c92fac91
HS
835- Console Rx buffer length
836 With CONFIG_SYS_SMC_RXBUFLEN it is possible to define
837 the maximum receive buffer length for the SMC.
2b3f12c2 838 This option is actual only for 82xx and 8xx possible.
c92fac91
HS
839 If using CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE
840 must be defined, to setup the maximum idle timeout for
841 the SMC.
842
9558b48a 843- Pre-Console Buffer:
4cf2609b
WD
844 Prior to the console being initialised (i.e. serial UART
845 initialised etc) all console output is silently discarded.
846 Defining CONFIG_PRE_CONSOLE_BUFFER will cause U-Boot to
847 buffer any console messages prior to the console being
848 initialised to a buffer of size CONFIG_PRE_CON_BUF_SZ
849 bytes located at CONFIG_PRE_CON_BUF_ADDR. The buffer is
850 a circular buffer, so if more than CONFIG_PRE_CON_BUF_SZ
6feff899 851 bytes are output before the console is initialised, the
4cf2609b
WD
852 earlier bytes are discarded.
853
854 'Sane' compilers will generate smaller code if
855 CONFIG_PRE_CON_BUF_SZ is a power of 2
9558b48a 856
046a37bd
SR
857- Safe printf() functions
858 Define CONFIG_SYS_VSNPRINTF to compile in safe versions of
859 the printf() functions. These are defined in
860 include/vsprintf.h and include snprintf(), vsnprintf() and
861 so on. Code size increase is approximately 300-500 bytes.
862 If this option is not given then these functions will
863 silently discard their buffer size argument - this means
864 you are not getting any overflow checking in this case.
865
c609719b
WD
866- Boot Delay: CONFIG_BOOTDELAY - in seconds
867 Delay before automatically booting the default image;
868 set to -1 to disable autoboot.
93d7212f
JH
869 set to -2 to autoboot with no delay and not check for abort
870 (even when CONFIG_ZERO_BOOTDELAY_CHECK is defined).
c609719b
WD
871
872 See doc/README.autoboot for these options that
873 work with CONFIG_BOOTDELAY. None are required.
874 CONFIG_BOOT_RETRY_TIME
875 CONFIG_BOOT_RETRY_MIN
876 CONFIG_AUTOBOOT_KEYED
877 CONFIG_AUTOBOOT_PROMPT
878 CONFIG_AUTOBOOT_DELAY_STR
879 CONFIG_AUTOBOOT_STOP_STR
880 CONFIG_AUTOBOOT_DELAY_STR2
881 CONFIG_AUTOBOOT_STOP_STR2
882 CONFIG_ZERO_BOOTDELAY_CHECK
883 CONFIG_RESET_TO_RETRY
884
885- Autoboot Command:
886 CONFIG_BOOTCOMMAND
887 Only needed when CONFIG_BOOTDELAY is enabled;
888 define a command string that is automatically executed
889 when no character is read on the console interface
890 within "Boot Delay" after reset.
891
892 CONFIG_BOOTARGS
43d9616c
WD
893 This can be used to pass arguments to the bootm
894 command. The value of CONFIG_BOOTARGS goes into the
895 environment value "bootargs".
c609719b
WD
896
897 CONFIG_RAMBOOT and CONFIG_NFSBOOT
43d9616c
WD
898 The value of these goes into the environment as
899 "ramboot" and "nfsboot" respectively, and can be used
900 as a convenience, when switching between booting from
11ccc33f 901 RAM and NFS.
c609719b 902
eda0ba38
HS
903- Bootcount:
904 CONFIG_BOOTCOUNT_LIMIT
905 Implements a mechanism for detecting a repeating reboot
906 cycle, see:
907 http://www.denx.de/wiki/view/DULG/UBootBootCountLimit
908
909 CONFIG_BOOTCOUNT_ENV
910 If no softreset save registers are found on the hardware
911 "bootcount" is stored in the environment. To prevent a
912 saveenv on all reboots, the environment variable
913 "upgrade_available" is used. If "upgrade_available" is
914 0, "bootcount" is always 0, if "upgrade_available" is
915 1 "bootcount" is incremented in the environment.
916 So the Userspace Applikation must set the "upgrade_available"
917 and "bootcount" variable to 0, if a boot was successfully.
918
c609719b
WD
919- Pre-Boot Commands:
920 CONFIG_PREBOOT
921
922 When this option is #defined, the existence of the
923 environment variable "preboot" will be checked
924 immediately before starting the CONFIG_BOOTDELAY
925 countdown and/or running the auto-boot command resp.
926 entering interactive mode.
927
928 This feature is especially useful when "preboot" is
929 automatically generated or modified. For an example
930 see the LWMON board specific code: here "preboot" is
931 modified when the user holds down a certain
932 combination of keys on the (special) keyboard when
933 booting the systems
934
935- Serial Download Echo Mode:
936 CONFIG_LOADS_ECHO
937 If defined to 1, all characters received during a
938 serial download (using the "loads" command) are
939 echoed back. This might be needed by some terminal
940 emulations (like "cu"), but may as well just take
941 time on others. This setting #define's the initial
942 value of the "loads_echo" environment variable.
943
602ad3b3 944- Kgdb Serial Baudrate: (if CONFIG_CMD_KGDB is defined)
c609719b
WD
945 CONFIG_KGDB_BAUDRATE
946 Select one of the baudrates listed in
6d0f6bcf 947 CONFIG_SYS_BAUDRATE_TABLE, see below.
c609719b
WD
948
949- Monitor Functions:
602ad3b3
JL
950 Monitor commands can be included or excluded
951 from the build by using the #include files
c6c621bd
SW
952 <config_cmd_all.h> and #undef'ing unwanted
953 commands, or using <config_cmd_default.h>
602ad3b3
JL
954 and augmenting with additional #define's
955 for wanted commands.
956
957 The default command configuration includes all commands
958 except those marked below with a "*".
959
b401b73d 960 CONFIG_CMD_AES AES 128 CBC encrypt/decrypt
602ad3b3 961 CONFIG_CMD_ASKENV * ask for env variable
602ad3b3
JL
962 CONFIG_CMD_BDI bdinfo
963 CONFIG_CMD_BEDBUG * Include BedBug Debugger
964 CONFIG_CMD_BMP * BMP support
965 CONFIG_CMD_BSP * Board specific commands
966 CONFIG_CMD_BOOTD bootd
d2b2ffe3 967 CONFIG_CMD_BOOTI * ARM64 Linux kernel Image support
602ad3b3 968 CONFIG_CMD_CACHE * icache, dcache
08d0d6f3 969 CONFIG_CMD_CLK * clock command support
602ad3b3 970 CONFIG_CMD_CONSOLE coninfo
710b9938 971 CONFIG_CMD_CRC32 * crc32
602ad3b3
JL
972 CONFIG_CMD_DATE * support for RTC, date/time...
973 CONFIG_CMD_DHCP * DHCP support
974 CONFIG_CMD_DIAG * Diagnostics
a7c93104
PT
975 CONFIG_CMD_DS4510 * ds4510 I2C gpio commands
976 CONFIG_CMD_DS4510_INFO * ds4510 I2C info command
977 CONFIG_CMD_DS4510_MEM * ds4510 I2C eeprom/sram commansd
978 CONFIG_CMD_DS4510_RST * ds4510 I2C rst command
602ad3b3
JL
979 CONFIG_CMD_DTT * Digital Therm and Thermostat
980 CONFIG_CMD_ECHO echo arguments
246c6922 981 CONFIG_CMD_EDITENV edit env variable
602ad3b3
JL
982 CONFIG_CMD_EEPROM * EEPROM read/write support
983 CONFIG_CMD_ELF * bootelf, bootvx
5e2b3e0c 984 CONFIG_CMD_ENV_CALLBACK * display details about env callbacks
fffad71b 985 CONFIG_CMD_ENV_FLAGS * display details about env flags
88733e2c 986 CONFIG_CMD_ENV_EXISTS * check existence of env variable
0c79cda0 987 CONFIG_CMD_EXPORTENV * export the environment
03e2ecf6
SW
988 CONFIG_CMD_EXT2 * ext2 command support
989 CONFIG_CMD_EXT4 * ext4 command support
16f4d933
SW
990 CONFIG_CMD_FS_GENERIC * filesystem commands (e.g. load, ls)
991 that work for multiple fs types
bdab39d3 992 CONFIG_CMD_SAVEENV saveenv
602ad3b3 993 CONFIG_CMD_FDC * Floppy Disk Support
03e2ecf6 994 CONFIG_CMD_FAT * FAT command support
602ad3b3
JL
995 CONFIG_CMD_FLASH flinfo, erase, protect
996 CONFIG_CMD_FPGA FPGA device initialization support
4d98b5c8 997 CONFIG_CMD_FUSE * Device fuse support
53fdc7ef 998 CONFIG_CMD_GETTIME * Get time since boot
a641b979 999 CONFIG_CMD_GO * the 'go' command (exec code)
a000b795 1000 CONFIG_CMD_GREPENV * search environment
bf36c5d5 1001 CONFIG_CMD_HASH * calculate hash / digest
602ad3b3
JL
1002 CONFIG_CMD_HWFLOW * RTS/CTS hw flow control
1003 CONFIG_CMD_I2C * I2C serial bus support
1004 CONFIG_CMD_IDE * IDE harddisk support
1005 CONFIG_CMD_IMI iminfo
8fdf1e0f 1006 CONFIG_CMD_IMLS List all images found in NOR flash
4d98b5c8 1007 CONFIG_CMD_IMLS_NAND * List all images found in NAND flash
602ad3b3 1008 CONFIG_CMD_IMMAP * IMMR dump support
aa53233a 1009 CONFIG_CMD_IOTRACE * I/O tracing for debugging
0c79cda0 1010 CONFIG_CMD_IMPORTENV * import an environment
c167cc02 1011 CONFIG_CMD_INI * import data from an ini file into the env
602ad3b3
JL
1012 CONFIG_CMD_IRQ * irqinfo
1013 CONFIG_CMD_ITEST Integer/string test of 2 values
1014 CONFIG_CMD_JFFS2 * JFFS2 Support
1015 CONFIG_CMD_KGDB * kgdb
4d98b5c8 1016 CONFIG_CMD_LDRINFO * ldrinfo (display Blackfin loader)
d22c338e
JH
1017 CONFIG_CMD_LINK_LOCAL * link-local IP address auto-configuration
1018 (169.254.*.*)
602ad3b3
JL
1019 CONFIG_CMD_LOADB loadb
1020 CONFIG_CMD_LOADS loads
4d98b5c8 1021 CONFIG_CMD_MD5SUM * print md5 message digest
02c9aa1d 1022 (requires CONFIG_CMD_MEMORY and CONFIG_MD5)
15a33e49 1023 CONFIG_CMD_MEMINFO * Display detailed memory information
602ad3b3 1024 CONFIG_CMD_MEMORY md, mm, nm, mw, cp, cmp, crc, base,
a2681707 1025 loop, loopw
4d98b5c8 1026 CONFIG_CMD_MEMTEST * mtest
602ad3b3
JL
1027 CONFIG_CMD_MISC Misc functions like sleep etc
1028 CONFIG_CMD_MMC * MMC memory mapped support
1029 CONFIG_CMD_MII * MII utility commands
68d7d651 1030 CONFIG_CMD_MTDPARTS * MTD partition support
602ad3b3
JL
1031 CONFIG_CMD_NAND * NAND support
1032 CONFIG_CMD_NET bootp, tftpboot, rarpboot
4d98b5c8 1033 CONFIG_CMD_NFS NFS support
e92739d3 1034 CONFIG_CMD_PCA953X * PCA953x I2C gpio commands
c0f40859 1035 CONFIG_CMD_PCA953X_INFO * PCA953x I2C gpio info command
602ad3b3
JL
1036 CONFIG_CMD_PCI * pciinfo
1037 CONFIG_CMD_PCMCIA * PCMCIA support
1038 CONFIG_CMD_PING * send ICMP ECHO_REQUEST to network
1039 host
1040 CONFIG_CMD_PORTIO * Port I/O
ff048ea9 1041 CONFIG_CMD_READ * Read raw data from partition
602ad3b3
JL
1042 CONFIG_CMD_REGINFO * Register dump
1043 CONFIG_CMD_RUN run command in env variable
d304931f 1044 CONFIG_CMD_SANDBOX * sb command to access sandbox features
602ad3b3
JL
1045 CONFIG_CMD_SAVES * save S record dump
1046 CONFIG_CMD_SCSI * SCSI Support
1047 CONFIG_CMD_SDRAM * print SDRAM configuration information
1048 (requires CONFIG_CMD_I2C)
1049 CONFIG_CMD_SETGETDCR Support for DCR Register access
1050 (4xx only)
f61ec45e 1051 CONFIG_CMD_SF * Read/write/erase SPI NOR flash
4d98b5c8 1052 CONFIG_CMD_SHA1SUM * print sha1 memory digest
02c9aa1d 1053 (requires CONFIG_CMD_MEMORY)
7d861d95 1054 CONFIG_CMD_SOFTSWITCH * Soft switch setting command for BF60x
74de7aef 1055 CONFIG_CMD_SOURCE "source" command Support
602ad3b3 1056 CONFIG_CMD_SPI * SPI serial bus support
7a83af07 1057 CONFIG_CMD_TFTPSRV * TFTP transfer in server mode
1fb7cd49 1058 CONFIG_CMD_TFTPPUT * TFTP put command (upload)
da83bcd7
JH
1059 CONFIG_CMD_TIME * run command and report execution time (ARM specific)
1060 CONFIG_CMD_TIMER * access to the system tick timer
602ad3b3 1061 CONFIG_CMD_USB * USB support
602ad3b3 1062 CONFIG_CMD_CDP * Cisco Discover Protocol support
c8339f51 1063 CONFIG_CMD_MFSL * Microblaze FSL support
4d98b5c8 1064 CONFIG_CMD_XIMG Load part of Multi Image
89c8230d 1065 CONFIG_CMD_UUID * Generate random UUID or GUID string
c609719b
WD
1066
1067 EXAMPLE: If you want all functions except of network
1068 support you can write:
1069
602ad3b3
JL
1070 #include "config_cmd_all.h"
1071 #undef CONFIG_CMD_NET
c609719b 1072
213bf8c8
GVB
1073 Other Commands:
1074 fdt (flattened device tree) command: CONFIG_OF_LIBFDT
c609719b
WD
1075
1076 Note: Don't enable the "icache" and "dcache" commands
602ad3b3 1077 (configuration option CONFIG_CMD_CACHE) unless you know
43d9616c
WD
1078 what you (and your U-Boot users) are doing. Data
1079 cache cannot be enabled on systems like the 8xx or
1080 8260 (where accesses to the IMMR region must be
1081 uncached), and it cannot be disabled on all other
1082 systems where we (mis-) use the data cache to hold an
1083 initial stack and some data.
c609719b
WD
1084
1085
1086 XXX - this list needs to get updated!
1087
a5ecbe62
WD
1088- Regular expression support:
1089 CONFIG_REGEX
93e14596
WD
1090 If this variable is defined, U-Boot is linked against
1091 the SLRE (Super Light Regular Expression) library,
1092 which adds regex support to some commands, as for
1093 example "env grep" and "setexpr".
a5ecbe62 1094
45ba8077
SG
1095- Device tree:
1096 CONFIG_OF_CONTROL
1097 If this variable is defined, U-Boot will use a device tree
1098 to configure its devices, instead of relying on statically
1099 compiled #defines in the board file. This option is
1100 experimental and only available on a few boards. The device
1101 tree is available in the global data as gd->fdt_blob.
1102
2c0f79e4
SG
1103 U-Boot needs to get its device tree from somewhere. This can
1104 be done using one of the two options below:
bbb0b128
SG
1105
1106 CONFIG_OF_EMBED
1107 If this variable is defined, U-Boot will embed a device tree
1108 binary in its image. This device tree file should be in the
1109 board directory and called <soc>-<board>.dts. The binary file
1110 is then picked up in board_init_f() and made available through
1111 the global data structure as gd->blob.
45ba8077 1112
2c0f79e4
SG
1113 CONFIG_OF_SEPARATE
1114 If this variable is defined, U-Boot will build a device tree
1115 binary. It will be called u-boot.dtb. Architecture-specific
1116 code will locate it at run-time. Generally this works by:
1117
1118 cat u-boot.bin u-boot.dtb >image.bin
1119
1120 and in fact, U-Boot does this for you, creating a file called
1121 u-boot-dtb.bin which is useful in the common case. You can
1122 still use the individual files if you need something more
1123 exotic.
1124
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WD
1125- Watchdog:
1126 CONFIG_WATCHDOG
1127 If this variable is defined, it enables watchdog
6abe6fb6
DZ
1128 support for the SoC. There must be support in the SoC
1129 specific code for a watchdog. For the 8xx and 8260
1130 CPUs, the SIU Watchdog feature is enabled in the SYPCR
1131 register. When supported for a specific SoC is
1132 available, then no further board specific code should
1133 be needed to use it.
1134
1135 CONFIG_HW_WATCHDOG
1136 When using a watchdog circuitry external to the used
1137 SoC, then define this variable and provide board
1138 specific code for the "hw_watchdog_reset" function.
c609719b 1139
c1551ea8
SR
1140- U-Boot Version:
1141 CONFIG_VERSION_VARIABLE
1142 If this variable is defined, an environment variable
1143 named "ver" is created by U-Boot showing the U-Boot
1144 version as printed by the "version" command.
a1ea8e51
BT
1145 Any change to this variable will be reverted at the
1146 next reset.
c1551ea8 1147
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WD
1148- Real-Time Clock:
1149
602ad3b3 1150 When CONFIG_CMD_DATE is selected, the type of the RTC
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WD
1151 has to be selected, too. Define exactly one of the
1152 following options:
1153
1154 CONFIG_RTC_MPC8xx - use internal RTC of MPC8xx
1155 CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC
4e8b7544 1156 CONFIG_RTC_MC13XXX - use MC13783 or MC13892 RTC
c609719b 1157 CONFIG_RTC_MC146818 - use MC146818 RTC
1cb8e980 1158 CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC
c609719b 1159 CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC
7f70e853 1160 CONFIG_RTC_DS1338 - use Maxim, Inc. DS1338 RTC
412921d2 1161 CONFIG_RTC_DS1339 - use Maxim, Inc. DS1339 RTC
3bac3513 1162 CONFIG_RTC_DS164x - use Dallas DS164x RTC
9536dfcc 1163 CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC
4c0d4c3b 1164 CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC
6d0f6bcf 1165 CONFIG_SYS_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337
71d19f30
HS
1166 CONFIG_SYS_RV3029_TCR - enable trickle charger on
1167 RV3029 RTC.
c609719b 1168
b37c7e5e
WD
1169 Note that if the RTC uses I2C, then the I2C interface
1170 must also be configured. See I2C Support, below.
1171
e92739d3
PT
1172- GPIO Support:
1173 CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO
e92739d3 1174
5dec49ca
CP
1175 The CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of
1176 chip-ngpio pairs that tell the PCA953X driver the number of
1177 pins supported by a particular chip.
1178
e92739d3
PT
1179 Note that if the GPIO device uses I2C, then the I2C interface
1180 must also be configured. See I2C Support, below.
1181
aa53233a
SG
1182- I/O tracing:
1183 When CONFIG_IO_TRACE is selected, U-Boot intercepts all I/O
1184 accesses and can checksum them or write a list of them out
1185 to memory. See the 'iotrace' command for details. This is
1186 useful for testing device drivers since it can confirm that
1187 the driver behaves the same way before and after a code
1188 change. Currently this is supported on sandbox and arm. To
1189 add support for your architecture, add '#include <iotrace.h>'
1190 to the bottom of arch/<arch>/include/asm/io.h and test.
1191
1192 Example output from the 'iotrace stats' command is below.
1193 Note that if the trace buffer is exhausted, the checksum will
1194 still continue to operate.
1195
1196 iotrace is enabled
1197 Start: 10000000 (buffer start address)
1198 Size: 00010000 (buffer size)
1199 Offset: 00000120 (current buffer offset)
1200 Output: 10000120 (start + offset)
1201 Count: 00000018 (number of trace records)
1202 CRC32: 9526fb66 (CRC32 of all trace records)
1203
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WD
1204- Timestamp Support:
1205
43d9616c
WD
1206 When CONFIG_TIMESTAMP is selected, the timestamp
1207 (date and time) of an image is printed by image
1208 commands like bootm or iminfo. This option is
602ad3b3 1209 automatically enabled when you select CONFIG_CMD_DATE .
c609719b 1210
923c46f9
KP
1211- Partition Labels (disklabels) Supported:
1212 Zero or more of the following:
1213 CONFIG_MAC_PARTITION Apple's MacOS partition table.
1214 CONFIG_DOS_PARTITION MS Dos partition table, traditional on the
1215 Intel architecture, USB sticks, etc.
1216 CONFIG_ISO_PARTITION ISO partition table, used on CDROM etc.
1217 CONFIG_EFI_PARTITION GPT partition table, common when EFI is the
1218 bootloader. Note 2TB partition limit; see
1219 disk/part_efi.c
1220 CONFIG_MTD_PARTITIONS Memory Technology Device partition table.
c609719b 1221
218ca724
WD
1222 If IDE or SCSI support is enabled (CONFIG_CMD_IDE or
1223 CONFIG_CMD_SCSI) you must configure support for at
923c46f9 1224 least one non-MTD partition type as well.
c609719b
WD
1225
1226- IDE Reset method:
4d13cbad
WD
1227 CONFIG_IDE_RESET_ROUTINE - this is defined in several
1228 board configurations files but used nowhere!
c609719b 1229
4d13cbad
WD
1230 CONFIG_IDE_RESET - is this is defined, IDE Reset will
1231 be performed by calling the function
1232 ide_set_reset(int reset)
1233 which has to be defined in a board specific file
c609719b
WD
1234
1235- ATAPI Support:
1236 CONFIG_ATAPI
1237
1238 Set this to enable ATAPI support.
1239
c40b2956
WD
1240- LBA48 Support
1241 CONFIG_LBA48
1242
1243 Set this to enable support for disks larger than 137GB
4b142feb 1244 Also look at CONFIG_SYS_64BIT_LBA.
c40b2956
WD
1245 Whithout these , LBA48 support uses 32bit variables and will 'only'
1246 support disks up to 2.1TB.
1247
6d0f6bcf 1248 CONFIG_SYS_64BIT_LBA:
c40b2956
WD
1249 When enabled, makes the IDE subsystem use 64bit sector addresses.
1250 Default is 32bit.
1251
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WD
1252- SCSI Support:
1253 At the moment only there is only support for the
1254 SYM53C8XX SCSI controller; define
1255 CONFIG_SCSI_SYM53C8XX to enable it.
1256
6d0f6bcf
JCPV
1257 CONFIG_SYS_SCSI_MAX_LUN [8], CONFIG_SYS_SCSI_MAX_SCSI_ID [7] and
1258 CONFIG_SYS_SCSI_MAX_DEVICE [CONFIG_SYS_SCSI_MAX_SCSI_ID *
1259 CONFIG_SYS_SCSI_MAX_LUN] can be adjusted to define the
c609719b
WD
1260 maximum numbers of LUNs, SCSI ID's and target
1261 devices.
6d0f6bcf 1262 CONFIG_SYS_SCSI_SYM53C8XX_CCF to fix clock timing (80Mhz)
c609719b 1263
93e14596
WD
1264 The environment variable 'scsidevs' is set to the number of
1265 SCSI devices found during the last scan.
447c031b 1266
c609719b 1267- NETWORK Support (PCI):
682011ff 1268 CONFIG_E1000
ce5207e1
KM
1269 Support for Intel 8254x/8257x gigabit chips.
1270
1271 CONFIG_E1000_SPI
1272 Utility code for direct access to the SPI bus on Intel 8257x.
1273 This does not do anything useful unless you set at least one
1274 of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.
1275
1276 CONFIG_E1000_SPI_GENERIC
1277 Allow generic access to the SPI bus on the Intel 8257x, for
1278 example with the "sspi" command.
1279
1280 CONFIG_CMD_E1000
1281 Management command for E1000 devices. When used on devices
1282 with SPI support you can reprogram the EEPROM from U-Boot.
53cf9435 1283
ac3315c2 1284 CONFIG_E1000_FALLBACK_MAC
11ccc33f 1285 default MAC for empty EEPROM after production.
ac3315c2 1286
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WD
1287 CONFIG_EEPRO100
1288 Support for Intel 82557/82559/82559ER chips.
11ccc33f 1289 Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM
c609719b
WD
1290 write routine for first time initialisation.
1291
1292 CONFIG_TULIP
1293 Support for Digital 2114x chips.
1294 Optional CONFIG_TULIP_SELECT_MEDIA for board specific
1295 modem chip initialisation (KS8761/QS6611).
1296
1297 CONFIG_NATSEMI
1298 Support for National dp83815 chips.
1299
1300 CONFIG_NS8382X
1301 Support for National dp8382[01] gigabit chips.
1302
45219c46
WD
1303- NETWORK Support (other):
1304
c041e9d2
JS
1305 CONFIG_DRIVER_AT91EMAC
1306 Support for AT91RM9200 EMAC.
1307
1308 CONFIG_RMII
1309 Define this to use reduced MII inteface
1310
1311 CONFIG_DRIVER_AT91EMAC_QUIET
1312 If this defined, the driver is quiet.
1313 The driver doen't show link status messages.
1314
efdd7319
RH
1315 CONFIG_CALXEDA_XGMAC
1316 Support for the Calxeda XGMAC device
1317
3bb46d23 1318 CONFIG_LAN91C96
45219c46
WD
1319 Support for SMSC's LAN91C96 chips.
1320
1321 CONFIG_LAN91C96_BASE
1322 Define this to hold the physical address
1323 of the LAN91C96's I/O space
1324
1325 CONFIG_LAN91C96_USE_32_BIT
1326 Define this to enable 32 bit addressing
1327
3bb46d23 1328 CONFIG_SMC91111
f39748ae
WD
1329 Support for SMSC's LAN91C111 chip
1330
1331 CONFIG_SMC91111_BASE
1332 Define this to hold the physical address
1333 of the device (I/O space)
1334
1335 CONFIG_SMC_USE_32_BIT
1336 Define this if data bus is 32 bits
1337
1338 CONFIG_SMC_USE_IOFUNCS
1339 Define this to use i/o functions instead of macros
1340 (some hardware wont work with macros)
1341
dc02bada
HS
1342 CONFIG_DRIVER_TI_EMAC
1343 Support for davinci emac
1344
1345 CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
1346 Define this if you have more then 3 PHYs.
1347
b3dbf4a5
ML
1348 CONFIG_FTGMAC100
1349 Support for Faraday's FTGMAC100 Gigabit SoC Ethernet
1350
1351 CONFIG_FTGMAC100_EGIGA
1352 Define this to use GE link update with gigabit PHY.
1353 Define this if FTGMAC100 is connected to gigabit PHY.
1354 If your system has 10/100 PHY only, it might not occur
1355 wrong behavior. Because PHY usually return timeout or
1356 useless data when polling gigabit status and gigabit
1357 control registers. This behavior won't affect the
1358 correctnessof 10/100 link speed update.
1359
c2fff331 1360 CONFIG_SMC911X
557b377d
JG
1361 Support for SMSC's LAN911x and LAN921x chips
1362
c2fff331 1363 CONFIG_SMC911X_BASE
557b377d
JG
1364 Define this to hold the physical address
1365 of the device (I/O space)
1366
c2fff331 1367 CONFIG_SMC911X_32_BIT
557b377d
JG
1368 Define this if data bus is 32 bits
1369
c2fff331 1370 CONFIG_SMC911X_16_BIT
557b377d
JG
1371 Define this if data bus is 16 bits. If your processor
1372 automatically converts one 32 bit word to two 16 bit
c2fff331 1373 words you may also try CONFIG_SMC911X_32_BIT.
557b377d 1374
3d0075fa
YS
1375 CONFIG_SH_ETHER
1376 Support for Renesas on-chip Ethernet controller
1377
1378 CONFIG_SH_ETHER_USE_PORT
1379 Define the number of ports to be used
1380
1381 CONFIG_SH_ETHER_PHY_ADDR
1382 Define the ETH PHY's address
1383
68260aab
YS
1384 CONFIG_SH_ETHER_CACHE_WRITEBACK
1385 If this option is set, the driver enables cache flush.
1386
b2f97cf2
HS
1387- PWM Support:
1388 CONFIG_PWM_IMX
1389 Support for PWM modul on the imx6.
1390
5e124724 1391- TPM Support:
90899cc0
CC
1392 CONFIG_TPM
1393 Support TPM devices.
1394
1b393db5
TWHT
1395 CONFIG_TPM_TIS_I2C
1396 Support for i2c bus TPM devices. Only one device
1397 per system is supported at this time.
1398
1399 CONFIG_TPM_TIS_I2C_BUS_NUMBER
1400 Define the the i2c bus number for the TPM device
1401
1402 CONFIG_TPM_TIS_I2C_SLAVE_ADDRESS
1403 Define the TPM's address on the i2c bus
1404
1405 CONFIG_TPM_TIS_I2C_BURST_LIMITATION
1406 Define the burst count bytes upper limit
1407
c01939c7
DE
1408 CONFIG_TPM_ATMEL_TWI
1409 Support for Atmel TWI TPM device. Requires I2C support.
1410
90899cc0 1411 CONFIG_TPM_TIS_LPC
5e124724
VB
1412 Support for generic parallel port TPM devices. Only one device
1413 per system is supported at this time.
1414
1415 CONFIG_TPM_TIS_BASE_ADDRESS
1416 Base address where the generic TPM device is mapped
1417 to. Contemporary x86 systems usually map it at
1418 0xfed40000.
1419
be6c1529
RP
1420 CONFIG_CMD_TPM
1421 Add tpm monitor functions.
1422 Requires CONFIG_TPM. If CONFIG_TPM_AUTH_SESSIONS is set, also
1423 provides monitor access to authorized functions.
1424
1425 CONFIG_TPM
1426 Define this to enable the TPM support library which provides
1427 functional interfaces to some TPM commands.
1428 Requires support for a TPM device.
1429
1430 CONFIG_TPM_AUTH_SESSIONS
1431 Define this to enable authorized functions in the TPM library.
1432 Requires CONFIG_TPM and CONFIG_SHA1.
1433
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WD
1434- USB Support:
1435 At the moment only the UHCI host controller is
4d13cbad 1436 supported (PIP405, MIP405, MPC5200); define
c609719b
WD
1437 CONFIG_USB_UHCI to enable it.
1438 define CONFIG_USB_KEYBOARD to enable the USB Keyboard
30d56fae 1439 and define CONFIG_USB_STORAGE to enable the USB
c609719b
WD
1440 storage devices.
1441 Note:
1442 Supported are USB Keyboards and USB Floppy drives
1443 (TEAC FD-05PUB).
4d13cbad
WD
1444 MPC5200 USB requires additional defines:
1445 CONFIG_USB_CLOCK
1446 for 528 MHz Clock: 0x0001bbbb
307ecb6d
EM
1447 CONFIG_PSC3_USB
1448 for USB on PSC3
4d13cbad
WD
1449 CONFIG_USB_CONFIG
1450 for differential drivers: 0x00001000
1451 for single ended drivers: 0x00005000
307ecb6d
EM
1452 for differential drivers on PSC3: 0x00000100
1453 for single ended drivers on PSC3: 0x00004100
6d0f6bcf 1454 CONFIG_SYS_USB_EVENT_POLL
fdcfaa1b
ZW
1455 May be defined to allow interrupt polling
1456 instead of using asynchronous interrupts
4d13cbad 1457
9ab4ce22
SG
1458 CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the
1459 txfilltuning field in the EHCI controller on reset.
1460
6e9e0626
OT
1461 CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2
1462 HW module registers.
1463
16c8d5e7
WD
1464- USB Device:
1465 Define the below if you wish to use the USB console.
1466 Once firmware is rebuilt from a serial console issue the
1467 command "setenv stdin usbtty; setenv stdout usbtty" and
11ccc33f 1468 attach your USB cable. The Unix command "dmesg" should print
16c8d5e7
WD
1469 it has found a new device. The environment variable usbtty
1470 can be set to gserial or cdc_acm to enable your device to
386eda02 1471 appear to a USB host as a Linux gserial device or a
16c8d5e7
WD
1472 Common Device Class Abstract Control Model serial device.
1473 If you select usbtty = gserial you should be able to enumerate
1474 a Linux host by
1475 # modprobe usbserial vendor=0xVendorID product=0xProductID
1476 else if using cdc_acm, simply setting the environment
1477 variable usbtty to be cdc_acm should suffice. The following
1478 might be defined in YourBoardName.h
386eda02 1479
16c8d5e7
WD
1480 CONFIG_USB_DEVICE
1481 Define this to build a UDC device
1482
1483 CONFIG_USB_TTY
1484 Define this to have a tty type of device available to
1485 talk to the UDC device
386eda02 1486
f9da0f89
VK
1487 CONFIG_USBD_HS
1488 Define this to enable the high speed support for usb
1489 device and usbtty. If this feature is enabled, a routine
1490 int is_usbd_high_speed(void)
1491 also needs to be defined by the driver to dynamically poll
1492 whether the enumeration has succeded at high speed or full
1493 speed.
1494
6d0f6bcf 1495 CONFIG_SYS_CONSOLE_IS_IN_ENV
16c8d5e7
WD
1496 Define this if you want stdin, stdout &/or stderr to
1497 be set to usbtty.
1498
1499 mpc8xx:
6d0f6bcf 1500 CONFIG_SYS_USB_EXTC_CLK 0xBLAH
16c8d5e7 1501 Derive USB clock from external clock "blah"
6d0f6bcf 1502 - CONFIG_SYS_USB_EXTC_CLK 0x02
386eda02 1503
6d0f6bcf 1504 CONFIG_SYS_USB_BRG_CLK 0xBLAH
16c8d5e7 1505 Derive USB clock from brgclk
6d0f6bcf 1506 - CONFIG_SYS_USB_BRG_CLK 0x04
16c8d5e7 1507
386eda02 1508 If you have a USB-IF assigned VendorID then you may wish to
16c8d5e7 1509 define your own vendor specific values either in BoardName.h
386eda02 1510 or directly in usbd_vendor_info.h. If you don't define
16c8d5e7
WD
1511 CONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME,
1512 CONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot
1513 should pretend to be a Linux device to it's target host.
1514
1515 CONFIG_USBD_MANUFACTURER
1516 Define this string as the name of your company for
1517 - CONFIG_USBD_MANUFACTURER "my company"
386eda02 1518
16c8d5e7
WD
1519 CONFIG_USBD_PRODUCT_NAME
1520 Define this string as the name of your product
1521 - CONFIG_USBD_PRODUCT_NAME "acme usb device"
1522
1523 CONFIG_USBD_VENDORID
1524 Define this as your assigned Vendor ID from the USB
1525 Implementors Forum. This *must* be a genuine Vendor ID
1526 to avoid polluting the USB namespace.
1527 - CONFIG_USBD_VENDORID 0xFFFF
386eda02 1528
16c8d5e7
WD
1529 CONFIG_USBD_PRODUCTID
1530 Define this as the unique Product ID
1531 for your device
1532 - CONFIG_USBD_PRODUCTID 0xFFFF
4d13cbad 1533
d70a560f
IG
1534- ULPI Layer Support:
1535 The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
1536 the generic ULPI layer. The generic layer accesses the ULPI PHY
1537 via the platform viewport, so you need both the genric layer and
1538 the viewport enabled. Currently only Chipidea/ARC based
1539 viewport is supported.
1540 To enable the ULPI layer support, define CONFIG_USB_ULPI and
1541 CONFIG_USB_ULPI_VIEWPORT in your board configuration file.
6d365ea0
LS
1542 If your ULPI phy needs a different reference clock than the
1543 standard 24 MHz then you have to define CONFIG_ULPI_REF_CLK to
1544 the appropriate value in Hz.
c609719b 1545
71f95118 1546- MMC Support:
8bde7f77
WD
1547 The MMC controller on the Intel PXA is supported. To
1548 enable this define CONFIG_MMC. The MMC can be
1549 accessed from the boot prompt by mapping the device
71f95118 1550 to physical memory similar to flash. Command line is
602ad3b3
JL
1551 enabled with CONFIG_CMD_MMC. The MMC driver also works with
1552 the FAT fs. This is enabled with CONFIG_CMD_FAT.
71f95118 1553
afb35666
YS
1554 CONFIG_SH_MMCIF
1555 Support for Renesas on-chip MMCIF controller
1556
1557 CONFIG_SH_MMCIF_ADDR
1558 Define the base address of MMCIF registers
1559
1560 CONFIG_SH_MMCIF_CLK
1561 Define the clock frequency for MMCIF
1562
1fd93c6e
PA
1563 CONFIG_GENERIC_MMC
1564 Enable the generic MMC driver
1565
1566 CONFIG_SUPPORT_EMMC_BOOT
1567 Enable some additional features of the eMMC boot partitions.
1568
1569 CONFIG_SUPPORT_EMMC_RPMB
1570 Enable the commands for reading, writing and programming the
1571 key for the Replay Protection Memory Block partition in eMMC.
1572
b3ba6e94
TR
1573- USB Device Firmware Update (DFU) class support:
1574 CONFIG_DFU_FUNCTION
1575 This enables the USB portion of the DFU USB class
1576
1577 CONFIG_CMD_DFU
1578 This enables the command "dfu" which is used to have
1579 U-Boot create a DFU class device via USB. This command
1580 requires that the "dfu_alt_info" environment variable be
1581 set and define the alt settings to expose to the host.
1582
1583 CONFIG_DFU_MMC
1584 This enables support for exposing (e)MMC devices via DFU.
1585
c6631764
PA
1586 CONFIG_DFU_NAND
1587 This enables support for exposing NAND devices via DFU.
1588
a9479f04
AM
1589 CONFIG_DFU_RAM
1590 This enables support for exposing RAM via DFU.
1591 Note: DFU spec refer to non-volatile memory usage, but
1592 allow usages beyond the scope of spec - here RAM usage,
1593 one that would help mostly the developer.
1594
e7e75c70
HS
1595 CONFIG_SYS_DFU_DATA_BUF_SIZE
1596 Dfu transfer uses a buffer before writing data to the
1597 raw storage device. Make the size (in bytes) of this buffer
1598 configurable. The size of this buffer is also configurable
1599 through the "dfu_bufsiz" environment variable.
1600
ea2453d5
PA
1601 CONFIG_SYS_DFU_MAX_FILE_SIZE
1602 When updating files rather than the raw storage device,
1603 we use a static buffer to copy the file into and then write
1604 the buffer once we've been given the whole file. Define
1605 this to the maximum filesize (in bytes) for the buffer.
1606 Default is 4 MiB if undefined.
1607
001a8319
HS
1608 DFU_DEFAULT_POLL_TIMEOUT
1609 Poll timeout [ms], is the timeout a device can send to the
1610 host. The host must wait for this timeout before sending
1611 a subsequent DFU_GET_STATUS request to the device.
1612
1613 DFU_MANIFEST_POLL_TIMEOUT
1614 Poll timeout [ms], which the device sends to the host when
1615 entering dfuMANIFEST state. Host waits this timeout, before
1616 sending again an USB request to the device.
1617
3aab70af
SS
1618- USB Device Android Fastboot support:
1619 CONFIG_CMD_FASTBOOT
1620 This enables the command "fastboot" which enables the Android
1621 fastboot mode for the platform's USB device. Fastboot is a USB
1622 protocol for downloading images, flashing and device control
1623 used on Android devices.
1624 See doc/README.android-fastboot for more information.
1625
1626 CONFIG_ANDROID_BOOT_IMAGE
1627 This enables support for booting images which use the Android
1628 image format header.
1629
1630 CONFIG_USB_FASTBOOT_BUF_ADDR
1631 The fastboot protocol requires a large memory buffer for
1632 downloads. Define this to the starting RAM address to use for
1633 downloaded images.
1634
1635 CONFIG_USB_FASTBOOT_BUF_SIZE
1636 The fastboot protocol requires a large memory buffer for
1637 downloads. This buffer should be as large as possible for a
1638 platform. Define this to the size available RAM for fastboot.
d1b5ed07
SR
1639
1640 CONFIG_FASTBOOT_FLASH
1641 The fastboot protocol includes a "flash" command for writing
1642 the downloaded image to a non-volatile storage device. Define
1643 this to enable the "fastboot flash" command.
1644
1645 CONFIG_FASTBOOT_FLASH_MMC_DEV
1646 The fastboot "flash" command requires additional information
1647 regarding the non-volatile storage device. Define this to
1648 the eMMC device that fastboot should use to store the image.
3aab70af 1649
6705d81e
WD
1650- Journaling Flash filesystem support:
1651 CONFIG_JFFS2_NAND, CONFIG_JFFS2_NAND_OFF, CONFIG_JFFS2_NAND_SIZE,
1652 CONFIG_JFFS2_NAND_DEV
1653 Define these for a default partition on a NAND device
1654
6d0f6bcf
JCPV
1655 CONFIG_SYS_JFFS2_FIRST_SECTOR,
1656 CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS
6705d81e
WD
1657 Define these for a default partition on a NOR device
1658
6d0f6bcf 1659 CONFIG_SYS_JFFS_CUSTOM_PART
6705d81e
WD
1660 Define this to create an own partition. You have to provide a
1661 function struct part_info* jffs2_part_info(int part_num)
1662
1663 If you define only one JFFS2 partition you may also want to
6d0f6bcf 1664 #define CONFIG_SYS_JFFS_SINGLE_PART 1
6705d81e
WD
1665 to disable the command chpart. This is the default when you
1666 have not defined a custom partition
1667
c30a15e5
DK
1668- FAT(File Allocation Table) filesystem write function support:
1669 CONFIG_FAT_WRITE
656f4c65
DK
1670
1671 Define this to enable support for saving memory data as a
1672 file in FAT formatted partition.
1673
1674 This will also enable the command "fatwrite" enabling the
1675 user to write files to FAT.
c30a15e5 1676
84cd9327
GB
1677CBFS (Coreboot Filesystem) support
1678 CONFIG_CMD_CBFS
1679
1680 Define this to enable support for reading from a Coreboot
1681 filesystem. Available commands are cbfsinit, cbfsinfo, cbfsls
1682 and cbfsload.
1683
4f0d1a2a
SDPP
1684- FAT(File Allocation Table) filesystem cluster size:
1685 CONFIG_FS_FAT_MAX_CLUSTSIZE
1686
1687 Define the max cluster size for fat operations else
1688 a default value of 65536 will be defined.
1689
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WD
1690- Keyboard Support:
1691 CONFIG_ISA_KEYBOARD
1692
1693 Define this to enable standard (PC-Style) keyboard
1694 support
1695
1696 CONFIG_I8042_KBD
1697 Standard PC keyboard driver with US (is default) and
1698 GERMAN key layout (switch via environment 'keymap=de') support.
1699 Export function i8042_kbd_init, i8042_tstc and i8042_getc
1700 for cfb_console. Supports cursor blinking.
1701
713cb680
HT
1702 CONFIG_CROS_EC_KEYB
1703 Enables a Chrome OS keyboard using the CROS_EC interface.
1704 This uses CROS_EC to communicate with a second microcontroller
1705 which provides key scans on request.
1706
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WD
1707- Video support:
1708 CONFIG_VIDEO
1709
1710 Define this to enable video support (for output to
1711 video).
1712
1713 CONFIG_VIDEO_CT69000
1714
1715 Enable Chips & Technologies 69000 Video chip
1716
1717 CONFIG_VIDEO_SMI_LYNXEM
b79a11cc 1718 Enable Silicon Motion SMI 712/710/810 Video chip. The
eeb1b77b
WD
1719 video output is selected via environment 'videoout'
1720 (1 = LCD and 2 = CRT). If videoout is undefined, CRT is
1721 assumed.
1722
b79a11cc 1723 For the CT69000 and SMI_LYNXEM drivers, videomode is
11ccc33f 1724 selected via environment 'videomode'. Two different ways
eeb1b77b
WD
1725 are possible:
1726 - "videomode=num" 'num' is a standard LiLo mode numbers.
6e592385 1727 Following standard modes are supported (* is default):
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WD
1728
1729 Colors 640x480 800x600 1024x768 1152x864 1280x1024
1730 -------------+---------------------------------------------
1731 8 bits | 0x301* 0x303 0x305 0x161 0x307
1732 15 bits | 0x310 0x313 0x316 0x162 0x319
1733 16 bits | 0x311 0x314 0x317 0x163 0x31A
1734 24 bits | 0x312 0x315 0x318 ? 0x31B
1735 -------------+---------------------------------------------
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WD
1736 (i.e. setenv videomode 317; saveenv; reset;)
1737
b79a11cc 1738 - "videomode=bootargs" all the video parameters are parsed
7817cb20 1739 from the bootargs. (See drivers/video/videomodes.c)
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WD
1740
1741
c1551ea8 1742 CONFIG_VIDEO_SED13806
43d9616c 1743 Enable Epson SED13806 driver. This driver supports 8bpp
a6c7ad2f
WD
1744 and 16bpp modes defined by CONFIG_VIDEO_SED13806_8BPP
1745 or CONFIG_VIDEO_SED13806_16BPP
1746
7d3053fb 1747 CONFIG_FSL_DIU_FB
04e5ae79 1748 Enable the Freescale DIU video driver. Reference boards for
7d3053fb
TT
1749 SOCs that have a DIU should define this macro to enable DIU
1750 support, and should also define these other macros:
1751
1752 CONFIG_SYS_DIU_ADDR
1753 CONFIG_VIDEO
1754 CONFIG_CMD_BMP
1755 CONFIG_CFB_CONSOLE
1756 CONFIG_VIDEO_SW_CURSOR
1757 CONFIG_VGA_AS_SINGLE_DEVICE
1758 CONFIG_VIDEO_LOGO
1759 CONFIG_VIDEO_BMP_LOGO
1760
ba8e76bd
TT
1761 The DIU driver will look for the 'video-mode' environment
1762 variable, and if defined, enable the DIU as a console during
1763 boot. See the documentation file README.video for a
1764 description of this variable.
7d3053fb 1765
058d59b0
SG
1766 CONFIG_VIDEO_VGA
1767
1768 Enable the VGA video / BIOS for x86. The alternative if you
1769 are using coreboot is to use the coreboot frame buffer
1770 driver.
1771
1772
682011ff 1773- Keyboard Support:
8bde7f77 1774 CONFIG_KEYBOARD
682011ff 1775
8bde7f77
WD
1776 Define this to enable a custom keyboard support.
1777 This simply calls drv_keyboard_init() which must be
1778 defined in your board-specific files.
1779 The only board using this so far is RBC823.
a6c7ad2f 1780
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WD
1781- LCD Support: CONFIG_LCD
1782
1783 Define this to enable LCD support (for output to LCD
1784 display); also select one of the supported displays
1785 by defining one of these:
1786
39cf4804
SP
1787 CONFIG_ATMEL_LCD:
1788
1789 HITACHI TX09D70VM1CCA, 3.5", 240x320.
1790
fd3103bb 1791 CONFIG_NEC_NL6448AC33:
c609719b 1792
fd3103bb 1793 NEC NL6448AC33-18. Active, color, single scan.
c609719b 1794
fd3103bb 1795 CONFIG_NEC_NL6448BC20
c609719b 1796
fd3103bb
WD
1797 NEC NL6448BC20-08. 6.5", 640x480.
1798 Active, color, single scan.
1799
1800 CONFIG_NEC_NL6448BC33_54
1801
1802 NEC NL6448BC33-54. 10.4", 640x480.
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WD
1803 Active, color, single scan.
1804
1805 CONFIG_SHARP_16x9
1806
1807 Sharp 320x240. Active, color, single scan.
1808 It isn't 16x9, and I am not sure what it is.
1809
1810 CONFIG_SHARP_LQ64D341
1811
1812 Sharp LQ64D341 display, 640x480.
1813 Active, color, single scan.
1814
1815 CONFIG_HLD1045
1816
1817 HLD1045 display, 640x480.
1818 Active, color, single scan.
1819
1820 CONFIG_OPTREX_BW
1821
1822 Optrex CBL50840-2 NF-FW 99 22 M5
1823 or
1824 Hitachi LMG6912RPFC-00T
1825 or
1826 Hitachi SP14Q002
1827
1828 320x240. Black & white.
1829
1830 Normally display is black on white background; define
6d0f6bcf 1831 CONFIG_SYS_WHITE_ON_BLACK to get it inverted.
c609719b 1832
676d319e
SG
1833 CONFIG_LCD_ALIGNMENT
1834
1835 Normally the LCD is page-aligned (tyically 4KB). If this is
1836 defined then the LCD will be aligned to this value instead.
1837 For ARM it is sometimes useful to use MMU_SECTION_SIZE
1838 here, since it is cheaper to change data cache settings on
1839 a per-section basis.
1840
0d89efef
SG
1841 CONFIG_CONSOLE_SCROLL_LINES
1842
1843 When the console need to be scrolled, this is the number of
1844 lines to scroll by. It defaults to 1. Increasing this makes
1845 the console jump but can help speed up operation when scrolling
1846 is slow.
676d319e 1847
45d7f525
TWHT
1848 CONFIG_LCD_BMP_RLE8
1849
1850 Support drawing of RLE8-compressed bitmaps on the LCD.
1851
735987c5
TWHT
1852 CONFIG_I2C_EDID
1853
1854 Enables an 'i2c edid' command which can read EDID
1855 information over I2C from an attached LCD display.
1856
7152b1d0 1857- Splash Screen Support: CONFIG_SPLASH_SCREEN
d791b1dc 1858
8bde7f77
WD
1859 If this option is set, the environment is checked for
1860 a variable "splashimage". If found, the usual display
1861 of logo, copyright and system information on the LCD
e94d2cd9 1862 is suppressed and the BMP image at the address
8bde7f77
WD
1863 specified in "splashimage" is loaded instead. The
1864 console is redirected to the "nulldev", too. This
1865 allows for a "silent" boot where a splash screen is
1866 loaded very quickly after power-on.
d791b1dc 1867
c0880485
NK
1868 CONFIG_SPLASHIMAGE_GUARD
1869
1870 If this option is set, then U-Boot will prevent the environment
1871 variable "splashimage" from being set to a problematic address
1551df35 1872 (see README.displaying-bmps).
c0880485
NK
1873 This option is useful for targets where, due to alignment
1874 restrictions, an improperly aligned BMP image will cause a data
1875 abort. If you think you will not have problems with unaligned
1876 accesses (for example because your toolchain prevents them)
1877 there is no need to set this option.
1878
1ca298ce
MW
1879 CONFIG_SPLASH_SCREEN_ALIGN
1880
1881 If this option is set the splash image can be freely positioned
1882 on the screen. Environment variable "splashpos" specifies the
1883 position as "x,y". If a positive number is given it is used as
1884 number of pixel from left/top. If a negative number is given it
1885 is used as number of pixel from right/bottom. You can also
1886 specify 'm' for centering the image.
1887
1888 Example:
1889 setenv splashpos m,m
1890 => image at center of screen
1891
1892 setenv splashpos 30,20
1893 => image at x = 30 and y = 20
1894
1895 setenv splashpos -10,m
1896 => vertically centered image
1897 at x = dspWidth - bmpWidth - 9
1898
98f4a3df
SR
1899- Gzip compressed BMP image support: CONFIG_VIDEO_BMP_GZIP
1900
1901 If this option is set, additionally to standard BMP
1902 images, gzipped BMP images can be displayed via the
1903 splashscreen support or the bmp command.
1904
d5011762
AG
1905- Run length encoded BMP image (RLE8) support: CONFIG_VIDEO_BMP_RLE8
1906
1907 If this option is set, 8-bit RLE compressed BMP images
1908 can be displayed via the splashscreen support or the
1909 bmp command.
1910
f2b96dfb
LW
1911- Do compresssing for memory range:
1912 CONFIG_CMD_ZIP
1913
1914 If this option is set, it would use zlib deflate method
1915 to compress the specified memory at its best effort.
1916
c29fdfc1 1917- Compression support:
8ef70478
KC
1918 CONFIG_GZIP
1919
1920 Enabled by default to support gzip compressed images.
1921
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WD
1922 CONFIG_BZIP2
1923
1924 If this option is set, support for bzip2 compressed
1925 images is included. If not, only uncompressed and gzip
1926 compressed images are supported.
1927
42d1f039 1928 NOTE: the bzip2 algorithm requires a lot of RAM, so
6d0f6bcf 1929 the malloc area (as defined by CONFIG_SYS_MALLOC_LEN) should
42d1f039 1930 be at least 4MB.
d791b1dc 1931
fc9c1727
LCM
1932 CONFIG_LZMA
1933
1934 If this option is set, support for lzma compressed
1935 images is included.
1936
1937 Note: The LZMA algorithm adds between 2 and 4KB of code and it
1938 requires an amount of dynamic memory that is given by the
1939 formula:
1940
1941 (1846 + 768 << (lc + lp)) * sizeof(uint16)
1942
1943 Where lc and lp stand for, respectively, Literal context bits
1944 and Literal pos bits.
1945
1946 This value is upper-bounded by 14MB in the worst case. Anyway,
1947 for a ~4MB large kernel image, we have lc=3 and lp=0 for a
1948 total amount of (1846 + 768 << (3 + 0)) * 2 = ~41KB... that is
1949 a very small buffer.
1950
1951 Use the lzmainfo tool to determinate the lc and lp values and
1952 then calculate the amount of needed dynamic memory (ensuring
6d0f6bcf 1953 the appropriate CONFIG_SYS_MALLOC_LEN value).
fc9c1727 1954
8ef70478
KC
1955 CONFIG_LZO
1956
1957 If this option is set, support for LZO compressed images
1958 is included.
1959
17ea1177
WD
1960- MII/PHY support:
1961 CONFIG_PHY_ADDR
1962
1963 The address of PHY on MII bus.
1964
1965 CONFIG_PHY_CLOCK_FREQ (ppc4xx)
1966
1967 The clock frequency of the MII bus
1968
1969 CONFIG_PHY_GIGE
1970
1971 If this option is set, support for speed/duplex
11ccc33f 1972 detection of gigabit PHY is included.
17ea1177
WD
1973
1974 CONFIG_PHY_RESET_DELAY
1975
1976 Some PHY like Intel LXT971A need extra delay after
1977 reset before any MII register access is possible.
1978 For such PHY, set this option to the usec delay
1979 required. (minimum 300usec for LXT971A)
1980
1981 CONFIG_PHY_CMD_DELAY (ppc4xx)
1982
1983 Some PHY like Intel LXT971A need extra delay after
1984 command issued before MII status register can be read
1985
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WD
1986- Ethernet address:
1987 CONFIG_ETHADDR
c68a05fe 1988 CONFIG_ETH1ADDR
c609719b
WD
1989 CONFIG_ETH2ADDR
1990 CONFIG_ETH3ADDR
c68a05fe 1991 CONFIG_ETH4ADDR
1992 CONFIG_ETH5ADDR
c609719b 1993
11ccc33f
MZ
1994 Define a default value for Ethernet address to use
1995 for the respective Ethernet interface, in case this
c609719b
WD
1996 is not determined automatically.
1997
1998- IP address:
1999 CONFIG_IPADDR
2000
2001 Define a default value for the IP address to use for
11ccc33f 2002 the default Ethernet interface, in case this is not
c609719b 2003 determined through e.g. bootp.
1ebcd654 2004 (Environment variable "ipaddr")
c609719b
WD
2005
2006- Server IP address:
2007 CONFIG_SERVERIP
2008
11ccc33f 2009 Defines a default value for the IP address of a TFTP
c609719b 2010 server to contact when using the "tftboot" command.
1ebcd654 2011 (Environment variable "serverip")
c609719b 2012
97cfe861
RG
2013 CONFIG_KEEP_SERVERADDR
2014
2015 Keeps the server's MAC address, in the env 'serveraddr'
2016 for passing to bootargs (like Linux's netconsole option)
2017
1ebcd654
WD
2018- Gateway IP address:
2019 CONFIG_GATEWAYIP
2020
2021 Defines a default value for the IP address of the
2022 default router where packets to other networks are
2023 sent to.
2024 (Environment variable "gatewayip")
2025
2026- Subnet mask:
2027 CONFIG_NETMASK
2028
2029 Defines a default value for the subnet mask (or
2030 routing prefix) which is used to determine if an IP
2031 address belongs to the local subnet or needs to be
2032 forwarded through a router.
2033 (Environment variable "netmask")
2034
53a5c424
DU
2035- Multicast TFTP Mode:
2036 CONFIG_MCAST_TFTP
2037
2038 Defines whether you want to support multicast TFTP as per
2039 rfc-2090; for example to work with atftp. Lets lots of targets
11ccc33f 2040 tftp down the same boot image concurrently. Note: the Ethernet
53a5c424
DU
2041 driver in use must provide a function: mcast() to join/leave a
2042 multicast group.
2043
c609719b
WD
2044- BOOTP Recovery Mode:
2045 CONFIG_BOOTP_RANDOM_DELAY
2046
2047 If you have many targets in a network that try to
2048 boot using BOOTP, you may want to avoid that all
2049 systems send out BOOTP requests at precisely the same
2050 moment (which would happen for instance at recovery
2051 from a power failure, when all systems will try to
2052 boot, thus flooding the BOOTP server. Defining
2053 CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be
2054 inserted before sending out BOOTP requests. The
6c33c785 2055 following delays are inserted then:
c609719b
WD
2056
2057 1st BOOTP request: delay 0 ... 1 sec
2058 2nd BOOTP request: delay 0 ... 2 sec
2059 3rd BOOTP request: delay 0 ... 4 sec
2060 4th and following
2061 BOOTP requests: delay 0 ... 8 sec
2062
92ac8acc
TR
2063 CONFIG_BOOTP_ID_CACHE_SIZE
2064
2065 BOOTP packets are uniquely identified using a 32-bit ID. The
2066 server will copy the ID from client requests to responses and
2067 U-Boot will use this to determine if it is the destination of
2068 an incoming response. Some servers will check that addresses
2069 aren't in use before handing them out (usually using an ARP
2070 ping) and therefore take up to a few hundred milliseconds to
2071 respond. Network congestion may also influence the time it
2072 takes for a response to make it back to the client. If that
2073 time is too long, U-Boot will retransmit requests. In order
2074 to allow earlier responses to still be accepted after these
2075 retransmissions, U-Boot's BOOTP client keeps a small cache of
2076 IDs. The CONFIG_BOOTP_ID_CACHE_SIZE controls the size of this
2077 cache. The default is to keep IDs for up to four outstanding
2078 requests. Increasing this will allow U-Boot to accept offers
2079 from a BOOTP client in networks with unusually high latency.
2080
fe389a82 2081- DHCP Advanced Options:
1fe80d79
JL
2082 You can fine tune the DHCP functionality by defining
2083 CONFIG_BOOTP_* symbols:
2084
2085 CONFIG_BOOTP_SUBNETMASK
2086 CONFIG_BOOTP_GATEWAY
2087 CONFIG_BOOTP_HOSTNAME
2088 CONFIG_BOOTP_NISDOMAIN
2089 CONFIG_BOOTP_BOOTPATH
2090 CONFIG_BOOTP_BOOTFILESIZE
2091 CONFIG_BOOTP_DNS
2092 CONFIG_BOOTP_DNS2
2093 CONFIG_BOOTP_SEND_HOSTNAME
2094 CONFIG_BOOTP_NTPSERVER
2095 CONFIG_BOOTP_TIMEOFFSET
2096 CONFIG_BOOTP_VENDOREX
2c00e099 2097 CONFIG_BOOTP_MAY_FAIL
fe389a82 2098
5d110f0a
WC
2099 CONFIG_BOOTP_SERVERIP - TFTP server will be the serverip
2100 environment variable, not the BOOTP server.
fe389a82 2101
2c00e099
JH
2102 CONFIG_BOOTP_MAY_FAIL - If the DHCP server is not found
2103 after the configured retry count, the call will fail
2104 instead of starting over. This can be used to fail over
2105 to Link-local IP address configuration if the DHCP server
2106 is not available.
2107
fe389a82
SR
2108 CONFIG_BOOTP_DNS2 - If a DHCP client requests the DNS
2109 serverip from a DHCP server, it is possible that more
2110 than one DNS serverip is offered to the client.
2111 If CONFIG_BOOTP_DNS2 is enabled, the secondary DNS
2112 serverip will be stored in the additional environment
2113 variable "dnsip2". The first DNS serverip is always
2114 stored in the variable "dnsip", when CONFIG_BOOTP_DNS
1fe80d79 2115 is defined.
fe389a82
SR
2116
2117 CONFIG_BOOTP_SEND_HOSTNAME - Some DHCP servers are capable
2118 to do a dynamic update of a DNS server. To do this, they
2119 need the hostname of the DHCP requester.
5d110f0a 2120 If CONFIG_BOOTP_SEND_HOSTNAME is defined, the content
1fe80d79
JL
2121 of the "hostname" environment variable is passed as
2122 option 12 to the DHCP server.
fe389a82 2123
d9a2f416
AV
2124 CONFIG_BOOTP_DHCP_REQUEST_DELAY
2125
2126 A 32bit value in microseconds for a delay between
2127 receiving a "DHCP Offer" and sending the "DHCP Request".
2128 This fixes a problem with certain DHCP servers that don't
2129 respond 100% of the time to a "DHCP request". E.g. On an
2130 AT91RM9200 processor running at 180MHz, this delay needed
2131 to be *at least* 15,000 usec before a Windows Server 2003
2132 DHCP server would reply 100% of the time. I recommend at
2133 least 50,000 usec to be safe. The alternative is to hope
2134 that one of the retries will be successful but note that
2135 the DHCP timeout and retry process takes a longer than
2136 this delay.
2137
d22c338e
JH
2138 - Link-local IP address negotiation:
2139 Negotiate with other link-local clients on the local network
2140 for an address that doesn't require explicit configuration.
2141 This is especially useful if a DHCP server cannot be guaranteed
2142 to exist in all environments that the device must operate.
2143
2144 See doc/README.link-local for more information.
2145
a3d991bd 2146 - CDP Options:
6e592385 2147 CONFIG_CDP_DEVICE_ID
a3d991bd
WD
2148
2149 The device id used in CDP trigger frames.
2150
2151 CONFIG_CDP_DEVICE_ID_PREFIX
2152
2153 A two character string which is prefixed to the MAC address
2154 of the device.
2155
2156 CONFIG_CDP_PORT_ID
2157
2158 A printf format string which contains the ascii name of
2159 the port. Normally is set to "eth%d" which sets
11ccc33f 2160 eth0 for the first Ethernet, eth1 for the second etc.
a3d991bd
WD
2161
2162 CONFIG_CDP_CAPABILITIES
2163
2164 A 32bit integer which indicates the device capabilities;
2165 0x00000010 for a normal host which does not forwards.
2166
2167 CONFIG_CDP_VERSION
2168
2169 An ascii string containing the version of the software.
2170
2171 CONFIG_CDP_PLATFORM
2172
2173 An ascii string containing the name of the platform.
2174
2175 CONFIG_CDP_TRIGGER
2176
2177 A 32bit integer sent on the trigger.
2178
2179 CONFIG_CDP_POWER_CONSUMPTION
2180
2181 A 16bit integer containing the power consumption of the
2182 device in .1 of milliwatts.
2183
2184 CONFIG_CDP_APPLIANCE_VLAN_TYPE
2185
2186 A byte containing the id of the VLAN.
2187
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WD
2188- Status LED: CONFIG_STATUS_LED
2189
2190 Several configurations allow to display the current
2191 status using a LED. For instance, the LED will blink
2192 fast while running U-Boot code, stop blinking as
2193 soon as a reply to a BOOTP request was received, and
2194 start blinking slow once the Linux kernel is running
2195 (supported by a status LED driver in the Linux
2196 kernel). Defining CONFIG_STATUS_LED enables this
2197 feature in U-Boot.
2198
1df7bbba
IG
2199 Additional options:
2200
2201 CONFIG_GPIO_LED
2202 The status LED can be connected to a GPIO pin.
2203 In such cases, the gpio_led driver can be used as a
2204 status LED backend implementation. Define CONFIG_GPIO_LED
2205 to include the gpio_led driver in the U-Boot binary.
2206
9dfdcdfe
IG
2207 CONFIG_GPIO_LED_INVERTED_TABLE
2208 Some GPIO connected LEDs may have inverted polarity in which
2209 case the GPIO high value corresponds to LED off state and
2210 GPIO low value corresponds to LED on state.
2211 In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined
2212 with a list of GPIO LEDs that have inverted polarity.
2213
c609719b
WD
2214- CAN Support: CONFIG_CAN_DRIVER
2215
2216 Defining CONFIG_CAN_DRIVER enables CAN driver support
2217 on those systems that support this (optional)
2218 feature, like the TQM8xxL modules.
2219
3f4978c7
HS
2220- I2C Support: CONFIG_SYS_I2C
2221
2222 This enable the NEW i2c subsystem, and will allow you to use
2223 i2c commands at the u-boot command line (as long as you set
2224 CONFIG_CMD_I2C in CONFIG_COMMANDS) and communicate with i2c
2225 based realtime clock chips or other i2c devices. See
2226 common/cmd_i2c.c for a description of the command line
2227 interface.
2228
2229 ported i2c driver to the new framework:
ea818dbb
HS
2230 - drivers/i2c/soft_i2c.c:
2231 - activate first bus with CONFIG_SYS_I2C_SOFT define
2232 CONFIG_SYS_I2C_SOFT_SPEED and CONFIG_SYS_I2C_SOFT_SLAVE
2233 for defining speed and slave address
2234 - activate second bus with I2C_SOFT_DECLARATIONS2 define
2235 CONFIG_SYS_I2C_SOFT_SPEED_2 and CONFIG_SYS_I2C_SOFT_SLAVE_2
2236 for defining speed and slave address
2237 - activate third bus with I2C_SOFT_DECLARATIONS3 define
2238 CONFIG_SYS_I2C_SOFT_SPEED_3 and CONFIG_SYS_I2C_SOFT_SLAVE_3
2239 for defining speed and slave address
2240 - activate fourth bus with I2C_SOFT_DECLARATIONS4 define
2241 CONFIG_SYS_I2C_SOFT_SPEED_4 and CONFIG_SYS_I2C_SOFT_SLAVE_4
2242 for defining speed and slave address
3f4978c7 2243
00f792e0
HS
2244 - drivers/i2c/fsl_i2c.c:
2245 - activate i2c driver with CONFIG_SYS_I2C_FSL
2246 define CONFIG_SYS_FSL_I2C_OFFSET for setting the register
2247 offset CONFIG_SYS_FSL_I2C_SPEED for the i2c speed and
2248 CONFIG_SYS_FSL_I2C_SLAVE for the slave addr of the first
2249 bus.
93e14596 2250 - If your board supports a second fsl i2c bus, define
00f792e0
HS
2251 CONFIG_SYS_FSL_I2C2_OFFSET for the register offset
2252 CONFIG_SYS_FSL_I2C2_SPEED for the speed and
2253 CONFIG_SYS_FSL_I2C2_SLAVE for the slave address of the
2254 second bus.
2255
1f2ba722 2256 - drivers/i2c/tegra_i2c.c:
10cee516
NI
2257 - activate this driver with CONFIG_SYS_I2C_TEGRA
2258 - This driver adds 4 i2c buses with a fix speed from
2259 100000 and the slave addr 0!
1f2ba722 2260
880540de
DE
2261 - drivers/i2c/ppc4xx_i2c.c
2262 - activate this driver with CONFIG_SYS_I2C_PPC4XX
2263 - CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0
2264 - CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1
2265
fac96408 2266 - drivers/i2c/i2c_mxc.c
2267 - activate this driver with CONFIG_SYS_I2C_MXC
2268 - define speed for bus 1 with CONFIG_SYS_MXC_I2C1_SPEED
2269 - define slave for bus 1 with CONFIG_SYS_MXC_I2C1_SLAVE
2270 - define speed for bus 2 with CONFIG_SYS_MXC_I2C2_SPEED
2271 - define slave for bus 2 with CONFIG_SYS_MXC_I2C2_SLAVE
2272 - define speed for bus 3 with CONFIG_SYS_MXC_I2C3_SPEED
2273 - define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE
2274 If thoses defines are not set, default value is 100000
2275 for speed, and 0 for slave.
2276
1086bfa9
NI
2277 - drivers/i2c/rcar_i2c.c:
2278 - activate this driver with CONFIG_SYS_I2C_RCAR
2279 - This driver adds 4 i2c buses
2280
2281 - CONFIG_SYS_RCAR_I2C0_BASE for setting the register channel 0
2282 - CONFIG_SYS_RCAR_I2C0_SPEED for for the speed channel 0
2283 - CONFIG_SYS_RCAR_I2C1_BASE for setting the register channel 1
2284 - CONFIG_SYS_RCAR_I2C1_SPEED for for the speed channel 1
2285 - CONFIG_SYS_RCAR_I2C2_BASE for setting the register channel 2
2286 - CONFIG_SYS_RCAR_I2C2_SPEED for for the speed channel 2
2287 - CONFIG_SYS_RCAR_I2C3_BASE for setting the register channel 3
2288 - CONFIG_SYS_RCAR_I2C3_SPEED for for the speed channel 3
2289 - CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS for number of i2c buses
2290
2035d77d
NI
2291 - drivers/i2c/sh_i2c.c:
2292 - activate this driver with CONFIG_SYS_I2C_SH
2293 - This driver adds from 2 to 5 i2c buses
2294
2295 - CONFIG_SYS_I2C_SH_BASE0 for setting the register channel 0
2296 - CONFIG_SYS_I2C_SH_SPEED0 for for the speed channel 0
2297 - CONFIG_SYS_I2C_SH_BASE1 for setting the register channel 1
2298 - CONFIG_SYS_I2C_SH_SPEED1 for for the speed channel 1
2299 - CONFIG_SYS_I2C_SH_BASE2 for setting the register channel 2
2300 - CONFIG_SYS_I2C_SH_SPEED2 for for the speed channel 2
2301 - CONFIG_SYS_I2C_SH_BASE3 for setting the register channel 3
2302 - CONFIG_SYS_I2C_SH_SPEED3 for for the speed channel 3
2303 - CONFIG_SYS_I2C_SH_BASE4 for setting the register channel 4
2304 - CONFIG_SYS_I2C_SH_SPEED4 for for the speed channel 4
2305 - CONFIG_SYS_I2C_SH_BASE5 for setting the register channel 5
2306 - CONFIG_SYS_I2C_SH_SPEED5 for for the speed channel 5
2307 - CONFIF_SYS_I2C_SH_NUM_CONTROLLERS for nummber of i2c buses
2308
6789e84e
HS
2309 - drivers/i2c/omap24xx_i2c.c
2310 - activate this driver with CONFIG_SYS_I2C_OMAP24XX
2311 - CONFIG_SYS_OMAP24_I2C_SPEED speed channel 0
2312 - CONFIG_SYS_OMAP24_I2C_SLAVE slave addr channel 0
2313 - CONFIG_SYS_OMAP24_I2C_SPEED1 speed channel 1
2314 - CONFIG_SYS_OMAP24_I2C_SLAVE1 slave addr channel 1
2315 - CONFIG_SYS_OMAP24_I2C_SPEED2 speed channel 2
2316 - CONFIG_SYS_OMAP24_I2C_SLAVE2 slave addr channel 2
2317 - CONFIG_SYS_OMAP24_I2C_SPEED3 speed channel 3
2318 - CONFIG_SYS_OMAP24_I2C_SLAVE3 slave addr channel 3
2319 - CONFIG_SYS_OMAP24_I2C_SPEED4 speed channel 4
2320 - CONFIG_SYS_OMAP24_I2C_SLAVE4 slave addr channel 4
2321
0bdffe71
HS
2322 - drivers/i2c/zynq_i2c.c
2323 - activate this driver with CONFIG_SYS_I2C_ZYNQ
2324 - set CONFIG_SYS_I2C_ZYNQ_SPEED for speed setting
2325 - set CONFIG_SYS_I2C_ZYNQ_SLAVE for slave addr
2326
e717fc6d
NKC
2327 - drivers/i2c/s3c24x0_i2c.c:
2328 - activate this driver with CONFIG_SYS_I2C_S3C24X0
2329 - This driver adds i2c buses (11 for Exynos5250, Exynos5420
2330 9 i2c buses for Exynos4 and 1 for S3C24X0 SoCs from Samsung)
2331 with a fix speed from 100000 and the slave addr 0!
2332
b46226bd
DE
2333 - drivers/i2c/ihs_i2c.c
2334 - activate this driver with CONFIG_SYS_I2C_IHS
2335 - CONFIG_SYS_I2C_IHS_CH0 activate hardware channel 0
2336 - CONFIG_SYS_I2C_IHS_SPEED_0 speed channel 0
2337 - CONFIG_SYS_I2C_IHS_SLAVE_0 slave addr channel 0
2338 - CONFIG_SYS_I2C_IHS_CH1 activate hardware channel 1
2339 - CONFIG_SYS_I2C_IHS_SPEED_1 speed channel 1
2340 - CONFIG_SYS_I2C_IHS_SLAVE_1 slave addr channel 1
2341 - CONFIG_SYS_I2C_IHS_CH2 activate hardware channel 2
2342 - CONFIG_SYS_I2C_IHS_SPEED_2 speed channel 2
2343 - CONFIG_SYS_I2C_IHS_SLAVE_2 slave addr channel 2
2344 - CONFIG_SYS_I2C_IHS_CH3 activate hardware channel 3
2345 - CONFIG_SYS_I2C_IHS_SPEED_3 speed channel 3
2346 - CONFIG_SYS_I2C_IHS_SLAVE_3 slave addr channel 3
2347
3f4978c7
HS
2348 additional defines:
2349
2350 CONFIG_SYS_NUM_I2C_BUSES
2351 Hold the number of i2c busses you want to use. If you
2352 don't use/have i2c muxes on your i2c bus, this
2353 is equal to CONFIG_SYS_NUM_I2C_ADAPTERS, and you can
2354 omit this define.
2355
2356 CONFIG_SYS_I2C_DIRECT_BUS
2357 define this, if you don't use i2c muxes on your hardware.
2358 if CONFIG_SYS_I2C_MAX_HOPS is not defined or == 0 you can
2359 omit this define.
2360
2361 CONFIG_SYS_I2C_MAX_HOPS
2362 define how many muxes are maximal consecutively connected
2363 on one i2c bus. If you not use i2c muxes, omit this
2364 define.
2365
2366 CONFIG_SYS_I2C_BUSES
2367 hold a list of busses you want to use, only used if
2368 CONFIG_SYS_I2C_DIRECT_BUS is not defined, for example
2369 a board with CONFIG_SYS_I2C_MAX_HOPS = 1 and
2370 CONFIG_SYS_NUM_I2C_BUSES = 9:
2371
2372 CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP}}, \
2373 {0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \
2374 {0, {{I2C_MUX_PCA9547, 0x70, 2}}}, \
2375 {0, {{I2C_MUX_PCA9547, 0x70, 3}}}, \
2376 {0, {{I2C_MUX_PCA9547, 0x70, 4}}}, \
2377 {0, {{I2C_MUX_PCA9547, 0x70, 5}}}, \
2378 {1, {I2C_NULL_HOP}}, \
2379 {1, {{I2C_MUX_PCA9544, 0x72, 1}}}, \
2380 {1, {{I2C_MUX_PCA9544, 0x72, 2}}}, \
2381 }
2382
2383 which defines
2384 bus 0 on adapter 0 without a mux
ea818dbb
HS
2385 bus 1 on adapter 0 with a PCA9547 on address 0x70 port 1
2386 bus 2 on adapter 0 with a PCA9547 on address 0x70 port 2
2387 bus 3 on adapter 0 with a PCA9547 on address 0x70 port 3
2388 bus 4 on adapter 0 with a PCA9547 on address 0x70 port 4
2389 bus 5 on adapter 0 with a PCA9547 on address 0x70 port 5
3f4978c7 2390 bus 6 on adapter 1 without a mux
ea818dbb
HS
2391 bus 7 on adapter 1 with a PCA9544 on address 0x72 port 1
2392 bus 8 on adapter 1 with a PCA9544 on address 0x72 port 2
3f4978c7
HS
2393
2394 If you do not have i2c muxes on your board, omit this define.
2395
ea818dbb 2396- Legacy I2C Support: CONFIG_HARD_I2C
3f4978c7
HS
2397
2398 NOTE: It is intended to move drivers to CONFIG_SYS_I2C which
2399 provides the following compelling advantages:
2400
2401 - more than one i2c adapter is usable
2402 - approved multibus support
2403 - better i2c mux support
2404
2405 ** Please consider updating your I2C driver now. **
2406
ea818dbb
HS
2407 These enable legacy I2C serial bus commands. Defining
2408 CONFIG_HARD_I2C will include the appropriate I2C driver
2409 for the selected CPU.
c609719b 2410
945af8d7 2411 This will allow you to use i2c commands at the u-boot
602ad3b3 2412 command line (as long as you set CONFIG_CMD_I2C in
b37c7e5e
WD
2413 CONFIG_COMMANDS) and communicate with i2c based realtime
2414 clock chips. See common/cmd_i2c.c for a description of the
43d9616c 2415 command line interface.
c609719b 2416
bb99ad6d 2417 CONFIG_HARD_I2C selects a hardware I2C controller.
b37c7e5e 2418
945af8d7 2419 There are several other quantities that must also be
ea818dbb 2420 defined when you define CONFIG_HARD_I2C.
c609719b 2421
6d0f6bcf 2422 In both cases you will need to define CONFIG_SYS_I2C_SPEED
945af8d7 2423 to be the frequency (in Hz) at which you wish your i2c bus
6d0f6bcf 2424 to run and CONFIG_SYS_I2C_SLAVE to be the address of this node (ie
11ccc33f 2425 the CPU's i2c node address).
945af8d7 2426
8d321b81 2427 Now, the u-boot i2c code for the mpc8xx
a47a12be 2428 (arch/powerpc/cpu/mpc8xx/i2c.c) sets the CPU up as a master node
8d321b81
PT
2429 and so its address should therefore be cleared to 0 (See,
2430 eg, MPC823e User's Manual p.16-473). So, set
2431 CONFIG_SYS_I2C_SLAVE to 0.
c609719b 2432
5da71efa
EM
2433 CONFIG_SYS_I2C_INIT_MPC5XXX
2434
2435 When a board is reset during an i2c bus transfer
2436 chips might think that the current transfer is still
2437 in progress. Reset the slave devices by sending start
2438 commands until the slave device responds.
2439
945af8d7 2440 That's all that's required for CONFIG_HARD_I2C.
c609719b 2441
ea818dbb 2442 If you use the software i2c interface (CONFIG_SYS_I2C_SOFT)
b37c7e5e
WD
2443 then the following macros need to be defined (examples are
2444 from include/configs/lwmon.h):
c609719b
WD
2445
2446 I2C_INIT
2447
b37c7e5e 2448 (Optional). Any commands necessary to enable the I2C
43d9616c 2449 controller or configure ports.
c609719b 2450
ba56f625 2451 eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
b37c7e5e 2452
c609719b
WD
2453 I2C_PORT
2454
43d9616c
WD
2455 (Only for MPC8260 CPU). The I/O port to use (the code
2456 assumes both bits are on the same port). Valid values
2457 are 0..3 for ports A..D.
c609719b
WD
2458
2459 I2C_ACTIVE
2460
2461 The code necessary to make the I2C data line active
2462 (driven). If the data line is open collector, this
2463 define can be null.
2464
b37c7e5e
WD
2465 eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
2466
c609719b
WD
2467 I2C_TRISTATE
2468
2469 The code necessary to make the I2C data line tri-stated
2470 (inactive). If the data line is open collector, this
2471 define can be null.
2472
b37c7e5e
WD
2473 eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
2474
c609719b
WD
2475 I2C_READ
2476
472d5460
YS
2477 Code that returns true if the I2C data line is high,
2478 false if it is low.
c609719b 2479
b37c7e5e
WD
2480 eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
2481
c609719b
WD
2482 I2C_SDA(bit)
2483
472d5460
YS
2484 If <bit> is true, sets the I2C data line high. If it
2485 is false, it clears it (low).
c609719b 2486
b37c7e5e 2487 eg: #define I2C_SDA(bit) \
2535d602 2488 if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
ba56f625 2489 else immr->im_cpm.cp_pbdat &= ~PB_SDA
b37c7e5e 2490
c609719b
WD
2491 I2C_SCL(bit)
2492
472d5460
YS
2493 If <bit> is true, sets the I2C clock line high. If it
2494 is false, it clears it (low).
c609719b 2495
b37c7e5e 2496 eg: #define I2C_SCL(bit) \
2535d602 2497 if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
ba56f625 2498 else immr->im_cpm.cp_pbdat &= ~PB_SCL
b37c7e5e 2499
c609719b
WD
2500 I2C_DELAY
2501
2502 This delay is invoked four times per clock cycle so this
2503 controls the rate of data transfer. The data rate thus
b37c7e5e 2504 is 1 / (I2C_DELAY * 4). Often defined to be something
945af8d7
WD
2505 like:
2506
b37c7e5e 2507 #define I2C_DELAY udelay(2)
c609719b 2508
793b5726
MF
2509 CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA
2510
2511 If your arch supports the generic GPIO framework (asm/gpio.h),
2512 then you may alternatively define the two GPIOs that are to be
2513 used as SCL / SDA. Any of the previous I2C_xxx macros will
2514 have GPIO-based defaults assigned to them as appropriate.
2515
2516 You should define these to the GPIO value as given directly to
2517 the generic GPIO functions.
2518
6d0f6bcf 2519 CONFIG_SYS_I2C_INIT_BOARD
47cd00fa 2520
8bde7f77
WD
2521 When a board is reset during an i2c bus transfer
2522 chips might think that the current transfer is still
2523 in progress. On some boards it is possible to access
2524 the i2c SCLK line directly, either by using the
2525 processor pin as a GPIO or by having a second pin
2526 connected to the bus. If this option is defined a
2527 custom i2c_init_board() routine in boards/xxx/board.c
2528 is run early in the boot sequence.
47cd00fa 2529
26a33504
RR
2530 CONFIG_SYS_I2C_BOARD_LATE_INIT
2531
2532 An alternative to CONFIG_SYS_I2C_INIT_BOARD. If this option is
2533 defined a custom i2c_board_late_init() routine in
2534 boards/xxx/board.c is run AFTER the operations in i2c_init()
2535 is completed. This callpoint can be used to unreset i2c bus
2536 using CPU i2c controller register accesses for CPUs whose i2c
2537 controller provide such a method. It is called at the end of
2538 i2c_init() to allow i2c_init operations to setup the i2c bus
2539 controller on the CPU (e.g. setting bus speed & slave address).
2540
17ea1177
WD
2541 CONFIG_I2CFAST (PPC405GP|PPC405EP only)
2542
2543 This option enables configuration of bi_iic_fast[] flags
2544 in u-boot bd_info structure based on u-boot environment
2545 variable "i2cfast". (see also i2cfast)
2546
bb99ad6d
BW
2547 CONFIG_I2C_MULTI_BUS
2548
2549 This option allows the use of multiple I2C buses, each of which
c0f40859
WD
2550 must have a controller. At any point in time, only one bus is
2551 active. To switch to a different bus, use the 'i2c dev' command.
bb99ad6d
BW
2552 Note that bus numbering is zero-based.
2553
6d0f6bcf 2554 CONFIG_SYS_I2C_NOPROBES
bb99ad6d
BW
2555
2556 This option specifies a list of I2C devices that will be skipped
c0f40859 2557 when the 'i2c probe' command is issued. If CONFIG_I2C_MULTI_BUS
0f89c54b
PT
2558 is set, specify a list of bus-device pairs. Otherwise, specify
2559 a 1D array of device addresses
bb99ad6d
BW
2560
2561 e.g.
2562 #undef CONFIG_I2C_MULTI_BUS
c0f40859 2563 #define CONFIG_SYS_I2C_NOPROBES {0x50,0x68}
bb99ad6d
BW
2564
2565 will skip addresses 0x50 and 0x68 on a board with one I2C bus
2566
c0f40859 2567 #define CONFIG_I2C_MULTI_BUS
6d0f6bcf 2568 #define CONFIG_SYS_I2C_MULTI_NOPROBES {{0,0x50},{0,0x68},{1,0x54}}
bb99ad6d
BW
2569
2570 will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1
2571
6d0f6bcf 2572 CONFIG_SYS_SPD_BUS_NUM
be5e6181
TT
2573
2574 If defined, then this indicates the I2C bus number for DDR SPD.
2575 If not defined, then U-Boot assumes that SPD is on I2C bus 0.
2576
6d0f6bcf 2577 CONFIG_SYS_RTC_BUS_NUM
0dc018ec
SR
2578
2579 If defined, then this indicates the I2C bus number for the RTC.
2580 If not defined, then U-Boot assumes that RTC is on I2C bus 0.
2581
6d0f6bcf 2582 CONFIG_SYS_DTT_BUS_NUM
0dc018ec
SR
2583
2584 If defined, then this indicates the I2C bus number for the DTT.
2585 If not defined, then U-Boot assumes that DTT is on I2C bus 0.
2586
6d0f6bcf 2587 CONFIG_SYS_I2C_DTT_ADDR:
9ebbb54f
VG
2588
2589 If defined, specifies the I2C address of the DTT device.
2590 If not defined, then U-Boot uses predefined value for
2591 specified DTT device.
2592
2ac6985a
AD
2593 CONFIG_SOFT_I2C_READ_REPEATED_START
2594
2595 defining this will force the i2c_read() function in
2596 the soft_i2c driver to perform an I2C repeated start
2597 between writing the address pointer and reading the
2598 data. If this define is omitted the default behaviour
2599 of doing a stop-start sequence will be used. Most I2C
2600 devices can use either method, but some require one or
2601 the other.
be5e6181 2602
c609719b
WD
2603- SPI Support: CONFIG_SPI
2604
2605 Enables SPI driver (so far only tested with
2606 SPI EEPROM, also an instance works with Crystal A/D and
2607 D/As on the SACSng board)
2608
6639562e
YS
2609 CONFIG_SH_SPI
2610
2611 Enables the driver for SPI controller on SuperH. Currently
2612 only SH7757 is supported.
2613
c609719b
WD
2614 CONFIG_SPI_X
2615
2616 Enables extended (16-bit) SPI EEPROM addressing.
2617 (symmetrical to CONFIG_I2C_X)
2618
2619 CONFIG_SOFT_SPI
2620
43d9616c
WD
2621 Enables a software (bit-bang) SPI driver rather than
2622 using hardware support. This is a general purpose
2623 driver that only requires three general I/O port pins
2624 (two outputs, one input) to function. If this is
2625 defined, the board configuration must define several
2626 SPI configuration items (port pins to use, etc). For
2627 an example, see include/configs/sacsng.h.
c609719b 2628
04a9e118
BW
2629 CONFIG_HARD_SPI
2630
2631 Enables a hardware SPI driver for general-purpose reads
2632 and writes. As with CONFIG_SOFT_SPI, the board configuration
2633 must define a list of chip-select function pointers.
c0f40859 2634 Currently supported on some MPC8xxx processors. For an
04a9e118
BW
2635 example, see include/configs/mpc8349emds.h.
2636
38254f45
GL
2637 CONFIG_MXC_SPI
2638
2639 Enables the driver for the SPI controllers on i.MX and MXC
2e3cd1cd 2640 SoCs. Currently i.MX31/35/51 are supported.
38254f45 2641
f659b573
HS
2642 CONFIG_SYS_SPI_MXC_WAIT
2643 Timeout for waiting until spi transfer completed.
2644 default: (CONFIG_SYS_HZ/100) /* 10 ms */
2645
0133502e 2646- FPGA Support: CONFIG_FPGA
c609719b 2647
0133502e
MF
2648 Enables FPGA subsystem.
2649
2650 CONFIG_FPGA_<vendor>
2651
2652 Enables support for specific chip vendors.
2653 (ALTERA, XILINX)
c609719b 2654
0133502e 2655 CONFIG_FPGA_<family>
c609719b 2656
0133502e
MF
2657 Enables support for FPGA family.
2658 (SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX)
2659
2660 CONFIG_FPGA_COUNT
2661
2662 Specify the number of FPGA devices to support.
c609719b 2663
64e809af
SDPP
2664 CONFIG_CMD_FPGA_LOADMK
2665
2666 Enable support for fpga loadmk command
2667
67193864
MS
2668 CONFIG_CMD_FPGA_LOADP
2669
2670 Enable support for fpga loadp command - load partial bitstream
2671
2672 CONFIG_CMD_FPGA_LOADBP
2673
2674 Enable support for fpga loadbp command - load partial bitstream
2675 (Xilinx only)
2676
6d0f6bcf 2677 CONFIG_SYS_FPGA_PROG_FEEDBACK
c609719b 2678
8bde7f77 2679 Enable printing of hash marks during FPGA configuration.
c609719b 2680
6d0f6bcf 2681 CONFIG_SYS_FPGA_CHECK_BUSY
c609719b 2682
43d9616c
WD
2683 Enable checks on FPGA configuration interface busy
2684 status by the configuration function. This option
2685 will require a board or device specific function to
2686 be written.
c609719b
WD
2687
2688 CONFIG_FPGA_DELAY
2689
2690 If defined, a function that provides delays in the FPGA
2691 configuration driver.
2692
6d0f6bcf 2693 CONFIG_SYS_FPGA_CHECK_CTRLC
c609719b
WD
2694 Allow Control-C to interrupt FPGA configuration
2695
6d0f6bcf 2696 CONFIG_SYS_FPGA_CHECK_ERROR
c609719b 2697
43d9616c
WD
2698 Check for configuration errors during FPGA bitfile
2699 loading. For example, abort during Virtex II
2700 configuration if the INIT_B line goes low (which
2701 indicated a CRC error).
c609719b 2702
6d0f6bcf 2703 CONFIG_SYS_FPGA_WAIT_INIT
c609719b 2704
43d9616c
WD
2705 Maximum time to wait for the INIT_B line to deassert
2706 after PROB_B has been deasserted during a Virtex II
2707 FPGA configuration sequence. The default time is 500
11ccc33f 2708 ms.
c609719b 2709
6d0f6bcf 2710 CONFIG_SYS_FPGA_WAIT_BUSY
c609719b 2711
43d9616c 2712 Maximum time to wait for BUSY to deassert during
11ccc33f 2713 Virtex II FPGA configuration. The default is 5 ms.
c609719b 2714
6d0f6bcf 2715 CONFIG_SYS_FPGA_WAIT_CONFIG
c609719b 2716
43d9616c 2717 Time to wait after FPGA configuration. The default is
11ccc33f 2718 200 ms.
c609719b
WD
2719
2720- Configuration Management:
b2b8a696
SR
2721 CONFIG_BUILD_TARGET
2722
2723 Some SoCs need special image types (e.g. U-Boot binary
2724 with a special header) as build targets. By defining
2725 CONFIG_BUILD_TARGET in the SoC / board header, this
2726 special image will be automatically built upon calling
2727 make / MAKEALL.
2728
c609719b
WD
2729 CONFIG_IDENT_STRING
2730
43d9616c
WD
2731 If defined, this string will be added to the U-Boot
2732 version information (U_BOOT_VERSION)
c609719b
WD
2733
2734- Vendor Parameter Protection:
2735
43d9616c
WD
2736 U-Boot considers the values of the environment
2737 variables "serial#" (Board Serial Number) and
7152b1d0 2738 "ethaddr" (Ethernet Address) to be parameters that
43d9616c
WD
2739 are set once by the board vendor / manufacturer, and
2740 protects these variables from casual modification by
2741 the user. Once set, these variables are read-only,
2742 and write or delete attempts are rejected. You can
11ccc33f 2743 change this behaviour:
c609719b
WD
2744
2745 If CONFIG_ENV_OVERWRITE is #defined in your config
2746 file, the write protection for vendor parameters is
47cd00fa 2747 completely disabled. Anybody can change or delete
c609719b
WD
2748 these parameters.
2749
2750 Alternatively, if you #define _both_ CONFIG_ETHADDR
2751 _and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default
11ccc33f 2752 Ethernet address is installed in the environment,
c609719b
WD
2753 which can be changed exactly ONCE by the user. [The
2754 serial# is unaffected by this, i. e. it remains
2755 read-only.]
2756
2598090b
JH
2757 The same can be accomplished in a more flexible way
2758 for any variable by configuring the type of access
2759 to allow for those variables in the ".flags" variable
2760 or define CONFIG_ENV_FLAGS_LIST_STATIC.
2761
c609719b
WD
2762- Protected RAM:
2763 CONFIG_PRAM
2764
2765 Define this variable to enable the reservation of
2766 "protected RAM", i. e. RAM which is not overwritten
2767 by U-Boot. Define CONFIG_PRAM to hold the number of
2768 kB you want to reserve for pRAM. You can overwrite
2769 this default value by defining an environment
2770 variable "pram" to the number of kB you want to
2771 reserve. Note that the board info structure will
2772 still show the full amount of RAM. If pRAM is
2773 reserved, a new environment variable "mem" will
2774 automatically be defined to hold the amount of
2775 remaining RAM in a form that can be passed as boot
2776 argument to Linux, for instance like that:
2777
fe126d8b 2778 setenv bootargs ... mem=\${mem}
c609719b
WD
2779 saveenv
2780
2781 This way you can tell Linux not to use this memory,
2782 either, which results in a memory region that will
2783 not be affected by reboots.
2784
2785 *WARNING* If your board configuration uses automatic
2786 detection of the RAM size, you must make sure that
2787 this memory test is non-destructive. So far, the
2788 following board configurations are known to be
2789 "pRAM-clean":
2790
1b0757ec
WD
2791 IVMS8, IVML24, SPD8xx, TQM8xxL,
2792 HERMES, IP860, RPXlite, LWMON,
544d97e9 2793 FLAGADM, TQM8260
c609719b 2794
40fef049
GB
2795- Access to physical memory region (> 4GB)
2796 Some basic support is provided for operations on memory not
2797 normally accessible to U-Boot - e.g. some architectures
2798 support access to more than 4GB of memory on 32-bit
2799 machines using physical address extension or similar.
2800 Define CONFIG_PHYSMEM to access this basic support, which
2801 currently only supports clearing the memory.
2802
c609719b
WD
2803- Error Recovery:
2804 CONFIG_PANIC_HANG
2805
2806 Define this variable to stop the system in case of a
2807 fatal error, so that you have to reset it manually.
2808 This is probably NOT a good idea for an embedded
11ccc33f 2809 system where you want the system to reboot
c609719b
WD
2810 automatically as fast as possible, but it may be
2811 useful during development since you can try to debug
2812 the conditions that lead to the situation.
2813
2814 CONFIG_NET_RETRY_COUNT
2815
43d9616c
WD
2816 This variable defines the number of retries for
2817 network operations like ARP, RARP, TFTP, or BOOTP
2818 before giving up the operation. If not defined, a
2819 default value of 5 is used.
c609719b 2820
40cb90ee
GL
2821 CONFIG_ARP_TIMEOUT
2822
2823 Timeout waiting for an ARP reply in milliseconds.
2824
48a3e999
TK
2825 CONFIG_NFS_TIMEOUT
2826
2827 Timeout in milliseconds used in NFS protocol.
2828 If you encounter "ERROR: Cannot umount" in nfs command,
2829 try longer timeout such as
2830 #define CONFIG_NFS_TIMEOUT 10000UL
2831
c609719b 2832- Command Interpreter:
8078f1a5 2833 CONFIG_AUTO_COMPLETE
04a85b3b
WD
2834
2835 Enable auto completion of commands using TAB.
2836
6d0f6bcf 2837 CONFIG_SYS_HUSH_PARSER
c609719b
WD
2838
2839 Define this variable to enable the "hush" shell (from
2840 Busybox) as command line interpreter, thus enabling
2841 powerful command line syntax like
2842 if...then...else...fi conditionals or `&&' and '||'
2843 constructs ("shell scripts").
2844
2845 If undefined, you get the old, much simpler behaviour
2846 with a somewhat smaller memory footprint.
2847
2848
6d0f6bcf 2849 CONFIG_SYS_PROMPT_HUSH_PS2
c609719b
WD
2850
2851 This defines the secondary prompt string, which is
2852 printed when the command interpreter needs more input
2853 to complete a command. Usually "> ".
2854
2855 Note:
2856
8bde7f77
WD
2857 In the current implementation, the local variables
2858 space and global environment variables space are
2859 separated. Local variables are those you define by
2860 simply typing `name=value'. To access a local
2861 variable later on, you have write `$name' or
2862 `${name}'; to execute the contents of a variable
2863 directly type `$name' at the command prompt.
c609719b 2864
43d9616c
WD
2865 Global environment variables are those you use
2866 setenv/printenv to work with. To run a command stored
2867 in such a variable, you need to use the run command,
2868 and you must not use the '$' sign to access them.
c609719b
WD
2869
2870 To store commands and special characters in a
2871 variable, please use double quotation marks
2872 surrounding the whole text of the variable, instead
2873 of the backslashes before semicolons and special
2874 symbols.
2875
aa0c71ac
WD
2876- Commandline Editing and History:
2877 CONFIG_CMDLINE_EDITING
2878
11ccc33f 2879 Enable editing and History functions for interactive
b9365a26 2880 commandline input operations
aa0c71ac 2881
a8c7c708 2882- Default Environment:
c609719b
WD
2883 CONFIG_EXTRA_ENV_SETTINGS
2884
43d9616c
WD
2885 Define this to contain any number of null terminated
2886 strings (variable = value pairs) that will be part of
7152b1d0 2887 the default environment compiled into the boot image.
2262cfee 2888
43d9616c
WD
2889 For example, place something like this in your
2890 board's config file:
c609719b
WD
2891
2892 #define CONFIG_EXTRA_ENV_SETTINGS \
2893 "myvar1=value1\0" \
2894 "myvar2=value2\0"
2895
43d9616c
WD
2896 Warning: This method is based on knowledge about the
2897 internal format how the environment is stored by the
2898 U-Boot code. This is NOT an official, exported
2899 interface! Although it is unlikely that this format
7152b1d0 2900 will change soon, there is no guarantee either.
c609719b
WD
2901 You better know what you are doing here.
2902
43d9616c
WD
2903 Note: overly (ab)use of the default environment is
2904 discouraged. Make sure to check other ways to preset
74de7aef 2905 the environment like the "source" command or the
43d9616c 2906 boot command first.
c609719b 2907
5e724ca2
SW
2908 CONFIG_ENV_VARS_UBOOT_CONFIG
2909
2910 Define this in order to add variables describing the
2911 U-Boot build configuration to the default environment.
2912 These will be named arch, cpu, board, vendor, and soc.
2913
2914 Enabling this option will cause the following to be defined:
2915
2916 - CONFIG_SYS_ARCH
2917 - CONFIG_SYS_CPU
2918 - CONFIG_SYS_BOARD
2919 - CONFIG_SYS_VENDOR
2920 - CONFIG_SYS_SOC
2921
7e27f89f
TR
2922 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
2923
2924 Define this in order to add variables describing certain
2925 run-time determined information about the hardware to the
2926 environment. These will be named board_name, board_rev.
2927
06fd8538
SG
2928 CONFIG_DELAY_ENVIRONMENT
2929
2930 Normally the environment is loaded when the board is
2931 intialised so that it is available to U-Boot. This inhibits
2932 that so that the environment is not available until
2933 explicitly loaded later by U-Boot code. With CONFIG_OF_CONTROL
2934 this is instead controlled by the value of
2935 /config/load-environment.
2936
a8c7c708 2937- DataFlash Support:
2abbe075
WD
2938 CONFIG_HAS_DATAFLASH
2939
8bde7f77
WD
2940 Defining this option enables DataFlash features and
2941 allows to read/write in Dataflash via the standard
2942 commands cp, md...
2abbe075 2943
f61ec45e
EN
2944- Serial Flash support
2945 CONFIG_CMD_SF
2946
2947 Defining this option enables SPI flash commands
2948 'sf probe/read/write/erase/update'.
2949
2950 Usage requires an initial 'probe' to define the serial
2951 flash parameters, followed by read/write/erase/update
2952 commands.
2953
2954 The following defaults may be provided by the platform
2955 to handle the common case when only a single serial
2956 flash is present on the system.
2957
2958 CONFIG_SF_DEFAULT_BUS Bus identifier
2959 CONFIG_SF_DEFAULT_CS Chip-select
2960 CONFIG_SF_DEFAULT_MODE (see include/spi.h)
2961 CONFIG_SF_DEFAULT_SPEED in Hz
2962
24007273
SG
2963 CONFIG_CMD_SF_TEST
2964
2965 Define this option to include a destructive SPI flash
2966 test ('sf test').
2967
1dcd6d03
JT
2968 CONFIG_SPI_FLASH_BAR Ban/Extended Addr Reg
2969
2970 Define this option to use the Bank addr/Extended addr
2971 support on SPI flashes which has size > 16Mbytes.
2972
b902e07c
JT
2973 CONFIG_SF_DUAL_FLASH Dual flash memories
2974
2975 Define this option to use dual flash support where two flash
2976 memories can be connected with a given cs line.
2977 currently Xilinx Zynq qspi support these type of connections.
2978
562f8df1
HS
2979 CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
2980 enable the W#/Vpp signal to disable writing to the status
2981 register on ST MICRON flashes like the N25Q128.
2982 The status register write enable/disable bit, combined with
2983 the W#/VPP signal provides hardware data protection for the
2984 device as follows: When the enable/disable bit is set to 1,
2985 and the W#/VPP signal is driven LOW, the status register
2986 nonvolatile bits become read-only and the WRITE STATUS REGISTER
2987 operation will not execute. The only way to exit this
2988 hardware-protected mode is to drive W#/VPP HIGH.
2989
3f85ce27
WD
2990- SystemACE Support:
2991 CONFIG_SYSTEMACE
2992
2993 Adding this option adds support for Xilinx SystemACE
2994 chips attached via some sort of local bus. The address
11ccc33f 2995 of the chip must also be defined in the
6d0f6bcf 2996 CONFIG_SYS_SYSTEMACE_BASE macro. For example:
3f85ce27
WD
2997
2998 #define CONFIG_SYSTEMACE
6d0f6bcf 2999 #define CONFIG_SYS_SYSTEMACE_BASE 0xf0000000
3f85ce27
WD
3000
3001 When SystemACE support is added, the "ace" device type
3002 becomes available to the fat commands, i.e. fatls.
3003
ecb0ccd9
WD
3004- TFTP Fixed UDP Port:
3005 CONFIG_TFTP_PORT
3006
28cb9375 3007 If this is defined, the environment variable tftpsrcp
ecb0ccd9 3008 is used to supply the TFTP UDP source port value.
28cb9375 3009 If tftpsrcp isn't defined, the normal pseudo-random port
ecb0ccd9
WD
3010 number generator is used.
3011
28cb9375
WD
3012 Also, the environment variable tftpdstp is used to supply
3013 the TFTP UDP destination port value. If tftpdstp isn't
3014 defined, the normal port 69 is used.
3015
3016 The purpose for tftpsrcp is to allow a TFTP server to
ecb0ccd9
WD
3017 blindly start the TFTP transfer using the pre-configured
3018 target IP address and UDP port. This has the effect of
3019 "punching through" the (Windows XP) firewall, allowing
3020 the remainder of the TFTP transfer to proceed normally.
3021 A better solution is to properly configure the firewall,
3022 but sometimes that is not allowed.
3023
bf36c5d5
SG
3024- Hashing support:
3025 CONFIG_CMD_HASH
3026
3027 This enables a generic 'hash' command which can produce
3028 hashes / digests from a few algorithms (e.g. SHA1, SHA256).
3029
3030 CONFIG_HASH_VERIFY
3031
3032 Enable the hash verify command (hash -v). This adds to code
3033 size a little.
3034
3035 CONFIG_SHA1 - support SHA1 hashing
3036 CONFIG_SHA256 - support SHA256 hashing
3037
3038 Note: There is also a sha1sum command, which should perhaps
3039 be deprecated in favour of 'hash sha1'.
3040
a11f1873
RW
3041- Freescale i.MX specific commands:
3042 CONFIG_CMD_HDMIDETECT
3043 This enables 'hdmidet' command which returns true if an
3044 HDMI monitor is detected. This command is i.MX 6 specific.
3045
3046 CONFIG_CMD_BMODE
3047 This enables the 'bmode' (bootmode) command for forcing
3048 a boot from specific media.
3049
3050 This is useful for forcing the ROM's usb downloader to
3051 activate upon a watchdog reset which is nice when iterating
3052 on U-Boot. Using the reset button or running bmode normal
3053 will set it back to normal. This command currently
3054 supports i.MX53 and i.MX6.
3055
19c402af
SG
3056- Signing support:
3057 CONFIG_RSA
3058
3059 This enables the RSA algorithm used for FIT image verification
8bf2aad7 3060 in U-Boot. See doc/uImage.FIT/signature.txt for more information.
19c402af
SG
3061
3062 The signing part is build into mkimage regardless of this
3063 option.
3064
9e50c406
HS
3065- bootcount support:
3066 CONFIG_BOOTCOUNT_LIMIT
3067
3068 This enables the bootcounter support, see:
3069 http://www.denx.de/wiki/DULG/UBootBootCountLimit
3070
3071 CONFIG_AT91SAM9XE
3072 enable special bootcounter support on at91sam9xe based boards.
3073 CONFIG_BLACKFIN
3074 enable special bootcounter support on blackfin based boards.
3075 CONFIG_SOC_DA8XX
3076 enable special bootcounter support on da850 based boards.
3077 CONFIG_BOOTCOUNT_RAM
3078 enable support for the bootcounter in RAM
3079 CONFIG_BOOTCOUNT_I2C
3080 enable support for the bootcounter on an i2c (like RTC) device.
3081 CONFIG_SYS_I2C_RTC_ADDR = i2c chip address
3082 CONFIG_SYS_BOOTCOUNT_ADDR = i2c addr which is used for
3083 the bootcounter.
3084 CONFIG_BOOTCOUNT_ALEN = address len
19c402af 3085
a8c7c708 3086- Show boot progress:
c609719b
WD
3087 CONFIG_SHOW_BOOT_PROGRESS
3088
43d9616c
WD
3089 Defining this option allows to add some board-
3090 specific code (calling a user-provided function
3091 "show_boot_progress(int)") that enables you to show
3092 the system's boot progress on some display (for
3093 example, some LED's) on your board. At the moment,
3094 the following checkpoints are implemented:
c609719b 3095
3a608ca0
SG
3096- Detailed boot stage timing
3097 CONFIG_BOOTSTAGE
3098 Define this option to get detailed timing of each stage
3099 of the boot process.
3100
3101 CONFIG_BOOTSTAGE_USER_COUNT
3102 This is the number of available user bootstage records.
3103 Each time you call bootstage_mark(BOOTSTAGE_ID_ALLOC, ...)
3104 a new ID will be allocated from this stash. If you exceed
3105 the limit, recording will stop.
3106
3107 CONFIG_BOOTSTAGE_REPORT
3108 Define this to print a report before boot, similar to this:
3109
3110 Timer summary in microseconds:
3111 Mark Elapsed Stage
3112 0 0 reset
3113 3,575,678 3,575,678 board_init_f start
3114 3,575,695 17 arch_cpu_init A9
3115 3,575,777 82 arch_cpu_init done
3116 3,659,598 83,821 board_init_r start
3117 3,910,375 250,777 main_loop
3118 29,916,167 26,005,792 bootm_start
3119 30,361,327 445,160 start_kernel
3120
2eba38cf
SG
3121 CONFIG_CMD_BOOTSTAGE
3122 Add a 'bootstage' command which supports printing a report
3123 and un/stashing of bootstage data.
3124
94fd1316
SG
3125 CONFIG_BOOTSTAGE_FDT
3126 Stash the bootstage information in the FDT. A root 'bootstage'
3127 node is created with each bootstage id as a child. Each child
3128 has a 'name' property and either 'mark' containing the
3129 mark time in microsecond, or 'accum' containing the
3130 accumulated time for that bootstage id in microseconds.
3131 For example:
3132
3133 bootstage {
3134 154 {
3135 name = "board_init_f";
3136 mark = <3575678>;
3137 };
3138 170 {
3139 name = "lcd";
3140 accum = <33482>;
3141 };
3142 };
3143
3144 Code in the Linux kernel can find this in /proc/devicetree.
3145
1372cce2
MB
3146Legacy uImage format:
3147
c609719b
WD
3148 Arg Where When
3149 1 common/cmd_bootm.c before attempting to boot an image
ba56f625 3150 -1 common/cmd_bootm.c Image header has bad magic number
c609719b 3151 2 common/cmd_bootm.c Image header has correct magic number
ba56f625 3152 -2 common/cmd_bootm.c Image header has bad checksum
c609719b 3153 3 common/cmd_bootm.c Image header has correct checksum
ba56f625 3154 -3 common/cmd_bootm.c Image data has bad checksum
c609719b
WD
3155 4 common/cmd_bootm.c Image data has correct checksum
3156 -4 common/cmd_bootm.c Image is for unsupported architecture
3157 5 common/cmd_bootm.c Architecture check OK
1372cce2 3158 -5 common/cmd_bootm.c Wrong Image Type (not kernel, multi)
c609719b
WD
3159 6 common/cmd_bootm.c Image Type check OK
3160 -6 common/cmd_bootm.c gunzip uncompression error
3161 -7 common/cmd_bootm.c Unimplemented compression type
3162 7 common/cmd_bootm.c Uncompression OK
1372cce2 3163 8 common/cmd_bootm.c No uncompress/copy overwrite error
c609719b 3164 -9 common/cmd_bootm.c Unsupported OS (not Linux, BSD, VxWorks, QNX)
1372cce2
MB
3165
3166 9 common/image.c Start initial ramdisk verification
3167 -10 common/image.c Ramdisk header has bad magic number
3168 -11 common/image.c Ramdisk header has bad checksum
3169 10 common/image.c Ramdisk header is OK
3170 -12 common/image.c Ramdisk data has bad checksum
3171 11 common/image.c Ramdisk data has correct checksum
3172 12 common/image.c Ramdisk verification complete, start loading
11ccc33f 3173 -13 common/image.c Wrong Image Type (not PPC Linux ramdisk)
1372cce2
MB
3174 13 common/image.c Start multifile image verification
3175 14 common/image.c No initial ramdisk, no multifile, continue.
3176
c0f40859 3177 15 arch/<arch>/lib/bootm.c All preparation done, transferring control to OS
c609719b 3178
a47a12be 3179 -30 arch/powerpc/lib/board.c Fatal error, hang the system
11dadd54
WD
3180 -31 post/post.c POST test failed, detected by post_output_backlog()
3181 -32 post/post.c POST test failed, detected by post_run_single()
63e73c9a 3182
566a494f
HS
3183 34 common/cmd_doc.c before loading a Image from a DOC device
3184 -35 common/cmd_doc.c Bad usage of "doc" command
3185 35 common/cmd_doc.c correct usage of "doc" command
3186 -36 common/cmd_doc.c No boot device
3187 36 common/cmd_doc.c correct boot device
3188 -37 common/cmd_doc.c Unknown Chip ID on boot device
3189 37 common/cmd_doc.c correct chip ID found, device available
3190 -38 common/cmd_doc.c Read Error on boot device
3191 38 common/cmd_doc.c reading Image header from DOC device OK
3192 -39 common/cmd_doc.c Image header has bad magic number
3193 39 common/cmd_doc.c Image header has correct magic number
3194 -40 common/cmd_doc.c Error reading Image from DOC device
3195 40 common/cmd_doc.c Image header has correct magic number
3196 41 common/cmd_ide.c before loading a Image from a IDE device
3197 -42 common/cmd_ide.c Bad usage of "ide" command
3198 42 common/cmd_ide.c correct usage of "ide" command
3199 -43 common/cmd_ide.c No boot device
3200 43 common/cmd_ide.c boot device found
3201 -44 common/cmd_ide.c Device not available
3202 44 common/cmd_ide.c Device available
3203 -45 common/cmd_ide.c wrong partition selected
3204 45 common/cmd_ide.c partition selected
3205 -46 common/cmd_ide.c Unknown partition table
3206 46 common/cmd_ide.c valid partition table found
3207 -47 common/cmd_ide.c Invalid partition type
3208 47 common/cmd_ide.c correct partition type
3209 -48 common/cmd_ide.c Error reading Image Header on boot device
3210 48 common/cmd_ide.c reading Image Header from IDE device OK
3211 -49 common/cmd_ide.c Image header has bad magic number
3212 49 common/cmd_ide.c Image header has correct magic number
3213 -50 common/cmd_ide.c Image header has bad checksum
3214 50 common/cmd_ide.c Image header has correct checksum
3215 -51 common/cmd_ide.c Error reading Image from IDE device
3216 51 common/cmd_ide.c reading Image from IDE device OK
3217 52 common/cmd_nand.c before loading a Image from a NAND device
3218 -53 common/cmd_nand.c Bad usage of "nand" command
3219 53 common/cmd_nand.c correct usage of "nand" command
3220 -54 common/cmd_nand.c No boot device
3221 54 common/cmd_nand.c boot device found
3222 -55 common/cmd_nand.c Unknown Chip ID on boot device
3223 55 common/cmd_nand.c correct chip ID found, device available
3224 -56 common/cmd_nand.c Error reading Image Header on boot device
3225 56 common/cmd_nand.c reading Image Header from NAND device OK
3226 -57 common/cmd_nand.c Image header has bad magic number
3227 57 common/cmd_nand.c Image header has correct magic number
3228 -58 common/cmd_nand.c Error reading Image from NAND device
3229 58 common/cmd_nand.c reading Image from NAND device OK
3230
3231 -60 common/env_common.c Environment has a bad CRC, using default
3232
11ccc33f 3233 64 net/eth.c starting with Ethernet configuration.
566a494f
HS
3234 -64 net/eth.c no Ethernet found.
3235 65 net/eth.c Ethernet found.
3236
3237 -80 common/cmd_net.c usage wrong
3238 80 common/cmd_net.c before calling NetLoop()
11ccc33f 3239 -81 common/cmd_net.c some error in NetLoop() occurred
566a494f
HS
3240 81 common/cmd_net.c NetLoop() back without error
3241 -82 common/cmd_net.c size == 0 (File with size 0 loaded)
3242 82 common/cmd_net.c trying automatic boot
74de7aef
WD
3243 83 common/cmd_net.c running "source" command
3244 -83 common/cmd_net.c some error in automatic boot or "source" command
566a494f 3245 84 common/cmd_net.c end without errors
c609719b 3246
1372cce2
MB
3247FIT uImage format:
3248
3249 Arg Where When
3250 100 common/cmd_bootm.c Kernel FIT Image has correct format
3251 -100 common/cmd_bootm.c Kernel FIT Image has incorrect format
3252 101 common/cmd_bootm.c No Kernel subimage unit name, using configuration
3253 -101 common/cmd_bootm.c Can't get configuration for kernel subimage
3254 102 common/cmd_bootm.c Kernel unit name specified
3255 -103 common/cmd_bootm.c Can't get kernel subimage node offset
f773bea8 3256 103 common/cmd_bootm.c Found configuration node
1372cce2
MB
3257 104 common/cmd_bootm.c Got kernel subimage node offset
3258 -104 common/cmd_bootm.c Kernel subimage hash verification failed
3259 105 common/cmd_bootm.c Kernel subimage hash verification OK
3260 -105 common/cmd_bootm.c Kernel subimage is for unsupported architecture
3261 106 common/cmd_bootm.c Architecture check OK
11ccc33f
MZ
3262 -106 common/cmd_bootm.c Kernel subimage has wrong type
3263 107 common/cmd_bootm.c Kernel subimage type OK
1372cce2
MB
3264 -107 common/cmd_bootm.c Can't get kernel subimage data/size
3265 108 common/cmd_bootm.c Got kernel subimage data/size
3266 -108 common/cmd_bootm.c Wrong image type (not legacy, FIT)
3267 -109 common/cmd_bootm.c Can't get kernel subimage type
3268 -110 common/cmd_bootm.c Can't get kernel subimage comp
3269 -111 common/cmd_bootm.c Can't get kernel subimage os
3270 -112 common/cmd_bootm.c Can't get kernel subimage load address
3271 -113 common/cmd_bootm.c Image uncompress/copy overwrite error
3272
3273 120 common/image.c Start initial ramdisk verification
3274 -120 common/image.c Ramdisk FIT image has incorrect format
3275 121 common/image.c Ramdisk FIT image has correct format
11ccc33f 3276 122 common/image.c No ramdisk subimage unit name, using configuration
1372cce2
MB
3277 -122 common/image.c Can't get configuration for ramdisk subimage
3278 123 common/image.c Ramdisk unit name specified
3279 -124 common/image.c Can't get ramdisk subimage node offset
3280 125 common/image.c Got ramdisk subimage node offset
3281 -125 common/image.c Ramdisk subimage hash verification failed
3282 126 common/image.c Ramdisk subimage hash verification OK
3283 -126 common/image.c Ramdisk subimage for unsupported architecture
3284 127 common/image.c Architecture check OK
3285 -127 common/image.c Can't get ramdisk subimage data/size
3286 128 common/image.c Got ramdisk subimage data/size
3287 129 common/image.c Can't get ramdisk load address
3288 -129 common/image.c Got ramdisk load address
3289
11ccc33f 3290 -130 common/cmd_doc.c Incorrect FIT image format
1372cce2
MB
3291 131 common/cmd_doc.c FIT image format OK
3292
11ccc33f 3293 -140 common/cmd_ide.c Incorrect FIT image format
1372cce2
MB
3294 141 common/cmd_ide.c FIT image format OK
3295
11ccc33f 3296 -150 common/cmd_nand.c Incorrect FIT image format
1372cce2
MB
3297 151 common/cmd_nand.c FIT image format OK
3298
21d29f7f
HS
3299- legacy image format:
3300 CONFIG_IMAGE_FORMAT_LEGACY
3301 enables the legacy image format support in U-Boot.
3302
3303 Default:
3304 enabled if CONFIG_FIT_SIGNATURE is not defined.
3305
3306 CONFIG_DISABLE_IMAGE_LEGACY
3307 disable the legacy image format
3308
3309 This define is introduced, as the legacy image format is
3310 enabled per default for backward compatibility.
3311
d95f6ec7
GB
3312- FIT image support:
3313 CONFIG_FIT
3314 Enable support for the FIT uImage format.
3315
3316 CONFIG_FIT_BEST_MATCH
3317 When no configuration is explicitly selected, default to the
3318 one whose fdt's compatibility field best matches that of
3319 U-Boot itself. A match is considered "best" if it matches the
3320 most specific compatibility entry of U-Boot's fdt's root node.
3321 The order of entries in the configuration's fdt is ignored.
3322
3e569a6b
SG
3323 CONFIG_FIT_SIGNATURE
3324 This option enables signature verification of FIT uImages,
3325 using a hash signed and verified using RSA. See
3326 doc/uImage.FIT/signature.txt for more details.
3327
21d29f7f
HS
3328 WARNING: When relying on signed FIT images with required
3329 signature check the legacy image format is default
3330 disabled. If a board need legacy image format support
3331 enable this through CONFIG_IMAGE_FORMAT_LEGACY
3332
9a4f479b
DE
3333 CONFIG_FIT_DISABLE_SHA256
3334 Supporting SHA256 hashes has quite an impact on binary size.
3335 For constrained systems sha256 hash support can be disabled
3336 with this option.
3337
4cf2609b
WD
3338- Standalone program support:
3339 CONFIG_STANDALONE_LOAD_ADDR
3340
6feff899
WD
3341 This option defines a board specific value for the
3342 address where standalone program gets loaded, thus
3343 overwriting the architecture dependent default
4cf2609b
WD
3344 settings.
3345
3346- Frame Buffer Address:
3347 CONFIG_FB_ADDR
3348
3349 Define CONFIG_FB_ADDR if you want to use specific
44a53b57
WD
3350 address for frame buffer. This is typically the case
3351 when using a graphics controller has separate video
3352 memory. U-Boot will then place the frame buffer at
3353 the given address instead of dynamically reserving it
3354 in system RAM by calling lcd_setmem(), which grabs
3355 the memory for the frame buffer depending on the
3356 configured panel size.
4cf2609b
WD
3357
3358 Please see board_init_f function.
3359
cccfc2ab
DZ
3360- Automatic software updates via TFTP server
3361 CONFIG_UPDATE_TFTP
3362 CONFIG_UPDATE_TFTP_CNT_MAX
3363 CONFIG_UPDATE_TFTP_MSEC_MAX
3364
3365 These options enable and control the auto-update feature;
3366 for a more detailed description refer to doc/README.update.
3367
3368- MTD Support (mtdparts command, UBI support)
3369 CONFIG_MTD_DEVICE
3370
3371 Adds the MTD device infrastructure from the Linux kernel.
3372 Needed for mtdparts command support.
3373
3374 CONFIG_MTD_PARTITIONS
3375
3376 Adds the MTD partitioning infrastructure from the Linux
3377 kernel. Needed for UBI support.
3378
ff94bc40
HS
3379 CONFIG_MTD_NAND_VERIFY_WRITE
3380 verify if the written data is correct reread.
3381
70c219cd
JH
3382- UBI support
3383 CONFIG_CMD_UBI
3384
3385 Adds commands for interacting with MTD partitions formatted
3386 with the UBI flash translation layer
3387
3388 Requires also defining CONFIG_RBTREE
3389
147162da
JH
3390 CONFIG_UBI_SILENCE_MSG
3391
3392 Make the verbose messages from UBI stop printing. This leaves
3393 warnings and errors enabled.
3394
ff94bc40
HS
3395
3396 CONFIG_MTD_UBI_WL_THRESHOLD
3397 This parameter defines the maximum difference between the highest
3398 erase counter value and the lowest erase counter value of eraseblocks
3399 of UBI devices. When this threshold is exceeded, UBI starts performing
3400 wear leveling by means of moving data from eraseblock with low erase
3401 counter to eraseblocks with high erase counter.
3402
3403 The default value should be OK for SLC NAND flashes, NOR flashes and
3404 other flashes which have eraseblock life-cycle 100000 or more.
3405 However, in case of MLC NAND flashes which typically have eraseblock
3406 life-cycle less than 10000, the threshold should be lessened (e.g.,
3407 to 128 or 256, although it does not have to be power of 2).
3408
3409 default: 4096
3410
3411 CONFIG_MTD_UBI_BEB_LIMIT
3412 This option specifies the maximum bad physical eraseblocks UBI
3413 expects on the MTD device (per 1024 eraseblocks). If the
3414 underlying flash does not admit of bad eraseblocks (e.g. NOR
3415 flash), this value is ignored.
3416
3417 NAND datasheets often specify the minimum and maximum NVM
3418 (Number of Valid Blocks) for the flashes' endurance lifetime.
3419 The maximum expected bad eraseblocks per 1024 eraseblocks
3420 then can be calculated as "1024 * (1 - MinNVB / MaxNVB)",
3421 which gives 20 for most NANDs (MaxNVB is basically the total
3422 count of eraseblocks on the chip).
3423
3424 To put it differently, if this value is 20, UBI will try to
3425 reserve about 1.9% of physical eraseblocks for bad blocks
3426 handling. And that will be 1.9% of eraseblocks on the entire
3427 NAND chip, not just the MTD partition UBI attaches. This means
3428 that if you have, say, a NAND flash chip admits maximum 40 bad
3429 eraseblocks, and it is split on two MTD partitions of the same
3430 size, UBI will reserve 40 eraseblocks when attaching a
3431 partition.
3432
3433 default: 20
3434
3435 CONFIG_MTD_UBI_FASTMAP
3436 Fastmap is a mechanism which allows attaching an UBI device
3437 in nearly constant time. Instead of scanning the whole MTD device it
3438 only has to locate a checkpoint (called fastmap) on the device.
3439 The on-flash fastmap contains all information needed to attach
3440 the device. Using fastmap makes only sense on large devices where
3441 attaching by scanning takes long. UBI will not automatically install
3442 a fastmap on old images, but you can set the UBI parameter
3443 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT to 1 if you want so. Please note
3444 that fastmap-enabled images are still usable with UBI implementations
3445 without fastmap support. On typical flash devices the whole fastmap
3446 fits into one PEB. UBI will reserve PEBs to hold two fastmaps.
3447
3448 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT
3449 Set this parameter to enable fastmap automatically on images
3450 without a fastmap.
3451 default: 0
3452
70c219cd
JH
3453- UBIFS support
3454 CONFIG_CMD_UBIFS
3455
3456 Adds commands for interacting with UBI volumes formatted as
3457 UBIFS. UBIFS is read-only in u-boot.
3458
3459 Requires UBI support as well as CONFIG_LZO
3460
147162da
JH
3461 CONFIG_UBIFS_SILENCE_MSG
3462
3463 Make the verbose messages from UBIFS stop printing. This leaves
3464 warnings and errors enabled.
3465
6a11cf48 3466- SPL framework
04e5ae79
WD
3467 CONFIG_SPL
3468 Enable building of SPL globally.
6a11cf48 3469
95579793
TR
3470 CONFIG_SPL_LDSCRIPT
3471 LDSCRIPT for linking the SPL binary.
3472
6ebc3461
AA
3473 CONFIG_SPL_MAX_FOOTPRINT
3474 Maximum size in memory allocated to the SPL, BSS included.
3475 When defined, the linker checks that the actual memory
3476 used by SPL from _start to __bss_end does not exceed it.
8960af8b 3477 CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE
6ebc3461
AA
3478 must not be both defined at the same time.
3479
95579793 3480 CONFIG_SPL_MAX_SIZE
6ebc3461
AA
3481 Maximum size of the SPL image (text, data, rodata, and
3482 linker lists sections), BSS excluded.
3483 When defined, the linker checks that the actual size does
3484 not exceed it.
95579793 3485
04e5ae79
WD
3486 CONFIG_SPL_TEXT_BASE
3487 TEXT_BASE for linking the SPL binary.
6a11cf48 3488
94a45bb1
SW
3489 CONFIG_SPL_RELOC_TEXT_BASE
3490 Address to relocate to. If unspecified, this is equal to
3491 CONFIG_SPL_TEXT_BASE (i.e. no relocation is done).
3492
95579793
TR
3493 CONFIG_SPL_BSS_START_ADDR
3494 Link address for the BSS within the SPL binary.
3495
3496 CONFIG_SPL_BSS_MAX_SIZE
6ebc3461
AA
3497 Maximum size in memory allocated to the SPL BSS.
3498 When defined, the linker checks that the actual memory used
3499 by SPL from __bss_start to __bss_end does not exceed it.
8960af8b 3500 CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE
6ebc3461 3501 must not be both defined at the same time.
95579793
TR
3502
3503 CONFIG_SPL_STACK
3504 Adress of the start of the stack SPL will use
3505
94a45bb1
SW
3506 CONFIG_SPL_RELOC_STACK
3507 Adress of the start of the stack SPL will use after
3508 relocation. If unspecified, this is equal to
3509 CONFIG_SPL_STACK.
3510
95579793
TR
3511 CONFIG_SYS_SPL_MALLOC_START
3512 Starting address of the malloc pool used in SPL.
3513
3514 CONFIG_SYS_SPL_MALLOC_SIZE
3515 The size of the malloc pool used in SPL.
6a11cf48 3516
47f7bcae
TR
3517 CONFIG_SPL_FRAMEWORK
3518 Enable the SPL framework under common/. This framework
3519 supports MMC, NAND and YMODEM loading of U-Boot and NAND
3520 NAND loading of the Linux Kernel.
3521
9607faf2
TR
3522 CONFIG_SPL_OS_BOOT
3523 Enable booting directly to an OS from SPL.
3524 See also: doc/README.falcon
3525
861a86f4
TR
3526 CONFIG_SPL_DISPLAY_PRINT
3527 For ARM, enable an optional function to print more information
3528 about the running system.
3529
4b919725
SW
3530 CONFIG_SPL_INIT_MINIMAL
3531 Arch init code should be built for a very small image
3532
04e5ae79
WD
3533 CONFIG_SPL_LIBCOMMON_SUPPORT
3534 Support for common/libcommon.o in SPL binary
6a11cf48 3535
04e5ae79
WD
3536 CONFIG_SPL_LIBDISK_SUPPORT
3537 Support for disk/libdisk.o in SPL binary
6a11cf48 3538
04e5ae79
WD
3539 CONFIG_SPL_I2C_SUPPORT
3540 Support for drivers/i2c/libi2c.o in SPL binary
6a11cf48 3541
04e5ae79
WD
3542 CONFIG_SPL_GPIO_SUPPORT
3543 Support for drivers/gpio/libgpio.o in SPL binary
6a11cf48 3544
04e5ae79
WD
3545 CONFIG_SPL_MMC_SUPPORT
3546 Support for drivers/mmc/libmmc.o in SPL binary
6a11cf48 3547
95579793
TR
3548 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR,
3549 CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS,
fae81c72 3550 CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION
95579793
TR
3551 Address, size and partition on the MMC to load U-Boot from
3552 when the MMC is being used in raw mode.
3553
2b75b0ad
PK
3554 CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR
3555 Sector to load kernel uImage from when MMC is being
3556 used in raw mode (for Falcon mode)
3557
3558 CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR,
3559 CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS
3560 Sector and number of sectors to load kernel argument
3561 parameters from when MMC is being used in raw mode
3562 (for falcon mode)
3563
95579793
TR
3564 CONFIG_SPL_FAT_SUPPORT
3565 Support for fs/fat/libfat.o in SPL binary
3566
fae81c72
GG
3567 CONFIG_SPL_EXT_SUPPORT
3568 Support for EXT filesystem in SPL binary
95579793 3569
fae81c72
GG
3570 CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
3571 Filename to read to load U-Boot when reading from filesystem
3572
3573 CONFIG_SPL_FS_LOAD_KERNEL_NAME
7ad2cc79 3574 Filename to read to load kernel uImage when reading
fae81c72 3575 from filesystem (for Falcon mode)
7ad2cc79 3576
fae81c72 3577 CONFIG_SPL_FS_LOAD_ARGS_NAME
7ad2cc79 3578 Filename to read to load kernel argument parameters
fae81c72 3579 when reading from filesystem (for Falcon mode)
7ad2cc79 3580
06f60ae3
SW
3581 CONFIG_SPL_MPC83XX_WAIT_FOR_NAND
3582 Set this for NAND SPL on PPC mpc83xx targets, so that
3583 start.S waits for the rest of the SPL to load before
3584 continuing (the hardware starts execution after just
3585 loading the first page rather than the full 4K).
3586
651fcf60
PK
3587 CONFIG_SPL_SKIP_RELOCATE
3588 Avoid SPL relocation
3589
6f2f01b9
SW
3590 CONFIG_SPL_NAND_BASE
3591 Include nand_base.c in the SPL. Requires
3592 CONFIG_SPL_NAND_DRIVERS.
3593
3594 CONFIG_SPL_NAND_DRIVERS
3595 SPL uses normal NAND drivers, not minimal drivers.
3596
3597 CONFIG_SPL_NAND_ECC
3598 Include standard software ECC in the SPL
3599
95579793 3600 CONFIG_SPL_NAND_SIMPLE
7d4b7955
SW
3601 Support for NAND boot using simple NAND drivers that
3602 expose the cmd_ctrl() interface.
95579793 3603
6dd3b566
TR
3604 CONFIG_SPL_MTD_SUPPORT
3605 Support for the MTD subsystem within SPL. Useful for
3606 environment on NAND support within SPL.
3607
bb0dc108
YZ
3608 CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
3609 Set for the SPL on PPC mpc8xxx targets, support for
5614e71b 3610 drivers/ddr/fsl/libddr.o in SPL binary.
bb0dc108 3611
7c8eea59
YZ
3612 CONFIG_SPL_COMMON_INIT_DDR
3613 Set for common ddr init with serial presence detect in
3614 SPL binary.
3615
95579793
TR
3616 CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT,
3617 CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE,
3618 CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS,
3619 CONFIG_SYS_NAND_ECCPOS, CONFIG_SYS_NAND_ECCSIZE,
3620 CONFIG_SYS_NAND_ECCBYTES
3621 Defines the size and behavior of the NAND that SPL uses
7d4b7955 3622 to read U-Boot
95579793 3623
fbe76ae4
PK
3624 CONFIG_SPL_NAND_BOOT
3625 Add support NAND boot
3626
95579793 3627 CONFIG_SYS_NAND_U_BOOT_OFFS
7d4b7955
SW
3628 Location in NAND to read U-Boot from
3629
3630 CONFIG_SYS_NAND_U_BOOT_DST
3631 Location in memory to load U-Boot to
3632
3633 CONFIG_SYS_NAND_U_BOOT_SIZE
3634 Size of image to load
95579793
TR
3635
3636 CONFIG_SYS_NAND_U_BOOT_START
7d4b7955 3637 Entry point in loaded image to jump to
95579793
TR
3638
3639 CONFIG_SYS_NAND_HW_ECC_OOBFIRST
3640 Define this if you need to first read the OOB and then the
3641 data. This is used for example on davinci plattforms.
3642
3643 CONFIG_SPL_OMAP3_ID_NAND
3644 Support for an OMAP3-specific set of functions to return the
3645 ID and MFR of the first attached NAND chip, if present.
3646
04e5ae79
WD
3647 CONFIG_SPL_SERIAL_SUPPORT
3648 Support for drivers/serial/libserial.o in SPL binary
6a11cf48 3649
04e5ae79
WD
3650 CONFIG_SPL_SPI_FLASH_SUPPORT
3651 Support for drivers/mtd/spi/libspi_flash.o in SPL binary
6a11cf48 3652
04e5ae79
WD
3653 CONFIG_SPL_SPI_SUPPORT
3654 Support for drivers/spi/libspi.o in SPL binary
c57b953d
PM
3655
3656 CONFIG_SPL_RAM_DEVICE
3657 Support for running image already present in ram, in SPL binary
6a11cf48 3658
04e5ae79
WD
3659 CONFIG_SPL_LIBGENERIC_SUPPORT
3660 Support for lib/libgeneric.o in SPL binary
1372cce2 3661
ba1bee43
YZ
3662 CONFIG_SPL_ENV_SUPPORT
3663 Support for the environment operating in SPL binary
3664
3665 CONFIG_SPL_NET_SUPPORT
3666 Support for the net/libnet.o in SPL binary.
3667 It conflicts with SPL env from storage medium specified by
3668 CONFIG_ENV_IS_xxx but CONFIG_ENV_IS_NOWHERE
3669
74752baa 3670 CONFIG_SPL_PAD_TO
6113d3f2
BT
3671 Image offset to which the SPL should be padded before appending
3672 the SPL payload. By default, this is defined as
3673 CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
3674 CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
3675 payload without any padding, or >= CONFIG_SPL_MAX_SIZE.
74752baa 3676
ca2fca22
SW
3677 CONFIG_SPL_TARGET
3678 Final target image containing SPL and payload. Some SPLs
3679 use an arch-specific makefile fragment instead, for
3680 example if more than one image needs to be produced.
3681
87ebee39
SG
3682 CONFIG_FIT_SPL_PRINT
3683 Printing information about a FIT image adds quite a bit of
3684 code to SPL. So this is normally disabled in SPL. Use this
3685 option to re-enable it. This will affect the output of the
3686 bootm command when booting a FIT image.
3687
3aa29de0
YZ
3688- TPL framework
3689 CONFIG_TPL
3690 Enable building of TPL globally.
3691
3692 CONFIG_TPL_PAD_TO
3693 Image offset to which the TPL should be padded before appending
3694 the TPL payload. By default, this is defined as
93e14596
WD
3695 CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
3696 CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
3697 payload without any padding, or >= CONFIG_SPL_MAX_SIZE.
3aa29de0 3698
c609719b
WD
3699Modem Support:
3700--------------
3701
566e5cf4 3702[so far only for SMDK2400 boards]
c609719b 3703
11ccc33f 3704- Modem support enable:
c609719b
WD
3705 CONFIG_MODEM_SUPPORT
3706
3707- RTS/CTS Flow control enable:
3708 CONFIG_HWFLOW
3709
3710- Modem debug support:
3711 CONFIG_MODEM_SUPPORT_DEBUG
3712
43d9616c
WD
3713 Enables debugging stuff (char screen[1024], dbg())
3714 for modem support. Useful only with BDI2000.
c609719b 3715
a8c7c708
WD
3716- Interrupt support (PPC):
3717
d4ca31c4
WD
3718 There are common interrupt_init() and timer_interrupt()
3719 for all PPC archs. interrupt_init() calls interrupt_init_cpu()
11ccc33f 3720 for CPU specific initialization. interrupt_init_cpu()
d4ca31c4 3721 should set decrementer_count to appropriate value. If
11ccc33f 3722 CPU resets decrementer automatically after interrupt
d4ca31c4 3723 (ppc4xx) it should set decrementer_count to zero.
11ccc33f 3724 timer_interrupt() calls timer_interrupt_cpu() for CPU
d4ca31c4
WD
3725 specific handling. If board has watchdog / status_led
3726 / other_activity_monitor it works automatically from
3727 general timer_interrupt().
a8c7c708 3728
c609719b
WD
3729- General:
3730
43d9616c
WD
3731 In the target system modem support is enabled when a
3732 specific key (key combination) is pressed during
3733 power-on. Otherwise U-Boot will boot normally
11ccc33f 3734 (autoboot). The key_pressed() function is called from
43d9616c
WD
3735 board_init(). Currently key_pressed() is a dummy
3736 function, returning 1 and thus enabling modem
3737 initialization.
c609719b 3738
43d9616c
WD
3739 If there are no modem init strings in the
3740 environment, U-Boot proceed to autoboot; the
3741 previous output (banner, info printfs) will be
11ccc33f 3742 suppressed, though.
c609719b
WD
3743
3744 See also: doc/README.Modem
3745
9660e442
HR
3746Board initialization settings:
3747------------------------------
3748
3749During Initialization u-boot calls a number of board specific functions
3750to allow the preparation of board specific prerequisites, e.g. pin setup
3751before drivers are initialized. To enable these callbacks the
3752following configuration macros have to be defined. Currently this is
3753architecture specific, so please check arch/your_architecture/lib/board.c
3754typically in board_init_f() and board_init_r().
3755
3756- CONFIG_BOARD_EARLY_INIT_F: Call board_early_init_f()
3757- CONFIG_BOARD_EARLY_INIT_R: Call board_early_init_r()
3758- CONFIG_BOARD_LATE_INIT: Call board_late_init()
3759- CONFIG_BOARD_POSTCLK_INIT: Call board_postclk_init()
c609719b 3760
c609719b
WD
3761Configuration Settings:
3762-----------------------
3763
4d1fd7f1
YS
3764- CONFIG_SYS_SUPPORT_64BIT_DATA: Defined automatically if compiled as 64-bit.
3765 Optionally it can be defined to support 64-bit memory commands.
3766
6d0f6bcf 3767- CONFIG_SYS_LONGHELP: Defined when you want long help messages included;
c609719b
WD
3768 undefine this when you're short of memory.
3769
2fb2604d
PT
3770- CONFIG_SYS_HELP_CMD_WIDTH: Defined when you want to override the default
3771 width of the commands listed in the 'help' command output.
3772
6d0f6bcf 3773- CONFIG_SYS_PROMPT: This is what U-Boot prints on the console to
c609719b
WD
3774 prompt for user input.
3775
6d0f6bcf 3776- CONFIG_SYS_CBSIZE: Buffer size for input from the Console
c609719b 3777
6d0f6bcf 3778- CONFIG_SYS_PBSIZE: Buffer size for Console output
c609719b 3779
6d0f6bcf 3780- CONFIG_SYS_MAXARGS: max. Number of arguments accepted for monitor commands
c609719b 3781
6d0f6bcf 3782- CONFIG_SYS_BARGSIZE: Buffer size for Boot Arguments which are passed to
c609719b
WD
3783 the application (usually a Linux kernel) when it is
3784 booted
3785
6d0f6bcf 3786- CONFIG_SYS_BAUDRATE_TABLE:
c609719b
WD
3787 List of legal baudrate settings for this board.
3788
6d0f6bcf 3789- CONFIG_SYS_CONSOLE_INFO_QUIET
8bde7f77 3790 Suppress display of console information at boot.
c609719b 3791
6d0f6bcf 3792- CONFIG_SYS_CONSOLE_IS_IN_ENV
8bde7f77
WD
3793 If the board specific function
3794 extern int overwrite_console (void);
3795 returns 1, the stdin, stderr and stdout are switched to the
c609719b
WD
3796 serial port, else the settings in the environment are used.
3797
6d0f6bcf 3798- CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
8bde7f77 3799 Enable the call to overwrite_console().
c609719b 3800
6d0f6bcf 3801- CONFIG_SYS_CONSOLE_ENV_OVERWRITE
c609719b
WD
3802 Enable overwrite of previous console environment settings.
3803
6d0f6bcf 3804- CONFIG_SYS_MEMTEST_START, CONFIG_SYS_MEMTEST_END:
c609719b
WD
3805 Begin and End addresses of the area used by the
3806 simple memory test.
3807
6d0f6bcf 3808- CONFIG_SYS_ALT_MEMTEST:
8bde7f77 3809 Enable an alternate, more extensive memory test.
c609719b 3810
6d0f6bcf 3811- CONFIG_SYS_MEMTEST_SCRATCH:
5f535fe1
WD
3812 Scratch address used by the alternate memory test
3813 You only need to set this if address zero isn't writeable
3814
6d0f6bcf
JCPV
3815- CONFIG_SYS_MEM_TOP_HIDE (PPC only):
3816 If CONFIG_SYS_MEM_TOP_HIDE is defined in the board config header,
14f73ca6 3817 this specified memory area will get subtracted from the top
11ccc33f 3818 (end) of RAM and won't get "touched" at all by U-Boot. By
14f73ca6
SR
3819 fixing up gd->ram_size the Linux kernel should gets passed
3820 the now "corrected" memory size and won't touch it either.
3821 This should work for arch/ppc and arch/powerpc. Only Linux
5e12e75d 3822 board ports in arch/powerpc with bootwrapper support that
14f73ca6 3823 recalculate the memory size from the SDRAM controller setup
5e12e75d 3824 will have to get fixed in Linux additionally.
14f73ca6
SR
3825
3826 This option can be used as a workaround for the 440EPx/GRx
3827 CHIP 11 errata where the last 256 bytes in SDRAM shouldn't
3828 be touched.
3829
3830 WARNING: Please make sure that this value is a multiple of
3831 the Linux page size (normally 4k). If this is not the case,
3832 then the end address of the Linux memory will be located at a
3833 non page size aligned address and this could cause major
3834 problems.
3835
6d0f6bcf 3836- CONFIG_SYS_LOADS_BAUD_CHANGE:
c609719b
WD
3837 Enable temporary baudrate change while serial download
3838
6d0f6bcf 3839- CONFIG_SYS_SDRAM_BASE:
c609719b
WD
3840 Physical start address of SDRAM. _Must_ be 0 here.
3841
6d0f6bcf 3842- CONFIG_SYS_MBIO_BASE:
c609719b
WD
3843 Physical start address of Motherboard I/O (if using a
3844 Cogent motherboard)
3845
6d0f6bcf 3846- CONFIG_SYS_FLASH_BASE:
c609719b
WD
3847 Physical start address of Flash memory.
3848
6d0f6bcf 3849- CONFIG_SYS_MONITOR_BASE:
c609719b
WD
3850 Physical start address of boot monitor code (set by
3851 make config files to be same as the text base address
14d0a02a 3852 (CONFIG_SYS_TEXT_BASE) used when linking) - same as
6d0f6bcf 3853 CONFIG_SYS_FLASH_BASE when booting from flash.
c609719b 3854
6d0f6bcf 3855- CONFIG_SYS_MONITOR_LEN:
8bde7f77
WD
3856 Size of memory reserved for monitor code, used to
3857 determine _at_compile_time_ (!) if the environment is
3858 embedded within the U-Boot image, or in a separate
3859 flash sector.
c609719b 3860
6d0f6bcf 3861- CONFIG_SYS_MALLOC_LEN:
c609719b
WD
3862 Size of DRAM reserved for malloc() use.
3863
d59476b6
SG
3864- CONFIG_SYS_MALLOC_F_LEN
3865 Size of the malloc() pool for use before relocation. If
3866 this is defined, then a very simple malloc() implementation
3867 will become available before relocation. The address is just
3868 below the global data, and the stack is moved down to make
3869 space.
3870
3871 This feature allocates regions with increasing addresses
3872 within the region. calloc() is supported, but realloc()
3873 is not available. free() is supported but does nothing.
3874 The memory will be freed (or in fact just forgotton) when
3875 U-Boot relocates itself.
3876
e7b14e9a 3877 Pre-relocation malloc() is only supported on ARM and sandbox
29afe9e6
SG
3878 at present but is fairly easy to enable for other archs.
3879
6d0f6bcf 3880- CONFIG_SYS_BOOTM_LEN:
15940c9a
SR
3881 Normally compressed uImages are limited to an
3882 uncompressed size of 8 MBytes. If this is not enough,
6d0f6bcf 3883 you can define CONFIG_SYS_BOOTM_LEN in your board config file
15940c9a
SR
3884 to adjust this setting to your needs.
3885
6d0f6bcf 3886- CONFIG_SYS_BOOTMAPSZ:
c609719b
WD
3887 Maximum size of memory mapped by the startup code of
3888 the Linux kernel; all data that must be processed by
7d721e34
BS
3889 the Linux kernel (bd_info, boot arguments, FDT blob if
3890 used) must be put below this limit, unless "bootm_low"
1bce2aeb 3891 environment variable is defined and non-zero. In such case
7d721e34 3892 all data for the Linux kernel must be between "bootm_low"
c0f40859 3893 and "bootm_low" + CONFIG_SYS_BOOTMAPSZ. The environment
c3624e6e
GL
3894 variable "bootm_mapsize" will override the value of
3895 CONFIG_SYS_BOOTMAPSZ. If CONFIG_SYS_BOOTMAPSZ is undefined,
3896 then the value in "bootm_size" will be used instead.
c609719b 3897
fca43cc8
JR
3898- CONFIG_SYS_BOOT_RAMDISK_HIGH:
3899 Enable initrd_high functionality. If defined then the
3900 initrd_high feature is enabled and the bootm ramdisk subcommand
3901 is enabled.
3902
3903- CONFIG_SYS_BOOT_GET_CMDLINE:
3904 Enables allocating and saving kernel cmdline in space between
3905 "bootm_low" and "bootm_low" + BOOTMAPSZ.
3906
3907- CONFIG_SYS_BOOT_GET_KBD:
3908 Enables allocating and saving a kernel copy of the bd_info in
3909 space between "bootm_low" and "bootm_low" + BOOTMAPSZ.
3910
6d0f6bcf 3911- CONFIG_SYS_MAX_FLASH_BANKS:
c609719b
WD
3912 Max number of Flash memory banks
3913
6d0f6bcf 3914- CONFIG_SYS_MAX_FLASH_SECT:
c609719b
WD
3915 Max number of sectors on a Flash chip
3916
6d0f6bcf 3917- CONFIG_SYS_FLASH_ERASE_TOUT:
c609719b
WD
3918 Timeout for Flash erase operations (in ms)
3919
6d0f6bcf 3920- CONFIG_SYS_FLASH_WRITE_TOUT:
c609719b
WD
3921 Timeout for Flash write operations (in ms)
3922
6d0f6bcf 3923- CONFIG_SYS_FLASH_LOCK_TOUT
8564acf9
WD
3924 Timeout for Flash set sector lock bit operation (in ms)
3925
6d0f6bcf 3926- CONFIG_SYS_FLASH_UNLOCK_TOUT
8564acf9
WD
3927 Timeout for Flash clear lock bits operation (in ms)
3928
6d0f6bcf 3929- CONFIG_SYS_FLASH_PROTECTION
8564acf9
WD
3930 If defined, hardware flash sectors protection is used
3931 instead of U-Boot software protection.
3932
6d0f6bcf 3933- CONFIG_SYS_DIRECT_FLASH_TFTP:
c609719b
WD
3934
3935 Enable TFTP transfers directly to flash memory;
3936 without this option such a download has to be
3937 performed in two steps: (1) download to RAM, and (2)
3938 copy from RAM to flash.
3939
3940 The two-step approach is usually more reliable, since
3941 you can check if the download worked before you erase
11ccc33f
MZ
3942 the flash, but in some situations (when system RAM is
3943 too limited to allow for a temporary copy of the
c609719b
WD
3944 downloaded image) this option may be very useful.
3945
6d0f6bcf 3946- CONFIG_SYS_FLASH_CFI:
43d9616c 3947 Define if the flash driver uses extra elements in the
5653fc33
WD
3948 common flash structure for storing flash geometry.
3949
00b1883a 3950- CONFIG_FLASH_CFI_DRIVER
5653fc33
WD
3951 This option also enables the building of the cfi_flash driver
3952 in the drivers directory
c609719b 3953
91809ed5
PZ
3954- CONFIG_FLASH_CFI_MTD
3955 This option enables the building of the cfi_mtd driver
3956 in the drivers directory. The driver exports CFI flash
3957 to the MTD layer.
3958
6d0f6bcf 3959- CONFIG_SYS_FLASH_USE_BUFFER_WRITE
96ef831f
GL
3960 Use buffered writes to flash.
3961
3962- CONFIG_FLASH_SPANSION_S29WS_N
3963 s29ws-n MirrorBit flash has non-standard addresses for buffered
3964 write commands.
3965
6d0f6bcf 3966- CONFIG_SYS_FLASH_QUIET_TEST
5568e613
SR
3967 If this option is defined, the common CFI flash doesn't
3968 print it's warning upon not recognized FLASH banks. This
3969 is useful, if some of the configured banks are only
3970 optionally available.
3971
9a042e9c
JVB
3972- CONFIG_FLASH_SHOW_PROGRESS
3973 If defined (must be an integer), print out countdown
3974 digits and dots. Recommended value: 45 (9..1) for 80
3975 column displays, 15 (3..1) for 40 column displays.
3976
352ef3f1
SR
3977- CONFIG_FLASH_VERIFY
3978 If defined, the content of the flash (destination) is compared
3979 against the source after the write operation. An error message
3980 will be printed when the contents are not identical.
3981 Please note that this option is useless in nearly all cases,
3982 since such flash programming errors usually are detected earlier
3983 while unprotecting/erasing/programming. Please only enable
3984 this option if you really know what you are doing.
3985
6d0f6bcf 3986- CONFIG_SYS_RX_ETH_BUFFER:
11ccc33f
MZ
3987 Defines the number of Ethernet receive buffers. On some
3988 Ethernet controllers it is recommended to set this value
53cf9435
SR
3989 to 8 or even higher (EEPRO100 or 405 EMAC), since all
3990 buffers can be full shortly after enabling the interface
11ccc33f 3991 on high Ethernet traffic.
53cf9435
SR
3992 Defaults to 4 if not defined.
3993
ea882baf
WD
3994- CONFIG_ENV_MAX_ENTRIES
3995
071bc923
WD
3996 Maximum number of entries in the hash table that is used
3997 internally to store the environment settings. The default
3998 setting is supposed to be generous and should work in most
3999 cases. This setting can be used to tune behaviour; see
4000 lib/hashtable.c for details.
ea882baf 4001
2598090b
JH
4002- CONFIG_ENV_FLAGS_LIST_DEFAULT
4003- CONFIG_ENV_FLAGS_LIST_STATIC
1bce2aeb 4004 Enable validation of the values given to environment variables when
2598090b
JH
4005 calling env set. Variables can be restricted to only decimal,
4006 hexadecimal, or boolean. If CONFIG_CMD_NET is also defined,
4007 the variables can also be restricted to IP address or MAC address.
4008
4009 The format of the list is:
4010 type_attribute = [s|d|x|b|i|m]
267541f7
JH
4011 access_atribute = [a|r|o|c]
4012 attributes = type_attribute[access_atribute]
2598090b
JH
4013 entry = variable_name[:attributes]
4014 list = entry[,list]
4015
4016 The type attributes are:
4017 s - String (default)
4018 d - Decimal
4019 x - Hexadecimal
4020 b - Boolean ([1yYtT|0nNfF])
4021 i - IP address
4022 m - MAC address
4023
267541f7
JH
4024 The access attributes are:
4025 a - Any (default)
4026 r - Read-only
4027 o - Write-once
4028 c - Change-default
4029
2598090b
JH
4030 - CONFIG_ENV_FLAGS_LIST_DEFAULT
4031 Define this to a list (string) to define the ".flags"
4032 envirnoment variable in the default or embedded environment.
4033
4034 - CONFIG_ENV_FLAGS_LIST_STATIC
4035 Define this to a list (string) to define validation that
4036 should be done if an entry is not found in the ".flags"
4037 environment variable. To override a setting in the static
4038 list, simply add an entry for the same variable name to the
4039 ".flags" variable.
4040
267541f7
JH
4041- CONFIG_ENV_ACCESS_IGNORE_FORCE
4042 If defined, don't allow the -f switch to env set override variable
4043 access flags.
4044
5c1a7ea6
SG
4045- CONFIG_SYS_GENERIC_BOARD
4046 This selects the architecture-generic board system instead of the
4047 architecture-specific board files. It is intended to move boards
4048 to this new framework over time. Defining this will disable the
4049 arch/foo/lib/board.c file and use common/board_f.c and
4050 common/board_r.c instead. To use this option your architecture
4051 must support it (i.e. must define __HAVE_ARCH_GENERIC_BOARD in
4052 its config.mk file). If you find problems enabling this option on
4053 your board please report the problem and send patches!
4054
0b1b60c7
LV
4055- CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC (OMAP only)
4056 This is set by OMAP boards for the max time that reset should
4057 be asserted. See doc/README.omap-reset-time for details on how
4058 the value can be calulated on a given board.
632efa74 4059
0d296cc2
GB
4060- CONFIG_USE_STDINT
4061 If stdint.h is available with your toolchain you can define this
4062 option to enable it. You can provide option 'USE_STDINT=1' when
4063 building U-Boot to enable this.
4064
c609719b
WD
4065The following definitions that deal with the placement and management
4066of environment data (variable area); in general, we support the
4067following configurations:
4068
c3eb3fe4
MF
4069- CONFIG_BUILD_ENVCRC:
4070
4071 Builds up envcrc with the target environment so that external utils
4072 may easily extract it and embed it in final U-Boot images.
4073
5a1aceb0 4074- CONFIG_ENV_IS_IN_FLASH:
c609719b
WD
4075
4076 Define this if the environment is in flash memory.
4077
4078 a) The environment occupies one whole flash sector, which is
4079 "embedded" in the text segment with the U-Boot code. This
4080 happens usually with "bottom boot sector" or "top boot
4081 sector" type flash chips, which have several smaller
4082 sectors at the start or the end. For instance, such a
4083 layout can have sector sizes of 8, 2x4, 16, Nx32 kB. In
4084 such a case you would place the environment in one of the
4085 4 kB sectors - with U-Boot code before and after it. With
4086 "top boot sector" type flash chips, you would put the
4087 environment in one of the last sectors, leaving a gap
4088 between U-Boot and the environment.
4089
0e8d1586 4090 - CONFIG_ENV_OFFSET:
c609719b
WD
4091
4092 Offset of environment data (variable area) to the
4093 beginning of flash memory; for instance, with bottom boot
4094 type flash chips the second sector can be used: the offset
4095 for this sector is given here.
4096
6d0f6bcf 4097 CONFIG_ENV_OFFSET is used relative to CONFIG_SYS_FLASH_BASE.
c609719b 4098
0e8d1586 4099 - CONFIG_ENV_ADDR:
c609719b
WD
4100
4101 This is just another way to specify the start address of
4102 the flash sector containing the environment (instead of
0e8d1586 4103 CONFIG_ENV_OFFSET).
c609719b 4104
0e8d1586 4105 - CONFIG_ENV_SECT_SIZE:
c609719b
WD
4106
4107 Size of the sector containing the environment.
4108
4109
4110 b) Sometimes flash chips have few, equal sized, BIG sectors.
4111 In such a case you don't want to spend a whole sector for
4112 the environment.
4113
0e8d1586 4114 - CONFIG_ENV_SIZE:
c609719b 4115
5a1aceb0 4116 If you use this in combination with CONFIG_ENV_IS_IN_FLASH
0e8d1586 4117 and CONFIG_ENV_SECT_SIZE, you can specify to use only a part
c609719b
WD
4118 of this flash sector for the environment. This saves
4119 memory for the RAM copy of the environment.
4120
4121 It may also save flash memory if you decide to use this
4122 when your environment is "embedded" within U-Boot code,
4123 since then the remainder of the flash sector could be used
4124 for U-Boot code. It should be pointed out that this is
4125 STRONGLY DISCOURAGED from a robustness point of view:
4126 updating the environment in flash makes it always
4127 necessary to erase the WHOLE sector. If something goes
4128 wrong before the contents has been restored from a copy in
4129 RAM, your target system will be dead.
4130
0e8d1586
JCPV
4131 - CONFIG_ENV_ADDR_REDUND
4132 CONFIG_ENV_SIZE_REDUND
c609719b 4133
43d9616c 4134 These settings describe a second storage area used to hold
11ccc33f 4135 a redundant copy of the environment data, so that there is
3e38691e 4136 a valid backup copy in case there is a power failure during
43d9616c 4137 a "saveenv" operation.
c609719b
WD
4138
4139BE CAREFUL! Any changes to the flash layout, and some changes to the
4140source code will make it necessary to adapt <board>/u-boot.lds*
4141accordingly!
4142
4143
9314cee6 4144- CONFIG_ENV_IS_IN_NVRAM:
c609719b
WD
4145
4146 Define this if you have some non-volatile memory device
4147 (NVRAM, battery buffered SRAM) which you want to use for the
4148 environment.
4149
0e8d1586
JCPV
4150 - CONFIG_ENV_ADDR:
4151 - CONFIG_ENV_SIZE:
c609719b 4152
11ccc33f 4153 These two #defines are used to determine the memory area you
c609719b
WD
4154 want to use for environment. It is assumed that this memory
4155 can just be read and written to, without any special
4156 provision.
4157
4158BE CAREFUL! The first access to the environment happens quite early
4159in U-Boot initalization (when we try to get the setting of for the
11ccc33f 4160console baudrate). You *MUST* have mapped your NVRAM area then, or
c609719b
WD
4161U-Boot will hang.
4162
4163Please note that even with NVRAM we still use a copy of the
4164environment in RAM: we could work on NVRAM directly, but we want to
4165keep settings there always unmodified except somebody uses "saveenv"
4166to save the current settings.
4167
4168
bb1f8b4f 4169- CONFIG_ENV_IS_IN_EEPROM:
c609719b
WD
4170
4171 Use this if you have an EEPROM or similar serial access
4172 device and a driver for it.
4173
0e8d1586
JCPV
4174 - CONFIG_ENV_OFFSET:
4175 - CONFIG_ENV_SIZE:
c609719b
WD
4176
4177 These two #defines specify the offset and size of the
4178 environment area within the total memory of your EEPROM.
4179
6d0f6bcf 4180 - CONFIG_SYS_I2C_EEPROM_ADDR:
c609719b
WD
4181 If defined, specified the chip address of the EEPROM device.
4182 The default address is zero.
4183
6d0f6bcf 4184 - CONFIG_SYS_EEPROM_PAGE_WRITE_BITS:
c609719b
WD
4185 If defined, the number of bits used to address bytes in a
4186 single page in the EEPROM device. A 64 byte page, for example
4187 would require six bits.
4188
6d0f6bcf 4189 - CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS:
c609719b 4190 If defined, the number of milliseconds to delay between
ba56f625 4191 page writes. The default is zero milliseconds.
c609719b 4192
6d0f6bcf 4193 - CONFIG_SYS_I2C_EEPROM_ADDR_LEN:
c609719b
WD
4194 The length in bytes of the EEPROM memory array address. Note
4195 that this is NOT the chip address length!
4196
6d0f6bcf 4197 - CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW:
5cf91d6b
WD
4198 EEPROM chips that implement "address overflow" are ones
4199 like Catalyst 24WC04/08/16 which has 9/10/11 bits of
4200 address and the extra bits end up in the "chip address" bit
4201 slots. This makes a 24WC08 (1Kbyte) chip look like four 256
4202 byte chips.
4203
4204 Note that we consider the length of the address field to
4205 still be one byte because the extra address bits are hidden
4206 in the chip address.
4207
6d0f6bcf 4208 - CONFIG_SYS_EEPROM_SIZE:
c609719b
WD
4209 The size in bytes of the EEPROM device.
4210
548738b4
HS
4211 - CONFIG_ENV_EEPROM_IS_ON_I2C
4212 define this, if you have I2C and SPI activated, and your
4213 EEPROM, which holds the environment, is on the I2C bus.
4214
4215 - CONFIG_I2C_ENV_EEPROM_BUS
4216 if you have an Environment on an EEPROM reached over
4217 I2C muxes, you can define here, how to reach this
4218 EEPROM. For example:
4219
ea818dbb 4220 #define CONFIG_I2C_ENV_EEPROM_BUS 1
548738b4
HS
4221
4222 EEPROM which holds the environment, is reached over
4223 a pca9547 i2c mux with address 0x70, channel 3.
c609719b 4224
057c849c 4225- CONFIG_ENV_IS_IN_DATAFLASH:
5779d8d9 4226
d4ca31c4 4227 Define this if you have a DataFlash memory device which you
5779d8d9
WD
4228 want to use for the environment.
4229
0e8d1586
JCPV
4230 - CONFIG_ENV_OFFSET:
4231 - CONFIG_ENV_ADDR:
4232 - CONFIG_ENV_SIZE:
5779d8d9
WD
4233
4234 These three #defines specify the offset and size of the
4235 environment area within the total memory of your DataFlash placed
4236 at the specified address.
4237
bd83b592
WJ
4238- CONFIG_ENV_IS_IN_SPI_FLASH:
4239
4240 Define this if you have a SPI Flash memory device which you
4241 want to use for the environment.
4242
4243 - CONFIG_ENV_OFFSET:
4244 - CONFIG_ENV_SIZE:
4245
4246 These two #defines specify the offset and size of the
4247 environment area within the SPI Flash. CONFIG_ENV_OFFSET must be
4248 aligned to an erase sector boundary.
4249
4250 - CONFIG_ENV_SECT_SIZE:
4251
4252 Define the SPI flash's sector size.
4253
4254 - CONFIG_ENV_OFFSET_REDUND (optional):
4255
4256 This setting describes a second storage area of CONFIG_ENV_SIZE
4257 size used to hold a redundant copy of the environment data, so
4258 that there is a valid backup copy in case there is a power failure
4259 during a "saveenv" operation. CONFIG_ENV_OFFSET_RENDUND must be
4260 aligned to an erase sector boundary.
4261
4262 - CONFIG_ENV_SPI_BUS (optional):
4263 - CONFIG_ENV_SPI_CS (optional):
4264
4265 Define the SPI bus and chip select. If not defined they will be 0.
4266
4267 - CONFIG_ENV_SPI_MAX_HZ (optional):
4268
4269 Define the SPI max work clock. If not defined then use 1MHz.
4270
4271 - CONFIG_ENV_SPI_MODE (optional):
4272
4273 Define the SPI work mode. If not defined then use SPI_MODE_3.
4274
0a85a9e7
LG
4275- CONFIG_ENV_IS_IN_REMOTE:
4276
4277 Define this if you have a remote memory space which you
4278 want to use for the local device's environment.
4279
4280 - CONFIG_ENV_ADDR:
4281 - CONFIG_ENV_SIZE:
4282
4283 These two #defines specify the address and size of the
4284 environment area within the remote memory space. The
4285 local device can get the environment from remote memory
fc54c7fa 4286 space by SRIO or PCIE links.
0a85a9e7
LG
4287
4288BE CAREFUL! For some special cases, the local device can not use
4289"saveenv" command. For example, the local device will get the
fc54c7fa
LG
4290environment stored in a remote NOR flash by SRIO or PCIE link,
4291but it can not erase, write this NOR flash by SRIO or PCIE interface.
0a85a9e7 4292
51bfee19 4293- CONFIG_ENV_IS_IN_NAND:
13a5695b
WD
4294
4295 Define this if you have a NAND device which you want to use
4296 for the environment.
4297
0e8d1586
JCPV
4298 - CONFIG_ENV_OFFSET:
4299 - CONFIG_ENV_SIZE:
13a5695b
WD
4300
4301 These two #defines specify the offset and size of the environment
fdd813de
SW
4302 area within the first NAND device. CONFIG_ENV_OFFSET must be
4303 aligned to an erase block boundary.
5779d8d9 4304
fdd813de 4305 - CONFIG_ENV_OFFSET_REDUND (optional):
e443c944 4306
0e8d1586 4307 This setting describes a second storage area of CONFIG_ENV_SIZE
fdd813de
SW
4308 size used to hold a redundant copy of the environment data, so
4309 that there is a valid backup copy in case there is a power failure
c0f40859 4310 during a "saveenv" operation. CONFIG_ENV_OFFSET_RENDUND must be
fdd813de
SW
4311 aligned to an erase block boundary.
4312
4313 - CONFIG_ENV_RANGE (optional):
4314
4315 Specifies the length of the region in which the environment
4316 can be written. This should be a multiple of the NAND device's
4317 block size. Specifying a range with more erase blocks than
4318 are needed to hold CONFIG_ENV_SIZE allows bad blocks within
4319 the range to be avoided.
4320
4321 - CONFIG_ENV_OFFSET_OOB (optional):
4322
4323 Enables support for dynamically retrieving the offset of the
4324 environment from block zero's out-of-band data. The
4325 "nand env.oob" command can be used to record this offset.
4326 Currently, CONFIG_ENV_OFFSET_REDUND is not supported when
4327 using CONFIG_ENV_OFFSET_OOB.
e443c944 4328
b74ab737
GL
4329- CONFIG_NAND_ENV_DST
4330
4331 Defines address in RAM to which the nand_spl code should copy the
4332 environment. If redundant environment is used, it will be copied to
4333 CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE.
4334
2b74433f
JH
4335- CONFIG_ENV_IS_IN_UBI:
4336
4337 Define this if you have an UBI volume that you want to use for the
4338 environment. This has the benefit of wear-leveling the environment
4339 accesses, which is important on NAND.
4340
4341 - CONFIG_ENV_UBI_PART:
4342
4343 Define this to a string that is the mtd partition containing the UBI.
4344
4345 - CONFIG_ENV_UBI_VOLUME:
4346
4347 Define this to the name of the volume that you want to store the
4348 environment in.
4349
785881f7
JH
4350 - CONFIG_ENV_UBI_VOLUME_REDUND:
4351
4352 Define this to the name of another volume to store a second copy of
4353 the environment in. This will enable redundant environments in UBI.
4354 It is assumed that both volumes are in the same MTD partition.
4355
2b74433f
JH
4356 - CONFIG_UBI_SILENCE_MSG
4357 - CONFIG_UBIFS_SILENCE_MSG
4358
4359 You will probably want to define these to avoid a really noisy system
4360 when storing the env in UBI.
4361
d1db76f1
WJ
4362- CONFIG_ENV_IS_IN_FAT:
4363 Define this if you want to use the FAT file system for the environment.
4364
4365 - FAT_ENV_INTERFACE:
4366
4367 Define this to a string that is the name of the block device.
4368
4369 - FAT_ENV_DEV_AND_PART:
4370
4371 Define this to a string to specify the partition of the device. It can
4372 be as following:
4373
4374 "D:P", "D:0", "D", "D:" or "D:auto" (D, P are integers. And P >= 1)
4375 - "D:P": device D partition P. Error occurs if device D has no
4376 partition table.
4377 - "D:0": device D.
4378 - "D" or "D:": device D partition 1 if device D has partition
4379 table, or the whole device D if has no partition
4380 table.
4381 - "D:auto": first partition in device D with bootable flag set.
4382 If none, first valid paratition in device D. If no
4383 partition table then means device D.
4384
4385 - FAT_ENV_FILE:
4386
4387 It's a string of the FAT file name. This file use to store the
4388 envrionment.
4389
4390 - CONFIG_FAT_WRITE:
4391 This should be defined. Otherwise it cannot save the envrionment file.
4392
06e4ae5f
SW
4393- CONFIG_ENV_IS_IN_MMC:
4394
4395 Define this if you have an MMC device which you want to use for the
4396 environment.
4397
4398 - CONFIG_SYS_MMC_ENV_DEV:
4399
4400 Specifies which MMC device the environment is stored in.
4401
4402 - CONFIG_SYS_MMC_ENV_PART (optional):
4403
4404 Specifies which MMC partition the environment is stored in. If not
4405 set, defaults to partition 0, the user area. Common values might be
4406 1 (first MMC boot partition), 2 (second MMC boot partition).
4407
4408 - CONFIG_ENV_OFFSET:
4409 - CONFIG_ENV_SIZE:
4410
4411 These two #defines specify the offset and size of the environment
4412 area within the specified MMC device.
4413
5c088ee8
SW
4414 If offset is positive (the usual case), it is treated as relative to
4415 the start of the MMC partition. If offset is negative, it is treated
4416 as relative to the end of the MMC partition. This can be useful if
4417 your board may be fitted with different MMC devices, which have
4418 different sizes for the MMC partitions, and you always want the
4419 environment placed at the very end of the partition, to leave the
4420 maximum possible space before it, to store other data.
4421
06e4ae5f
SW
4422 These two values are in units of bytes, but must be aligned to an
4423 MMC sector boundary.
4424
4425 - CONFIG_ENV_OFFSET_REDUND (optional):
4426
4427 Specifies a second storage area, of CONFIG_ENV_SIZE size, used to
4428 hold a redundant copy of the environment data. This provides a
4429 valid backup copy in case the other copy is corrupted, e.g. due
4430 to a power failure during a "saveenv" operation.
4431
5c088ee8
SW
4432 This value may also be positive or negative; this is handled in the
4433 same way as CONFIG_ENV_OFFSET.
4434
06e4ae5f
SW
4435 This value is also in units of bytes, but must also be aligned to
4436 an MMC sector boundary.
4437
4438 - CONFIG_ENV_SIZE_REDUND (optional):
4439
4440 This value need not be set, even when CONFIG_ENV_OFFSET_REDUND is
4441 set. If this value is set, it must be set to the same value as
4442 CONFIG_ENV_SIZE.
4443
6d0f6bcf 4444- CONFIG_SYS_SPI_INIT_OFFSET
c609719b
WD
4445
4446 Defines offset to the initial SPI buffer area in DPRAM. The
4447 area is used at an early stage (ROM part) if the environment
4448 is configured to reside in the SPI EEPROM: We need a 520 byte
4449 scratch DPRAM area. It is used between the two initialization
4450 calls (spi_init_f() and spi_init_r()). A value of 0xB00 seems
4451 to be a good choice since it makes it far enough from the
4452 start of the data area as well as from the stack pointer.
4453
e881cb56 4454Please note that the environment is read-only until the monitor
c609719b 4455has been relocated to RAM and a RAM copy of the environment has been
cdb74977 4456created; also, when using EEPROM you will have to use getenv_f()
c609719b
WD
4457until then to read environment variables.
4458
85ec0bcc
WD
4459The environment is protected by a CRC32 checksum. Before the monitor
4460is relocated into RAM, as a result of a bad CRC you will be working
4461with the compiled-in default environment - *silently*!!! [This is
4462necessary, because the first environment variable we need is the
4463"baudrate" setting for the console - if we have a bad CRC, we don't
4464have any device yet where we could complain.]
c609719b
WD
4465
4466Note: once the monitor has been relocated, then it will complain if
4467the default environment is used; a new CRC is computed as soon as you
85ec0bcc 4468use the "saveenv" command to store a valid environment.
c609719b 4469
6d0f6bcf 4470- CONFIG_SYS_FAULT_ECHO_LINK_DOWN:
42d1f039 4471 Echo the inverted Ethernet link state to the fault LED.
fc3e2165 4472
6d0f6bcf 4473 Note: If this option is active, then CONFIG_SYS_FAULT_MII_ADDR
fc3e2165
WD
4474 also needs to be defined.
4475
6d0f6bcf 4476- CONFIG_SYS_FAULT_MII_ADDR:
42d1f039 4477 MII address of the PHY to check for the Ethernet link state.
c609719b 4478
f5675aa5
RM
4479- CONFIG_NS16550_MIN_FUNCTIONS:
4480 Define this if you desire to only have use of the NS16550_init
4481 and NS16550_putc functions for the serial driver located at
4482 drivers/serial/ns16550.c. This option is useful for saving
4483 space for already greatly restricted images, including but not
4484 limited to NAND_SPL configurations.
4485
b2b92f53
SG
4486- CONFIG_DISPLAY_BOARDINFO
4487 Display information about the board that U-Boot is running on
4488 when U-Boot starts up. The board function checkboard() is called
4489 to do this.
4490
e2e3e2b1
SG
4491- CONFIG_DISPLAY_BOARDINFO_LATE
4492 Similar to the previous option, but display this information
4493 later, once stdio is running and output goes to the LCD, if
4494 present.
4495
feb85801
SS
4496- CONFIG_BOARD_SIZE_LIMIT:
4497 Maximum size of the U-Boot image. When defined, the
4498 build system checks that the actual size does not
4499 exceed it.
4500
c609719b 4501Low Level (hardware related) configuration options:
dc7c9a1a 4502---------------------------------------------------
c609719b 4503
6d0f6bcf 4504- CONFIG_SYS_CACHELINE_SIZE:
c609719b
WD
4505 Cache Line Size of the CPU.
4506
6d0f6bcf 4507- CONFIG_SYS_DEFAULT_IMMR:
c609719b 4508 Default address of the IMMR after system reset.
2535d602 4509
42d1f039
WD
4510 Needed on some 8260 systems (MPC8260ADS, PQ2FADS-ZU,
4511 and RPXsuper) to be able to adjust the position of
4512 the IMMR register after a reset.
c609719b 4513
e46fedfe
TT
4514- CONFIG_SYS_CCSRBAR_DEFAULT:
4515 Default (power-on reset) physical address of CCSR on Freescale
4516 PowerPC SOCs.
4517
4518- CONFIG_SYS_CCSRBAR:
4519 Virtual address of CCSR. On a 32-bit build, this is typically
4520 the same value as CONFIG_SYS_CCSRBAR_DEFAULT.
4521
4522 CONFIG_SYS_DEFAULT_IMMR must also be set to this value,
4523 for cross-platform code that uses that macro instead.
4524
4525- CONFIG_SYS_CCSRBAR_PHYS:
4526 Physical address of CCSR. CCSR can be relocated to a new
4527 physical address, if desired. In this case, this macro should
c0f40859 4528 be set to that address. Otherwise, it should be set to the
e46fedfe
TT
4529 same value as CONFIG_SYS_CCSRBAR_DEFAULT. For example, CCSR
4530 is typically relocated on 36-bit builds. It is recommended
4531 that this macro be defined via the _HIGH and _LOW macros:
4532
4533 #define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH
4534 * 1ull) << 32 | CONFIG_SYS_CCSRBAR_PHYS_LOW)
4535
4536- CONFIG_SYS_CCSRBAR_PHYS_HIGH:
4cf2609b
WD
4537 Bits 33-36 of CONFIG_SYS_CCSRBAR_PHYS. This value is typically
4538 either 0 (32-bit build) or 0xF (36-bit build). This macro is
e46fedfe
TT
4539 used in assembly code, so it must not contain typecasts or
4540 integer size suffixes (e.g. "ULL").
4541
4542- CONFIG_SYS_CCSRBAR_PHYS_LOW:
4543 Lower 32-bits of CONFIG_SYS_CCSRBAR_PHYS. This macro is
4544 used in assembly code, so it must not contain typecasts or
4545 integer size suffixes (e.g. "ULL").
4546
4547- CONFIG_SYS_CCSR_DO_NOT_RELOCATE:
4548 If this macro is defined, then CONFIG_SYS_CCSRBAR_PHYS will be
4549 forced to a value that ensures that CCSR is not relocated.
4550
7f6c2cbc 4551- Floppy Disk Support:
6d0f6bcf 4552 CONFIG_SYS_FDC_DRIVE_NUMBER
7f6c2cbc
WD
4553
4554 the default drive number (default value 0)
4555
6d0f6bcf 4556 CONFIG_SYS_ISA_IO_STRIDE
7f6c2cbc 4557
11ccc33f 4558 defines the spacing between FDC chipset registers
7f6c2cbc
WD
4559 (default value 1)
4560
6d0f6bcf 4561 CONFIG_SYS_ISA_IO_OFFSET
7f6c2cbc 4562
43d9616c
WD
4563 defines the offset of register from address. It
4564 depends on which part of the data bus is connected to
11ccc33f 4565 the FDC chipset. (default value 0)
7f6c2cbc 4566
6d0f6bcf
JCPV
4567 If CONFIG_SYS_ISA_IO_STRIDE CONFIG_SYS_ISA_IO_OFFSET and
4568 CONFIG_SYS_FDC_DRIVE_NUMBER are undefined, they take their
43d9616c 4569 default value.
7f6c2cbc 4570
6d0f6bcf 4571 if CONFIG_SYS_FDC_HW_INIT is defined, then the function
43d9616c
WD
4572 fdc_hw_init() is called at the beginning of the FDC
4573 setup. fdc_hw_init() must be provided by the board
4574 source code. It is used to make hardware dependant
4575 initializations.
7f6c2cbc 4576
0abddf82
ML
4577- CONFIG_IDE_AHB:
4578 Most IDE controllers were designed to be connected with PCI
4579 interface. Only few of them were designed for AHB interface.
4580 When software is doing ATA command and data transfer to
4581 IDE devices through IDE-AHB controller, some additional
4582 registers accessing to these kind of IDE-AHB controller
4583 is requierd.
4584
6d0f6bcf 4585- CONFIG_SYS_IMMR: Physical address of the Internal Memory.
efe2a4d5 4586 DO NOT CHANGE unless you know exactly what you're
25d6712a 4587 doing! (11-4) [MPC8xx/82xx systems only]
c609719b 4588
6d0f6bcf 4589- CONFIG_SYS_INIT_RAM_ADDR:
c609719b 4590
7152b1d0 4591 Start address of memory area that can be used for
c609719b
WD
4592 initial data and stack; please note that this must be
4593 writable memory that is working WITHOUT special
4594 initialization, i. e. you CANNOT use normal RAM which
4595 will become available only after programming the
4596 memory controller and running certain initialization
4597 sequences.
4598
4599 U-Boot uses the following memory types:
4600 - MPC8xx and MPC8260: IMMR (internal memory of the CPU)
4601 - MPC824X: data cache
4602 - PPC4xx: data cache
4603
6d0f6bcf 4604- CONFIG_SYS_GBL_DATA_OFFSET:
c609719b
WD
4605
4606 Offset of the initial data structure in the memory
6d0f6bcf
JCPV
4607 area defined by CONFIG_SYS_INIT_RAM_ADDR. Usually
4608 CONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial
c609719b 4609 data is located at the end of the available space
553f0982 4610 (sometimes written as (CONFIG_SYS_INIT_RAM_SIZE -
6d0f6bcf
JCPV
4611 CONFIG_SYS_INIT_DATA_SIZE), and the initial stack is just
4612 below that area (growing from (CONFIG_SYS_INIT_RAM_ADDR +
4613 CONFIG_SYS_GBL_DATA_OFFSET) downward.
c609719b
WD
4614
4615 Note:
4616 On the MPC824X (or other systems that use the data
4617 cache for initial memory) the address chosen for
6d0f6bcf 4618 CONFIG_SYS_INIT_RAM_ADDR is basically arbitrary - it must
c609719b
WD
4619 point to an otherwise UNUSED address space between
4620 the top of RAM and the start of the PCI space.
4621
6d0f6bcf 4622- CONFIG_SYS_SIUMCR: SIU Module Configuration (11-6)
c609719b 4623
6d0f6bcf 4624- CONFIG_SYS_SYPCR: System Protection Control (11-9)
c609719b 4625
6d0f6bcf 4626- CONFIG_SYS_TBSCR: Time Base Status and Control (11-26)
c609719b 4627
6d0f6bcf 4628- CONFIG_SYS_PISCR: Periodic Interrupt Status and Control (11-31)
c609719b 4629
6d0f6bcf 4630- CONFIG_SYS_PLPRCR: PLL, Low-Power, and Reset Control Register (15-30)
c609719b 4631
6d0f6bcf 4632- CONFIG_SYS_SCCR: System Clock and reset Control Register (15-27)
c609719b 4633
6d0f6bcf 4634- CONFIG_SYS_OR_TIMING_SDRAM:
c609719b
WD
4635 SDRAM timing
4636
6d0f6bcf 4637- CONFIG_SYS_MAMR_PTA:
c609719b
WD
4638 periodic timer for refresh
4639
6d0f6bcf 4640- CONFIG_SYS_DER: Debug Event Register (37-47)
c609719b 4641
6d0f6bcf
JCPV
4642- FLASH_BASE0_PRELIM, FLASH_BASE1_PRELIM, CONFIG_SYS_REMAP_OR_AM,
4643 CONFIG_SYS_PRELIM_OR_AM, CONFIG_SYS_OR_TIMING_FLASH, CONFIG_SYS_OR0_REMAP,
4644 CONFIG_SYS_OR0_PRELIM, CONFIG_SYS_BR0_PRELIM, CONFIG_SYS_OR1_REMAP, CONFIG_SYS_OR1_PRELIM,
4645 CONFIG_SYS_BR1_PRELIM:
c609719b
WD
4646 Memory Controller Definitions: BR0/1 and OR0/1 (FLASH)
4647
4648- SDRAM_BASE2_PRELIM, SDRAM_BASE3_PRELIM, SDRAM_MAX_SIZE,
6d0f6bcf
JCPV
4649 CONFIG_SYS_OR_TIMING_SDRAM, CONFIG_SYS_OR2_PRELIM, CONFIG_SYS_BR2_PRELIM,
4650 CONFIG_SYS_OR3_PRELIM, CONFIG_SYS_BR3_PRELIM:
c609719b
WD
4651 Memory Controller Definitions: BR2/3 and OR2/3 (SDRAM)
4652
6d0f6bcf
JCPV
4653- CONFIG_SYS_MAMR_PTA, CONFIG_SYS_MPTPR_2BK_4K, CONFIG_SYS_MPTPR_1BK_4K, CONFIG_SYS_MPTPR_2BK_8K,
4654 CONFIG_SYS_MPTPR_1BK_8K, CONFIG_SYS_MAMR_8COL, CONFIG_SYS_MAMR_9COL:
c609719b
WD
4655 Machine Mode Register and Memory Periodic Timer
4656 Prescaler definitions (SDRAM timing)
4657
6d0f6bcf 4658- CONFIG_SYS_I2C_UCODE_PATCH, CONFIG_SYS_I2C_DPMEM_OFFSET [0x1FC0]:
c609719b
WD
4659 enable I2C microcode relocation patch (MPC8xx);
4660 define relocation offset in DPRAM [DSP2]
4661
6d0f6bcf 4662- CONFIG_SYS_SMC_UCODE_PATCH, CONFIG_SYS_SMC_DPMEM_OFFSET [0x1FC0]:
b423d055
HS
4663 enable SMC microcode relocation patch (MPC8xx);
4664 define relocation offset in DPRAM [SMC1]
4665
6d0f6bcf 4666- CONFIG_SYS_SPI_UCODE_PATCH, CONFIG_SYS_SPI_DPMEM_OFFSET [0x1FC0]:
c609719b
WD
4667 enable SPI microcode relocation patch (MPC8xx);
4668 define relocation offset in DPRAM [SCC4]
4669
6d0f6bcf 4670- CONFIG_SYS_USE_OSCCLK:
c609719b
WD
4671 Use OSCM clock mode on MBX8xx board. Be careful,
4672 wrong setting might damage your board. Read
4673 doc/README.MBX before setting this variable!
4674
6d0f6bcf 4675- CONFIG_SYS_CPM_POST_WORD_ADDR: (MPC8xx, MPC8260 only)
43d9616c
WD
4676 Offset of the bootmode word in DPRAM used by post
4677 (Power On Self Tests). This definition overrides
4678 #define'd default value in commproc.h resp.
4679 cpm_8260.h.
ea909b76 4680
6d0f6bcf
JCPV
4681- CONFIG_SYS_PCI_SLV_MEM_LOCAL, CONFIG_SYS_PCI_SLV_MEM_BUS, CONFIG_SYS_PICMR0_MASK_ATTRIB,
4682 CONFIG_SYS_PCI_MSTR0_LOCAL, CONFIG_SYS_PCIMSK0_MASK, CONFIG_SYS_PCI_MSTR1_LOCAL,
4683 CONFIG_SYS_PCIMSK1_MASK, CONFIG_SYS_PCI_MSTR_MEM_LOCAL, CONFIG_SYS_PCI_MSTR_MEM_BUS,
4684 CONFIG_SYS_CPU_PCI_MEM_START, CONFIG_SYS_PCI_MSTR_MEM_SIZE, CONFIG_SYS_POCMR0_MASK_ATTRIB,
4685 CONFIG_SYS_PCI_MSTR_MEMIO_LOCAL, CONFIG_SYS_PCI_MSTR_MEMIO_BUS, CPU_PCI_MEMIO_START,
4686 CONFIG_SYS_PCI_MSTR_MEMIO_SIZE, CONFIG_SYS_POCMR1_MASK_ATTRIB, CONFIG_SYS_PCI_MSTR_IO_LOCAL,
4687 CONFIG_SYS_PCI_MSTR_IO_BUS, CONFIG_SYS_CPU_PCI_IO_START, CONFIG_SYS_PCI_MSTR_IO_SIZE,
4688 CONFIG_SYS_POCMR2_MASK_ATTRIB: (MPC826x only)
a47a12be 4689 Overrides the default PCI memory map in arch/powerpc/cpu/mpc8260/pci.c if set.
5d232d0e 4690
9cacf4fc
DE
4691- CONFIG_PCI_DISABLE_PCIE:
4692 Disable PCI-Express on systems where it is supported but not
4693 required.
4694
69fd2d3b
AS
4695- CONFIG_PCI_ENUM_ONLY
4696 Only scan through and get the devices on the busses.
4697 Don't do any setup work, presumably because someone or
4698 something has already done it, and we don't need to do it
4699 a second time. Useful for platforms that are pre-booted
4700 by coreboot or similar.
4701
842033e6
GJ
4702- CONFIG_PCI_INDIRECT_BRIDGE:
4703 Enable support for indirect PCI bridges.
4704
a09b9b68
KG
4705- CONFIG_SYS_SRIO:
4706 Chip has SRIO or not
4707
4708- CONFIG_SRIO1:
4709 Board has SRIO 1 port available
4710
4711- CONFIG_SRIO2:
4712 Board has SRIO 2 port available
4713
c8b28152
LG
4714- CONFIG_SRIO_PCIE_BOOT_MASTER
4715 Board can support master function for Boot from SRIO and PCIE
4716
a09b9b68
KG
4717- CONFIG_SYS_SRIOn_MEM_VIRT:
4718 Virtual Address of SRIO port 'n' memory region
4719
4720- CONFIG_SYS_SRIOn_MEM_PHYS:
4721 Physical Address of SRIO port 'n' memory region
4722
4723- CONFIG_SYS_SRIOn_MEM_SIZE:
4724 Size of SRIO port 'n' memory region
4725
66bd1846
FE
4726- CONFIG_SYS_NAND_BUSWIDTH_16BIT
4727 Defined to tell the NAND controller that the NAND chip is using
4728 a 16 bit bus.
4729 Not all NAND drivers use this symbol.
a430e916 4730 Example of drivers that use it:
66bd1846 4731 - drivers/mtd/nand/ndfc.c
a430e916 4732 - drivers/mtd/nand/mxc_nand.c
eced4626
AW
4733
4734- CONFIG_SYS_NDFC_EBC0_CFG
4735 Sets the EBC0_CFG register for the NDFC. If not defined
4736 a default value will be used.
4737
bb99ad6d 4738- CONFIG_SPD_EEPROM
218ca724
WD
4739 Get DDR timing information from an I2C EEPROM. Common
4740 with pluggable memory modules such as SODIMMs
4741
bb99ad6d
BW
4742 SPD_EEPROM_ADDRESS
4743 I2C address of the SPD EEPROM
4744
6d0f6bcf 4745- CONFIG_SYS_SPD_BUS_NUM
218ca724
WD
4746 If SPD EEPROM is on an I2C bus other than the first
4747 one, specify here. Note that the value must resolve
4748 to something your driver can deal with.
bb99ad6d 4749
1b3e3c4f
YS
4750- CONFIG_SYS_DDR_RAW_TIMING
4751 Get DDR timing information from other than SPD. Common with
4752 soldered DDR chips onboard without SPD. DDR raw timing
4753 parameters are extracted from datasheet and hard-coded into
4754 header files or board specific files.
4755
6f5e1dc5
YS
4756- CONFIG_FSL_DDR_INTERACTIVE
4757 Enable interactive DDR debugging. See doc/README.fsl-ddr.
4758
6d0f6bcf 4759- CONFIG_SYS_83XX_DDR_USES_CS0
218ca724
WD
4760 Only for 83xx systems. If specified, then DDR should
4761 be configured using CS0 and CS1 instead of CS2 and CS3.
2ad6b513 4762
c26e454d
WD
4763- CONFIG_ETHER_ON_FEC[12]
4764 Define to enable FEC[12] on a 8xx series processor.
4765
4766- CONFIG_FEC[12]_PHY
4767 Define to the hardcoded PHY address which corresponds
6e592385
WD
4768 to the given FEC; i. e.
4769 #define CONFIG_FEC1_PHY 4
c26e454d
WD
4770 means that the PHY with address 4 is connected to FEC1
4771
4772 When set to -1, means to probe for first available.
4773
4774- CONFIG_FEC[12]_PHY_NORXERR
4775 The PHY does not have a RXERR line (RMII only).
4776 (so program the FEC to ignore it).
4777
4778- CONFIG_RMII
4779 Enable RMII mode for all FECs.
4780 Note that this is a global option, we can't
4781 have one FEC in standard MII mode and another in RMII mode.
4782
5cf91d6b
WD
4783- CONFIG_CRC32_VERIFY
4784 Add a verify option to the crc32 command.
4785 The syntax is:
4786
4787 => crc32 -v <address> <count> <crc32>
4788
4789 Where address/count indicate a memory area
4790 and crc32 is the correct crc32 which the
4791 area should have.
4792
56523f12
WD
4793- CONFIG_LOOPW
4794 Add the "loopw" memory command. This only takes effect if
602ad3b3 4795 the memory commands are activated globally (CONFIG_CMD_MEM).
56523f12 4796
7b466641
SR
4797- CONFIG_MX_CYCLIC
4798 Add the "mdc" and "mwc" memory commands. These are cyclic
4799 "md/mw" commands.
4800 Examples:
4801
efe2a4d5 4802 => mdc.b 10 4 500
7b466641
SR
4803 This command will print 4 bytes (10,11,12,13) each 500 ms.
4804
efe2a4d5 4805 => mwc.l 100 12345678 10
7b466641
SR
4806 This command will write 12345678 to address 100 all 10 ms.
4807
efe2a4d5 4808 This only takes effect if the memory commands are activated
602ad3b3 4809 globally (CONFIG_CMD_MEM).
7b466641 4810
8aa1a2d1 4811- CONFIG_SKIP_LOWLEVEL_INIT
afc1ce82 4812 [ARM, NDS32, MIPS only] If this variable is defined, then certain
844f07d8
WD
4813 low level initializations (like setting up the memory
4814 controller) are omitted and/or U-Boot does not
4815 relocate itself into RAM.
4816
4817 Normally this variable MUST NOT be defined. The only
4818 exception is when U-Boot is loaded (to RAM) by some
4819 other boot loader or by a debugger which performs
4820 these initializations itself.
8aa1a2d1 4821
401bb30b 4822- CONFIG_SPL_BUILD
df81238b
ML
4823 Modifies the behaviour of start.S when compiling a loader
4824 that is executed before the actual U-Boot. E.g. when
4825 compiling a NAND SPL.
400558b5 4826
3aa29de0
YZ
4827- CONFIG_TPL_BUILD
4828 Modifies the behaviour of start.S when compiling a loader
4829 that is executed after the SPL and before the actual U-Boot.
4830 It is loaded by the SPL.
4831
5df572f0
YZ
4832- CONFIG_SYS_MPC85XX_NO_RESETVEC
4833 Only for 85xx systems. If this variable is specified, the section
4834 .resetvec is not kept and the section .bootpg is placed in the
4835 previous 4k of the .text section.
4836
4213fc29
SG
4837- CONFIG_ARCH_MAP_SYSMEM
4838 Generally U-Boot (and in particular the md command) uses
4839 effective address. It is therefore not necessary to regard
4840 U-Boot address as virtual addresses that need to be translated
4841 to physical addresses. However, sandbox requires this, since
4842 it maintains its own little RAM buffer which contains all
4843 addressable memory. This option causes some memory accesses
4844 to be mapped through map_sysmem() / unmap_sysmem().
4845
d8834a13
MW
4846- CONFIG_USE_ARCH_MEMCPY
4847 CONFIG_USE_ARCH_MEMSET
4848 If these options are used a optimized version of memcpy/memset will
4849 be used if available. These functions may be faster under some
4850 conditions but may increase the binary size.
4851
588a13f7
SG
4852- CONFIG_X86_RESET_VECTOR
4853 If defined, the x86 reset vector code is included. This is not
4854 needed when U-Boot is running from Coreboot.
b16f521a 4855
fc33705e
MJ
4856- CONFIG_SYS_MPUCLK
4857 Defines the MPU clock speed (in MHz).
4858
4859 NOTE : currently only supported on AM335x platforms.
5b5ece9e 4860
16678eb4
HS
4861- CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC:
4862 Enables the RTC32K OSC on AM33xx based plattforms
4863
999d7d32
KM
4864- CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
4865 Option to disable subpage write in NAND driver
4866 driver that uses this:
4867 drivers/mtd/nand/davinci_nand.c
4868
f2717b47
TT
4869Freescale QE/FMAN Firmware Support:
4870-----------------------------------
4871
4872The Freescale QUICCEngine (QE) and Frame Manager (FMAN) both support the
4873loading of "firmware", which is encoded in the QE firmware binary format.
4874This firmware often needs to be loaded during U-Boot booting, so macros
4875are used to identify the storage device (NOR flash, SPI, etc) and the address
4876within that device.
4877
dcf1d774
ZQ
4878- CONFIG_SYS_FMAN_FW_ADDR
4879 The address in the storage device where the FMAN microcode is located. The
4880 meaning of this address depends on which CONFIG_SYS_QE_FW_IN_xxx macro
4881 is also specified.
4882
4883- CONFIG_SYS_QE_FW_ADDR
4884 The address in the storage device where the QE microcode is located. The
f2717b47
TT
4885 meaning of this address depends on which CONFIG_SYS_QE_FW_IN_xxx macro
4886 is also specified.
4887
4888- CONFIG_SYS_QE_FMAN_FW_LENGTH
4889 The maximum possible size of the firmware. The firmware binary format
4890 has a field that specifies the actual size of the firmware, but it
4891 might not be possible to read any part of the firmware unless some
4892 local storage is allocated to hold the entire firmware first.
4893
4894- CONFIG_SYS_QE_FMAN_FW_IN_NOR
4895 Specifies that QE/FMAN firmware is located in NOR flash, mapped as
4896 normal addressable memory via the LBC. CONFIG_SYS_FMAN_FW_ADDR is the
4897 virtual address in NOR flash.
4898
4899- CONFIG_SYS_QE_FMAN_FW_IN_NAND
4900 Specifies that QE/FMAN firmware is located in NAND flash.
4901 CONFIG_SYS_FMAN_FW_ADDR is the offset within NAND flash.
4902
4903- CONFIG_SYS_QE_FMAN_FW_IN_MMC
4904 Specifies that QE/FMAN firmware is located on the primary SD/MMC
4905 device. CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device.
4906
4907- CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH
4908 Specifies that QE/FMAN firmware is located on the primary SPI
4909 device. CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device.
4910
292dc6c5
LG
4911- CONFIG_SYS_QE_FMAN_FW_IN_REMOTE
4912 Specifies that QE/FMAN firmware is located in the remote (master)
4913 memory space. CONFIG_SYS_FMAN_FW_ADDR is a virtual address which
fc54c7fa
LG
4914 can be mapped from slave TLB->slave LAW->slave SRIO or PCIE outbound
4915 window->master inbound window->master LAW->the ucode address in
4916 master's memory space.
f2717b47 4917
b940ca64
GR
4918Freescale Layerscape Management Complex Firmware Support:
4919---------------------------------------------------------
4920The Freescale Layerscape Management Complex (MC) supports the loading of
4921"firmware".
4922This firmware often needs to be loaded during U-Boot booting, so macros
4923are used to identify the storage device (NOR flash, SPI, etc) and the address
4924within that device.
4925
4926- CONFIG_FSL_MC_ENET
4927 Enable the MC driver for Layerscape SoCs.
4928
4929- CONFIG_SYS_LS_MC_FW_ADDR
4930 The address in the storage device where the firmware is located. The
4931 meaning of this address depends on which CONFIG_SYS_LS_MC_FW_IN_xxx macro
4932 is also specified.
4933
4934- CONFIG_SYS_LS_MC_FW_LENGTH
4935 The maximum possible size of the firmware. The firmware binary format
4936 has a field that specifies the actual size of the firmware, but it
4937 might not be possible to read any part of the firmware unless some
4938 local storage is allocated to hold the entire firmware first.
4939
4940- CONFIG_SYS_LS_MC_FW_IN_NOR
4941 Specifies that MC firmware is located in NOR flash, mapped as
4942 normal addressable memory via the LBC. CONFIG_SYS_LS_MC_FW_ADDR is the
4943 virtual address in NOR flash.
4944
c609719b
WD
4945Building the Software:
4946======================
4947
218ca724
WD
4948Building U-Boot has been tested in several native build environments
4949and in many different cross environments. Of course we cannot support
4950all possibly existing versions of cross development tools in all
4951(potentially obsolete) versions. In case of tool chain problems we
4952recommend to use the ELDK (see http://www.denx.de/wiki/DULG/ELDK)
4953which is extensively used to build and test U-Boot.
c609719b 4954
218ca724
WD
4955If you are not using a native environment, it is assumed that you
4956have GNU cross compiling tools available in your path. In this case,
4957you must set the environment variable CROSS_COMPILE in your shell.
4958Note that no changes to the Makefile or any other source files are
4959necessary. For example using the ELDK on a 4xx CPU, please enter:
c609719b 4960
218ca724
WD
4961 $ CROSS_COMPILE=ppc_4xx-
4962 $ export CROSS_COMPILE
c609719b 4963
2f8d396b
PT
4964Note: If you wish to generate Windows versions of the utilities in
4965 the tools directory you can use the MinGW toolchain
4966 (http://www.mingw.org). Set your HOST tools to the MinGW
4967 toolchain and execute 'make tools'. For example:
4968
4969 $ make HOSTCC=i586-mingw32msvc-gcc HOSTSTRIP=i586-mingw32msvc-strip tools
4970
4971 Binaries such as tools/mkimage.exe will be created which can
4972 be executed on computers running Windows.
4973
218ca724
WD
4974U-Boot is intended to be simple to build. After installing the
4975sources you must configure U-Boot for one specific board type. This
c609719b
WD
4976is done by typing:
4977
ab584d67 4978 make NAME_defconfig
c609719b 4979
ab584d67 4980where "NAME_defconfig" is the name of one of the existing configu-
4d675ae6 4981rations; see boards.cfg for supported names.
db01a2ea 4982
2729af9d
WD
4983Note: for some board special configuration names may exist; check if
4984 additional information is available from the board vendor; for
4985 instance, the TQM823L systems are available without (standard)
4986 or with LCD support. You can select such additional "features"
11ccc33f 4987 when choosing the configuration, i. e.
2729af9d 4988
ab584d67 4989 make TQM823L_defconfig
2729af9d
WD
4990 - will configure for a plain TQM823L, i. e. no LCD support
4991
ab584d67 4992 make TQM823L_LCD_defconfig
2729af9d
WD
4993 - will configure for a TQM823L with U-Boot console on LCD
4994
4995 etc.
4996
4997
4998Finally, type "make all", and you should get some working U-Boot
4999images ready for download to / installation on your system:
5000
5001- "u-boot.bin" is a raw binary image
5002- "u-boot" is an image in ELF binary format
5003- "u-boot.srec" is in Motorola S-Record format
5004
baf31249
MB
5005By default the build is performed locally and the objects are saved
5006in the source directory. One of the two methods can be used to change
5007this behavior and build U-Boot to some external directory:
5008
50091. Add O= to the make command line invocations:
5010
5011 make O=/tmp/build distclean
ab584d67 5012 make O=/tmp/build NAME_defconfig
baf31249
MB
5013 make O=/tmp/build all
5014
adbba996 50152. Set environment variable KBUILD_OUTPUT to point to the desired location:
baf31249 5016
adbba996 5017 export KBUILD_OUTPUT=/tmp/build
baf31249 5018 make distclean
ab584d67 5019 make NAME_defconfig
baf31249
MB
5020 make all
5021
adbba996 5022Note that the command line "O=" setting overrides the KBUILD_OUTPUT environment
baf31249
MB
5023variable.
5024
2729af9d
WD
5025
5026Please be aware that the Makefiles assume you are using GNU make, so
5027for instance on NetBSD you might need to use "gmake" instead of
5028native "make".
5029
5030
5031If the system board that you have is not listed, then you will need
5032to port U-Boot to your hardware platform. To do this, follow these
5033steps:
5034
50351. Add a new configuration option for your board to the toplevel
4d675ae6
MJ
5036 "boards.cfg" file, using the existing entries as examples.
5037 Follow the instructions there to keep the boards in order.
2729af9d
WD
50382. Create a new directory to hold your board specific code. Add any
5039 files you need. In your board directory, you will need at least
5040 the "Makefile", a "<board>.c", "flash.c" and "u-boot.lds".
50413. Create a new configuration file "include/configs/<board>.h" for
5042 your board
50433. If you're porting U-Boot to a new CPU, then also create a new
5044 directory to hold your CPU specific code. Add any files you need.
ab584d67 50454. Run "make <board>_defconfig" with your new name.
2729af9d
WD
50465. Type "make", and you should get a working "u-boot.srec" file
5047 to be installed on your target system.
50486. Debug and solve any problems that might arise.
5049 [Of course, this last step is much harder than it sounds.]
5050
5051
5052Testing of U-Boot Modifications, Ports to New Hardware, etc.:
5053==============================================================
5054
218ca724
WD
5055If you have modified U-Boot sources (for instance added a new board
5056or support for new devices, a new CPU, etc.) you are expected to
2729af9d
WD
5057provide feedback to the other developers. The feedback normally takes
5058the form of a "patch", i. e. a context diff against a certain (latest
218ca724 5059official or latest in the git repository) version of U-Boot sources.
2729af9d 5060
218ca724
WD
5061But before you submit such a patch, please verify that your modifi-
5062cation did not break existing code. At least make sure that *ALL* of
2729af9d
WD
5063the supported boards compile WITHOUT ANY compiler warnings. To do so,
5064just run the "MAKEALL" script, which will configure and build U-Boot
218ca724
WD
5065for ALL supported system. Be warned, this will take a while. You can
5066select which (cross) compiler to use by passing a `CROSS_COMPILE'
5067environment variable to the script, i. e. to use the ELDK cross tools
5068you can type
2729af9d
WD
5069
5070 CROSS_COMPILE=ppc_8xx- MAKEALL
5071
5072or to build on a native PowerPC system you can type
5073
5074 CROSS_COMPILE=' ' MAKEALL
5075
218ca724
WD
5076When using the MAKEALL script, the default behaviour is to build
5077U-Boot in the source directory. This location can be changed by
5078setting the BUILD_DIR environment variable. Also, for each target
5079built, the MAKEALL script saves two log files (<target>.ERR and
5080<target>.MAKEALL) in the <source dir>/LOG directory. This default
5081location can be changed by setting the MAKEALL_LOGDIR environment
5082variable. For example:
baf31249
MB
5083
5084 export BUILD_DIR=/tmp/build
5085 export MAKEALL_LOGDIR=/tmp/log
5086 CROSS_COMPILE=ppc_8xx- MAKEALL
5087
218ca724
WD
5088With the above settings build objects are saved in the /tmp/build,
5089log files are saved in the /tmp/log and the source tree remains clean
5090during the whole build process.
baf31249
MB
5091
5092
2729af9d
WD
5093See also "U-Boot Porting Guide" below.
5094
5095
5096Monitor Commands - Overview:
5097============================
5098
5099go - start application at address 'addr'
5100run - run commands in an environment variable
5101bootm - boot application image from memory
5102bootp - boot image via network using BootP/TFTP protocol
44f074c7 5103bootz - boot zImage from memory
2729af9d
WD
5104tftpboot- boot image via network using TFTP protocol
5105 and env variables "ipaddr" and "serverip"
5106 (and eventually "gatewayip")
1fb7cd49 5107tftpput - upload a file via network using TFTP protocol
2729af9d
WD
5108rarpboot- boot image via network using RARP/TFTP protocol
5109diskboot- boot from IDE devicebootd - boot default, i.e., run 'bootcmd'
5110loads - load S-Record file over serial line
5111loadb - load binary file over serial line (kermit mode)
5112md - memory display
5113mm - memory modify (auto-incrementing)
5114nm - memory modify (constant address)
5115mw - memory write (fill)
5116cp - memory copy
5117cmp - memory compare
5118crc32 - checksum calculation
0f89c54b 5119i2c - I2C sub-system
2729af9d
WD
5120sspi - SPI utility commands
5121base - print or set address offset
5122printenv- print environment variables
5123setenv - set environment variables
5124saveenv - save environment variables to persistent storage
5125protect - enable or disable FLASH write protection
5126erase - erase FLASH memory
5127flinfo - print FLASH memory information
10635afa 5128nand - NAND memory operations (see doc/README.nand)
2729af9d
WD
5129bdinfo - print Board Info structure
5130iminfo - print header information for application image
5131coninfo - print console devices and informations
5132ide - IDE sub-system
5133loop - infinite loop on address range
56523f12 5134loopw - infinite write loop on address range
2729af9d
WD
5135mtest - simple RAM test
5136icache - enable or disable instruction cache
5137dcache - enable or disable data cache
5138reset - Perform RESET of the CPU
5139echo - echo args to console
5140version - print monitor version
5141help - print online help
5142? - alias for 'help'
5143
5144
5145Monitor Commands - Detailed Description:
5146========================================
5147
5148TODO.
5149
5150For now: just type "help <command>".
5151
5152
5153Environment Variables:
5154======================
5155
5156U-Boot supports user configuration using Environment Variables which
5157can be made persistent by saving to Flash memory.
c609719b 5158
2729af9d
WD
5159Environment Variables are set using "setenv", printed using
5160"printenv", and saved to Flash using "saveenv". Using "setenv"
5161without a value can be used to delete a variable from the
5162environment. As long as you don't save the environment you are
5163working with an in-memory copy. In case the Flash area containing the
5164environment is erased by accident, a default environment is provided.
c609719b 5165
c96f86ee
WD
5166Some configuration options can be set using Environment Variables.
5167
5168List of environment variables (most likely not complete):
c609719b 5169
2729af9d 5170 baudrate - see CONFIG_BAUDRATE
c609719b 5171
2729af9d 5172 bootdelay - see CONFIG_BOOTDELAY
c609719b 5173
2729af9d 5174 bootcmd - see CONFIG_BOOTCOMMAND
4a6fd34b 5175
2729af9d 5176 bootargs - Boot arguments when booting an RTOS image
c609719b 5177
2729af9d 5178 bootfile - Name of the image to load with TFTP
c609719b 5179
7d721e34
BS
5180 bootm_low - Memory range available for image processing in the bootm
5181 command can be restricted. This variable is given as
5182 a hexadecimal number and defines lowest address allowed
5183 for use by the bootm command. See also "bootm_size"
5184 environment variable. Address defined by "bootm_low" is
5185 also the base of the initial memory mapping for the Linux
c3624e6e
GL
5186 kernel -- see the description of CONFIG_SYS_BOOTMAPSZ and
5187 bootm_mapsize.
5188
c0f40859 5189 bootm_mapsize - Size of the initial memory mapping for the Linux kernel.
c3624e6e
GL
5190 This variable is given as a hexadecimal number and it
5191 defines the size of the memory region starting at base
5192 address bootm_low that is accessible by the Linux kernel
5193 during early boot. If unset, CONFIG_SYS_BOOTMAPSZ is used
5194 as the default value if it is defined, and bootm_size is
5195 used otherwise.
7d721e34
BS
5196
5197 bootm_size - Memory range available for image processing in the bootm
5198 command can be restricted. This variable is given as
5199 a hexadecimal number and defines the size of the region
5200 allowed for use by the bootm command. See also "bootm_low"
5201 environment variable.
5202
4bae9090
BS
5203 updatefile - Location of the software update file on a TFTP server, used
5204 by the automatic software update feature. Please refer to
5205 documentation in doc/README.update for more details.
5206
2729af9d
WD
5207 autoload - if set to "no" (any string beginning with 'n'),
5208 "bootp" will just load perform a lookup of the
5209 configuration from the BOOTP server, but not try to
5210 load any image using TFTP
c609719b 5211
2729af9d
WD
5212 autostart - if set to "yes", an image loaded using the "bootp",
5213 "rarpboot", "tftpboot" or "diskboot" commands will
5214 be automatically started (by internally calling
5215 "bootm")
38b99261 5216
2729af9d
WD
5217 If set to "no", a standalone image passed to the
5218 "bootm" command will be copied to the load address
5219 (and eventually uncompressed), but NOT be started.
5220 This can be used to load and uncompress arbitrary
5221 data.
c609719b 5222
a28afca5
DL
5223 fdt_high - if set this restricts the maximum address that the
5224 flattened device tree will be copied into upon boot.
fa34f6b2
SG
5225 For example, if you have a system with 1 GB memory
5226 at physical address 0x10000000, while Linux kernel
5227 only recognizes the first 704 MB as low memory, you
5228 may need to set fdt_high as 0x3C000000 to have the
5229 device tree blob be copied to the maximum address
5230 of the 704 MB low memory, so that Linux kernel can
5231 access it during the boot procedure.
5232
a28afca5
DL
5233 If this is set to the special value 0xFFFFFFFF then
5234 the fdt will not be copied at all on boot. For this
5235 to work it must reside in writable memory, have
5236 sufficient padding on the end of it for u-boot to
5237 add the information it needs into it, and the memory
5238 must be accessible by the kernel.
5239
eea63e05
SG
5240 fdtcontroladdr- if set this is the address of the control flattened
5241 device tree used by U-Boot when CONFIG_OF_CONTROL is
5242 defined.
5243
17ea1177
WD
5244 i2cfast - (PPC405GP|PPC405EP only)
5245 if set to 'y' configures Linux I2C driver for fast
5246 mode (400kHZ). This environment variable is used in
5247 initialization code. So, for changes to be effective
5248 it must be saved and board must be reset.
5249
2729af9d
WD
5250 initrd_high - restrict positioning of initrd images:
5251 If this variable is not set, initrd images will be
5252 copied to the highest possible address in RAM; this
5253 is usually what you want since it allows for
5254 maximum initrd size. If for some reason you want to
5255 make sure that the initrd image is loaded below the
6d0f6bcf 5256 CONFIG_SYS_BOOTMAPSZ limit, you can set this environment
2729af9d
WD
5257 variable to a value of "no" or "off" or "0".
5258 Alternatively, you can set it to a maximum upper
5259 address to use (U-Boot will still check that it
5260 does not overwrite the U-Boot stack and data).
c609719b 5261
2729af9d
WD
5262 For instance, when you have a system with 16 MB
5263 RAM, and want to reserve 4 MB from use by Linux,
5264 you can do this by adding "mem=12M" to the value of
5265 the "bootargs" variable. However, now you must make
5266 sure that the initrd image is placed in the first
5267 12 MB as well - this can be done with
c609719b 5268
2729af9d 5269 setenv initrd_high 00c00000
c609719b 5270
2729af9d
WD
5271 If you set initrd_high to 0xFFFFFFFF, this is an
5272 indication to U-Boot that all addresses are legal
5273 for the Linux kernel, including addresses in flash
5274 memory. In this case U-Boot will NOT COPY the
5275 ramdisk at all. This may be useful to reduce the
5276 boot time on your system, but requires that this
5277 feature is supported by your Linux kernel.
c609719b 5278
2729af9d 5279 ipaddr - IP address; needed for tftpboot command
c609719b 5280
2729af9d
WD
5281 loadaddr - Default load address for commands like "bootp",
5282 "rarpboot", "tftpboot", "loadb" or "diskboot"
c609719b 5283
2729af9d 5284 loads_echo - see CONFIG_LOADS_ECHO
a3d991bd 5285
2729af9d 5286 serverip - TFTP server IP address; needed for tftpboot command
a3d991bd 5287
2729af9d 5288 bootretry - see CONFIG_BOOT_RETRY_TIME
a3d991bd 5289
2729af9d 5290 bootdelaykey - see CONFIG_AUTOBOOT_DELAY_STR
a3d991bd 5291
2729af9d 5292 bootstopkey - see CONFIG_AUTOBOOT_STOP_STR
c609719b 5293
e2a53458 5294 ethprime - controls which interface is used first.
c609719b 5295
e2a53458
MF
5296 ethact - controls which interface is currently active.
5297 For example you can do the following
c609719b 5298
48690d80
HS
5299 => setenv ethact FEC
5300 => ping 192.168.0.1 # traffic sent on FEC
5301 => setenv ethact SCC
5302 => ping 10.0.0.1 # traffic sent on SCC
c609719b 5303
e1692577
MF
5304 ethrotate - When set to "no" U-Boot does not go through all
5305 available network interfaces.
5306 It just stays at the currently selected interface.
5307
c96f86ee 5308 netretry - When set to "no" each network operation will
2729af9d
WD
5309 either succeed or fail without retrying.
5310 When set to "once" the network operation will
5311 fail when all the available network interfaces
5312 are tried once without success.
5313 Useful on scripts which control the retry operation
5314 themselves.
c609719b 5315
b4e2f89d 5316 npe_ucode - set load address for the NPE microcode
a1cf027a 5317
8d51aacd
SG
5318 silent_linux - If set then linux will be told to boot silently, by
5319 changing the console to be empty. If "yes" it will be
5320 made silent. If "no" it will not be made silent. If
5321 unset, then it will be made silent if the U-Boot console
5322 is silent.
5323
28cb9375 5324 tftpsrcport - If this is set, the value is used for TFTP's
ecb0ccd9
WD
5325 UDP source port.
5326
28cb9375
WD
5327 tftpdstport - If this is set, the value is used for TFTP's UDP
5328 destination port instead of the Well Know Port 69.
5329
c96f86ee
WD
5330 tftpblocksize - Block size to use for TFTP transfers; if not set,
5331 we use the TFTP server's default block size
5332
5333 tftptimeout - Retransmission timeout for TFTP packets (in milli-
5334 seconds, minimum value is 1000 = 1 second). Defines
5335 when a packet is considered to be lost so it has to
5336 be retransmitted. The default is 5000 = 5 seconds.
5337 Lowering this value may make downloads succeed
5338 faster in networks with high packet loss rates or
5339 with unreliable TFTP servers.
5340
5341 vlan - When set to a value < 4095 the traffic over
11ccc33f 5342 Ethernet is encapsulated/received over 802.1q
2729af9d 5343 VLAN tagged frames.
c609719b 5344
dc0b7b0e
JH
5345The following image location variables contain the location of images
5346used in booting. The "Image" column gives the role of the image and is
5347not an environment variable name. The other columns are environment
5348variable names. "File Name" gives the name of the file on a TFTP
5349server, "RAM Address" gives the location in RAM the image will be
5350loaded to, and "Flash Location" gives the image's address in NOR
5351flash or offset in NAND flash.
5352
5353*Note* - these variables don't have to be defined for all boards, some
5354boards currenlty use other variables for these purposes, and some
5355boards use these variables for other purposes.
5356
c0f40859
WD
5357Image File Name RAM Address Flash Location
5358----- --------- ----------- --------------
5359u-boot u-boot u-boot_addr_r u-boot_addr
5360Linux kernel bootfile kernel_addr_r kernel_addr
5361device tree blob fdtfile fdt_addr_r fdt_addr
5362ramdisk ramdiskfile ramdisk_addr_r ramdisk_addr
dc0b7b0e 5363
2729af9d
WD
5364The following environment variables may be used and automatically
5365updated by the network boot commands ("bootp" and "rarpboot"),
5366depending the information provided by your boot server:
c609719b 5367
2729af9d
WD
5368 bootfile - see above
5369 dnsip - IP address of your Domain Name Server
5370 dnsip2 - IP address of your secondary Domain Name Server
5371 gatewayip - IP address of the Gateway (Router) to use
5372 hostname - Target hostname
5373 ipaddr - see above
5374 netmask - Subnet Mask
5375 rootpath - Pathname of the root filesystem on the NFS server
5376 serverip - see above
c1551ea8 5377
c1551ea8 5378
2729af9d 5379There are two special Environment Variables:
c1551ea8 5380
2729af9d
WD
5381 serial# - contains hardware identification information such
5382 as type string and/or serial number
5383 ethaddr - Ethernet address
c609719b 5384
2729af9d
WD
5385These variables can be set only once (usually during manufacturing of
5386the board). U-Boot refuses to delete or overwrite these variables
5387once they have been set once.
c609719b 5388
f07771cc 5389
2729af9d 5390Further special Environment Variables:
f07771cc 5391
2729af9d
WD
5392 ver - Contains the U-Boot version string as printed
5393 with the "version" command. This variable is
5394 readonly (see CONFIG_VERSION_VARIABLE).
f07771cc 5395
f07771cc 5396
2729af9d
WD
5397Please note that changes to some configuration parameters may take
5398only effect after the next boot (yes, that's just like Windoze :-).
f07771cc 5399
f07771cc 5400
170ab110
JH
5401Callback functions for environment variables:
5402---------------------------------------------
5403
5404For some environment variables, the behavior of u-boot needs to change
5405when their values are changed. This functionailty allows functions to
5406be associated with arbitrary variables. On creation, overwrite, or
5407deletion, the callback will provide the opportunity for some side
5408effect to happen or for the change to be rejected.
5409
5410The callbacks are named and associated with a function using the
5411U_BOOT_ENV_CALLBACK macro in your board or driver code.
5412
5413These callbacks are associated with variables in one of two ways. The
5414static list can be added to by defining CONFIG_ENV_CALLBACK_LIST_STATIC
5415in the board configuration to a string that defines a list of
5416associations. The list must be in the following format:
5417
5418 entry = variable_name[:callback_name]
5419 list = entry[,list]
5420
5421If the callback name is not specified, then the callback is deleted.
5422Spaces are also allowed anywhere in the list.
5423
5424Callbacks can also be associated by defining the ".callbacks" variable
5425with the same list format above. Any association in ".callbacks" will
5426override any association in the static list. You can define
5427CONFIG_ENV_CALLBACK_LIST_DEFAULT to a list (string) to define the
5428".callbacks" envirnoment variable in the default or embedded environment.
5429
5430
2729af9d
WD
5431Command Line Parsing:
5432=====================
f07771cc 5433
2729af9d
WD
5434There are two different command line parsers available with U-Boot:
5435the old "simple" one, and the much more powerful "hush" shell:
c609719b 5436
2729af9d
WD
5437Old, simple command line parser:
5438--------------------------------
c609719b 5439
2729af9d
WD
5440- supports environment variables (through setenv / saveenv commands)
5441- several commands on one line, separated by ';'
fe126d8b 5442- variable substitution using "... ${name} ..." syntax
2729af9d
WD
5443- special characters ('$', ';') can be escaped by prefixing with '\',
5444 for example:
fe126d8b 5445 setenv bootcmd bootm \${address}
2729af9d
WD
5446- You can also escape text by enclosing in single apostrophes, for example:
5447 setenv addip 'setenv bootargs $bootargs ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off'
c609719b 5448
2729af9d
WD
5449Hush shell:
5450-----------
c609719b 5451
2729af9d
WD
5452- similar to Bourne shell, with control structures like
5453 if...then...else...fi, for...do...done; while...do...done,
5454 until...do...done, ...
5455- supports environment ("global") variables (through setenv / saveenv
5456 commands) and local shell variables (through standard shell syntax
5457 "name=value"); only environment variables can be used with "run"
5458 command
5459
5460General rules:
5461--------------
c609719b 5462
2729af9d
WD
5463(1) If a command line (or an environment variable executed by a "run"
5464 command) contains several commands separated by semicolon, and
5465 one of these commands fails, then the remaining commands will be
5466 executed anyway.
c609719b 5467
2729af9d 5468(2) If you execute several variables with one call to run (i. e.
11ccc33f 5469 calling run with a list of variables as arguments), any failing
2729af9d
WD
5470 command will cause "run" to terminate, i. e. the remaining
5471 variables are not executed.
c609719b 5472
2729af9d
WD
5473Note for Redundant Ethernet Interfaces:
5474=======================================
c609719b 5475
11ccc33f 5476Some boards come with redundant Ethernet interfaces; U-Boot supports
2729af9d
WD
5477such configurations and is capable of automatic selection of a
5478"working" interface when needed. MAC assignment works as follows:
c609719b 5479
2729af9d
WD
5480Network interfaces are numbered eth0, eth1, eth2, ... Corresponding
5481MAC addresses can be stored in the environment as "ethaddr" (=>eth0),
5482"eth1addr" (=>eth1), "eth2addr", ...
c609719b 5483
2729af9d
WD
5484If the network interface stores some valid MAC address (for instance
5485in SROM), this is used as default address if there is NO correspon-
5486ding setting in the environment; if the corresponding environment
5487variable is set, this overrides the settings in the card; that means:
c609719b 5488
2729af9d
WD
5489o If the SROM has a valid MAC address, and there is no address in the
5490 environment, the SROM's address is used.
c609719b 5491
2729af9d
WD
5492o If there is no valid address in the SROM, and a definition in the
5493 environment exists, then the value from the environment variable is
5494 used.
c609719b 5495
2729af9d
WD
5496o If both the SROM and the environment contain a MAC address, and
5497 both addresses are the same, this MAC address is used.
c609719b 5498
2729af9d
WD
5499o If both the SROM and the environment contain a MAC address, and the
5500 addresses differ, the value from the environment is used and a
5501 warning is printed.
c609719b 5502
2729af9d
WD
5503o If neither SROM nor the environment contain a MAC address, an error
5504 is raised.
c609719b 5505
ecee9324 5506If Ethernet drivers implement the 'write_hwaddr' function, valid MAC addresses
c0f40859 5507will be programmed into hardware as part of the initialization process. This
ecee9324
BW
5508may be skipped by setting the appropriate 'ethmacskip' environment variable.
5509The naming convention is as follows:
5510"ethmacskip" (=>eth0), "eth1macskip" (=>eth1) etc.
c609719b 5511
2729af9d
WD
5512Image Formats:
5513==============
c609719b 5514
3310c549
MB
5515U-Boot is capable of booting (and performing other auxiliary operations on)
5516images in two formats:
5517
5518New uImage format (FIT)
5519-----------------------
5520
5521Flexible and powerful format based on Flattened Image Tree -- FIT (similar
5522to Flattened Device Tree). It allows the use of images with multiple
5523components (several kernels, ramdisks, etc.), with contents protected by
5524SHA1, MD5 or CRC32. More details are found in the doc/uImage.FIT directory.
5525
5526
5527Old uImage format
5528-----------------
5529
5530Old image format is based on binary files which can be basically anything,
5531preceded by a special header; see the definitions in include/image.h for
5532details; basically, the header defines the following image properties:
c609719b 5533
2729af9d
WD
5534* Target Operating System (Provisions for OpenBSD, NetBSD, FreeBSD,
5535 4.4BSD, Linux, SVR4, Esix, Solaris, Irix, SCO, Dell, NCR, VxWorks,
f5ed9e39
PT
5536 LynxOS, pSOS, QNX, RTEMS, INTEGRITY;
5537 Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, LynxOS,
5538 INTEGRITY).
7b64fef3 5539* Target CPU Architecture (Provisions for Alpha, ARM, AVR32, Intel x86,
afc1ce82
ML
5540 IA64, MIPS, NDS32, Nios II, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;
5541 Currently supported: ARM, AVR32, Intel x86, MIPS, NDS32, Nios II, PowerPC).
2729af9d
WD
5542* Compression Type (uncompressed, gzip, bzip2)
5543* Load Address
5544* Entry Point
5545* Image Name
5546* Image Timestamp
c609719b 5547
2729af9d
WD
5548The header is marked by a special Magic Number, and both the header
5549and the data portions of the image are secured against corruption by
5550CRC32 checksums.
c609719b
WD
5551
5552
2729af9d
WD
5553Linux Support:
5554==============
c609719b 5555
2729af9d
WD
5556Although U-Boot should support any OS or standalone application
5557easily, the main focus has always been on Linux during the design of
5558U-Boot.
c609719b 5559
2729af9d
WD
5560U-Boot includes many features that so far have been part of some
5561special "boot loader" code within the Linux kernel. Also, any
5562"initrd" images to be used are no longer part of one big Linux image;
5563instead, kernel and "initrd" are separate images. This implementation
5564serves several purposes:
c609719b 5565
2729af9d
WD
5566- the same features can be used for other OS or standalone
5567 applications (for instance: using compressed images to reduce the
5568 Flash memory footprint)
c609719b 5569
2729af9d
WD
5570- it becomes much easier to port new Linux kernel versions because
5571 lots of low-level, hardware dependent stuff are done by U-Boot
c609719b 5572
2729af9d
WD
5573- the same Linux kernel image can now be used with different "initrd"
5574 images; of course this also means that different kernel images can
5575 be run with the same "initrd". This makes testing easier (you don't
5576 have to build a new "zImage.initrd" Linux image when you just
5577 change a file in your "initrd"). Also, a field-upgrade of the
5578 software is easier now.
c609719b 5579
c609719b 5580
2729af9d
WD
5581Linux HOWTO:
5582============
c609719b 5583
2729af9d
WD
5584Porting Linux to U-Boot based systems:
5585---------------------------------------
c609719b 5586
2729af9d
WD
5587U-Boot cannot save you from doing all the necessary modifications to
5588configure the Linux device drivers for use with your target hardware
5589(no, we don't intend to provide a full virtual machine interface to
5590Linux :-).
c609719b 5591
a47a12be 5592But now you can ignore ALL boot loader code (in arch/powerpc/mbxboot).
24ee89b9 5593
2729af9d
WD
5594Just make sure your machine specific header file (for instance
5595include/asm-ppc/tqm8xx.h) includes the same definition of the Board
1dc30693
MH
5596Information structure as we define in include/asm-<arch>/u-boot.h,
5597and make sure that your definition of IMAP_ADDR uses the same value
6d0f6bcf 5598as your U-Boot configuration in CONFIG_SYS_IMMR.
24ee89b9 5599
2eb31b13
SG
5600Note that U-Boot now has a driver model, a unified model for drivers.
5601If you are adding a new driver, plumb it into driver model. If there
5602is no uclass available, you are encouraged to create one. See
5603doc/driver-model.
5604
c609719b 5605
2729af9d
WD
5606Configuring the Linux kernel:
5607-----------------------------
c609719b 5608
2729af9d
WD
5609No specific requirements for U-Boot. Make sure you have some root
5610device (initial ramdisk, NFS) for your target system.
5611
5612
5613Building a Linux Image:
5614-----------------------
c609719b 5615
2729af9d
WD
5616With U-Boot, "normal" build targets like "zImage" or "bzImage" are
5617not used. If you use recent kernel source, a new build target
5618"uImage" will exist which automatically builds an image usable by
5619U-Boot. Most older kernels also have support for a "pImage" target,
5620which was introduced for our predecessor project PPCBoot and uses a
5621100% compatible format.
5622
5623Example:
5624
ab584d67 5625 make TQM850L_defconfig
2729af9d
WD
5626 make oldconfig
5627 make dep
5628 make uImage
5629
5630The "uImage" build target uses a special tool (in 'tools/mkimage') to
5631encapsulate a compressed Linux kernel image with header information,
5632CRC32 checksum etc. for use with U-Boot. This is what we are doing:
5633
5634* build a standard "vmlinux" kernel image (in ELF binary format):
5635
5636* convert the kernel into a raw binary image:
5637
5638 ${CROSS_COMPILE}-objcopy -O binary \
5639 -R .note -R .comment \
5640 -S vmlinux linux.bin
5641
5642* compress the binary image:
5643
5644 gzip -9 linux.bin
5645
5646* package compressed binary image for U-Boot:
5647
5648 mkimage -A ppc -O linux -T kernel -C gzip \
5649 -a 0 -e 0 -n "Linux Kernel Image" \
5650 -d linux.bin.gz uImage
c609719b 5651
c609719b 5652
2729af9d
WD
5653The "mkimage" tool can also be used to create ramdisk images for use
5654with U-Boot, either separated from the Linux kernel image, or
5655combined into one file. "mkimage" encapsulates the images with a 64
5656byte header containing information about target architecture,
5657operating system, image type, compression method, entry points, time
5658stamp, CRC32 checksums, etc.
5659
5660"mkimage" can be called in two ways: to verify existing images and
5661print the header information, or to build new images.
5662
5663In the first form (with "-l" option) mkimage lists the information
5664contained in the header of an existing U-Boot image; this includes
5665checksum verification:
c609719b 5666
2729af9d
WD
5667 tools/mkimage -l image
5668 -l ==> list image header information
5669
5670The second form (with "-d" option) is used to build a U-Boot image
5671from a "data file" which is used as image payload:
5672
5673 tools/mkimage -A arch -O os -T type -C comp -a addr -e ep \
5674 -n name -d data_file image
5675 -A ==> set architecture to 'arch'
5676 -O ==> set operating system to 'os'
5677 -T ==> set image type to 'type'
5678 -C ==> set compression type 'comp'
5679 -a ==> set load address to 'addr' (hex)
5680 -e ==> set entry point to 'ep' (hex)
5681 -n ==> set image name to 'name'
5682 -d ==> use image data from 'datafile'
5683
69459791
WD
5684Right now, all Linux kernels for PowerPC systems use the same load
5685address (0x00000000), but the entry point address depends on the
5686kernel version:
2729af9d
WD
5687
5688- 2.2.x kernels have the entry point at 0x0000000C,
5689- 2.3.x and later kernels have the entry point at 0x00000000.
5690
5691So a typical call to build a U-Boot image would read:
5692
5693 -> tools/mkimage -n '2.4.4 kernel for TQM850L' \
5694 > -A ppc -O linux -T kernel -C gzip -a 0 -e 0 \
a47a12be 5695 > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz \
2729af9d
WD
5696 > examples/uImage.TQM850L
5697 Image Name: 2.4.4 kernel for TQM850L
5698 Created: Wed Jul 19 02:34:59 2000
5699 Image Type: PowerPC Linux Kernel Image (gzip compressed)
5700 Data Size: 335725 Bytes = 327.86 kB = 0.32 MB
5701 Load Address: 0x00000000
5702 Entry Point: 0x00000000
5703
5704To verify the contents of the image (or check for corruption):
5705
5706 -> tools/mkimage -l examples/uImage.TQM850L
5707 Image Name: 2.4.4 kernel for TQM850L
5708 Created: Wed Jul 19 02:34:59 2000
5709 Image Type: PowerPC Linux Kernel Image (gzip compressed)
5710 Data Size: 335725 Bytes = 327.86 kB = 0.32 MB
5711 Load Address: 0x00000000
5712 Entry Point: 0x00000000
5713
5714NOTE: for embedded systems where boot time is critical you can trade
5715speed for memory and install an UNCOMPRESSED image instead: this
5716needs more space in Flash, but boots much faster since it does not
5717need to be uncompressed:
5718
a47a12be 5719 -> gunzip /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz
2729af9d
WD
5720 -> tools/mkimage -n '2.4.4 kernel for TQM850L' \
5721 > -A ppc -O linux -T kernel -C none -a 0 -e 0 \
a47a12be 5722 > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux \
2729af9d
WD
5723 > examples/uImage.TQM850L-uncompressed
5724 Image Name: 2.4.4 kernel for TQM850L
5725 Created: Wed Jul 19 02:34:59 2000
5726 Image Type: PowerPC Linux Kernel Image (uncompressed)
5727 Data Size: 792160 Bytes = 773.59 kB = 0.76 MB
5728 Load Address: 0x00000000
5729 Entry Point: 0x00000000
5730
5731
5732Similar you can build U-Boot images from a 'ramdisk.image.gz' file
5733when your kernel is intended to use an initial ramdisk:
5734
5735 -> tools/mkimage -n 'Simple Ramdisk Image' \
5736 > -A ppc -O linux -T ramdisk -C gzip \
5737 > -d /LinuxPPC/images/SIMPLE-ramdisk.image.gz examples/simple-initrd
5738 Image Name: Simple Ramdisk Image
5739 Created: Wed Jan 12 14:01:50 2000
5740 Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
5741 Data Size: 566530 Bytes = 553.25 kB = 0.54 MB
5742 Load Address: 0x00000000
5743 Entry Point: 0x00000000
5744
a804b5ce
GMF
5745The "dumpimage" is a tool to disassemble images built by mkimage. Its "-i"
5746option performs the converse operation of the mkimage's second form (the "-d"
5747option). Given an image built by mkimage, the dumpimage extracts a "data file"
5748from the image:
5749
5750 tools/dumpimage -i image -p position data_file
5751 -i ==> extract from the 'image' a specific 'data_file', \
5752 indexed by 'position'
5753
2729af9d
WD
5754
5755Installing a Linux Image:
5756-------------------------
5757
5758To downloading a U-Boot image over the serial (console) interface,
5759you must convert the image to S-Record format:
5760
5761 objcopy -I binary -O srec examples/image examples/image.srec
5762
5763The 'objcopy' does not understand the information in the U-Boot
5764image header, so the resulting S-Record file will be relative to
5765address 0x00000000. To load it to a given address, you need to
5766specify the target address as 'offset' parameter with the 'loads'
5767command.
5768
5769Example: install the image to address 0x40100000 (which on the
5770TQM8xxL is in the first Flash bank):
5771
5772 => erase 40100000 401FFFFF
5773
5774 .......... done
5775 Erased 8 sectors
5776
5777 => loads 40100000
5778 ## Ready for S-Record download ...
5779 ~>examples/image.srec
5780 1 2 3 4 5 6 7 8 9 10 11 12 13 ...
5781 ...
5782 15989 15990 15991 15992
5783 [file transfer complete]
5784 [connected]
5785 ## Start Addr = 0x00000000
5786
5787
5788You can check the success of the download using the 'iminfo' command;
218ca724 5789this includes a checksum verification so you can be sure no data
2729af9d
WD
5790corruption happened:
5791
5792 => imi 40100000
5793
5794 ## Checking Image at 40100000 ...
5795 Image Name: 2.2.13 for initrd on TQM850L
5796 Image Type: PowerPC Linux Kernel Image (gzip compressed)
5797 Data Size: 335725 Bytes = 327 kB = 0 MB
5798 Load Address: 00000000
5799 Entry Point: 0000000c
5800 Verifying Checksum ... OK
5801
5802
5803Boot Linux:
5804-----------
5805
5806The "bootm" command is used to boot an application that is stored in
5807memory (RAM or Flash). In case of a Linux kernel image, the contents
5808of the "bootargs" environment variable is passed to the kernel as
5809parameters. You can check and modify this variable using the
5810"printenv" and "setenv" commands:
5811
5812
5813 => printenv bootargs
5814 bootargs=root=/dev/ram
5815
5816 => setenv bootargs root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
5817
5818 => printenv bootargs
5819 bootargs=root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
5820
5821 => bootm 40020000
5822 ## Booting Linux kernel at 40020000 ...
5823 Image Name: 2.2.13 for NFS on TQM850L
5824 Image Type: PowerPC Linux Kernel Image (gzip compressed)
5825 Data Size: 381681 Bytes = 372 kB = 0 MB
5826 Load Address: 00000000
5827 Entry Point: 0000000c
5828 Verifying Checksum ... OK
5829 Uncompressing Kernel Image ... OK
5830 Linux version 2.2.13 (wd@denx.local.net) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:35:17 MEST 2000
5831 Boot arguments: root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
5832 time_init: decrementer frequency = 187500000/60
5833 Calibrating delay loop... 49.77 BogoMIPS
5834 Memory: 15208k available (700k kernel code, 444k data, 32k init) [c0000000,c1000000]
5835 ...
5836
11ccc33f 5837If you want to boot a Linux kernel with initial RAM disk, you pass
2729af9d
WD
5838the memory addresses of both the kernel and the initrd image (PPBCOOT
5839format!) to the "bootm" command:
5840
5841 => imi 40100000 40200000
5842
5843 ## Checking Image at 40100000 ...
5844 Image Name: 2.2.13 for initrd on TQM850L
5845 Image Type: PowerPC Linux Kernel Image (gzip compressed)
5846 Data Size: 335725 Bytes = 327 kB = 0 MB
5847 Load Address: 00000000
5848 Entry Point: 0000000c
5849 Verifying Checksum ... OK
5850
5851 ## Checking Image at 40200000 ...
5852 Image Name: Simple Ramdisk Image
5853 Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
5854 Data Size: 566530 Bytes = 553 kB = 0 MB
5855 Load Address: 00000000
5856 Entry Point: 00000000
5857 Verifying Checksum ... OK
5858
5859 => bootm 40100000 40200000
5860 ## Booting Linux kernel at 40100000 ...
5861 Image Name: 2.2.13 for initrd on TQM850L
5862 Image Type: PowerPC Linux Kernel Image (gzip compressed)
5863 Data Size: 335725 Bytes = 327 kB = 0 MB
5864 Load Address: 00000000
5865 Entry Point: 0000000c
5866 Verifying Checksum ... OK
5867 Uncompressing Kernel Image ... OK
5868 ## Loading RAMDisk Image at 40200000 ...
5869 Image Name: Simple Ramdisk Image
5870 Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
5871 Data Size: 566530 Bytes = 553 kB = 0 MB
5872 Load Address: 00000000
5873 Entry Point: 00000000
5874 Verifying Checksum ... OK
5875 Loading Ramdisk ... OK
5876 Linux version 2.2.13 (wd@denx.local.net) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:32:08 MEST 2000
5877 Boot arguments: root=/dev/ram
5878 time_init: decrementer frequency = 187500000/60
5879 Calibrating delay loop... 49.77 BogoMIPS
5880 ...
5881 RAMDISK: Compressed image found at block 0
5882 VFS: Mounted root (ext2 filesystem).
5883
5884 bash#
5885
0267768e
MM
5886Boot Linux and pass a flat device tree:
5887-----------
5888
5889First, U-Boot must be compiled with the appropriate defines. See the section
5890titled "Linux Kernel Interface" above for a more in depth explanation. The
5891following is an example of how to start a kernel and pass an updated
5892flat device tree:
5893
5894=> print oftaddr
5895oftaddr=0x300000
5896=> print oft
5897oft=oftrees/mpc8540ads.dtb
5898=> tftp $oftaddr $oft
5899Speed: 1000, full duplex
5900Using TSEC0 device
5901TFTP from server 192.168.1.1; our IP address is 192.168.1.101
5902Filename 'oftrees/mpc8540ads.dtb'.
5903Load address: 0x300000
5904Loading: #
5905done
5906Bytes transferred = 4106 (100a hex)
5907=> tftp $loadaddr $bootfile
5908Speed: 1000, full duplex
5909Using TSEC0 device
5910TFTP from server 192.168.1.1; our IP address is 192.168.1.2
5911Filename 'uImage'.
5912Load address: 0x200000
5913Loading:############
5914done
5915Bytes transferred = 1029407 (fb51f hex)
5916=> print loadaddr
5917loadaddr=200000
5918=> print oftaddr
5919oftaddr=0x300000
5920=> bootm $loadaddr - $oftaddr
5921## Booting image at 00200000 ...
a9398e01
WD
5922 Image Name: Linux-2.6.17-dirty
5923 Image Type: PowerPC Linux Kernel Image (gzip compressed)
5924 Data Size: 1029343 Bytes = 1005.2 kB
0267768e 5925 Load Address: 00000000
a9398e01 5926 Entry Point: 00000000
0267768e
MM
5927 Verifying Checksum ... OK
5928 Uncompressing Kernel Image ... OK
5929Booting using flat device tree at 0x300000
5930Using MPC85xx ADS machine description
5931Memory CAM mapping: CAM0=256Mb, CAM1=256Mb, CAM2=0Mb residual: 0Mb
5932[snip]
5933
5934
2729af9d
WD
5935More About U-Boot Image Types:
5936------------------------------
5937
5938U-Boot supports the following image types:
5939
5940 "Standalone Programs" are directly runnable in the environment
5941 provided by U-Boot; it is expected that (if they behave
5942 well) you can continue to work in U-Boot after return from
5943 the Standalone Program.
5944 "OS Kernel Images" are usually images of some Embedded OS which
5945 will take over control completely. Usually these programs
5946 will install their own set of exception handlers, device
5947 drivers, set up the MMU, etc. - this means, that you cannot
5948 expect to re-enter U-Boot except by resetting the CPU.
5949 "RAMDisk Images" are more or less just data blocks, and their
5950 parameters (address, size) are passed to an OS kernel that is
5951 being started.
5952 "Multi-File Images" contain several images, typically an OS
5953 (Linux) kernel image and one or more data images like
5954 RAMDisks. This construct is useful for instance when you want
5955 to boot over the network using BOOTP etc., where the boot
5956 server provides just a single image file, but you want to get
5957 for instance an OS kernel and a RAMDisk image.
5958
5959 "Multi-File Images" start with a list of image sizes, each
5960 image size (in bytes) specified by an "uint32_t" in network
5961 byte order. This list is terminated by an "(uint32_t)0".
5962 Immediately after the terminating 0 follow the images, one by
5963 one, all aligned on "uint32_t" boundaries (size rounded up to
5964 a multiple of 4 bytes).
5965
5966 "Firmware Images" are binary images containing firmware (like
5967 U-Boot or FPGA images) which usually will be programmed to
5968 flash memory.
5969
5970 "Script files" are command sequences that will be executed by
5971 U-Boot's command interpreter; this feature is especially
5972 useful when you configure U-Boot to use a real shell (hush)
5973 as command interpreter.
5974
44f074c7
MV
5975Booting the Linux zImage:
5976-------------------------
5977
5978On some platforms, it's possible to boot Linux zImage. This is done
5979using the "bootz" command. The syntax of "bootz" command is the same
5980as the syntax of "bootm" command.
5981
8ac28563 5982Note, defining the CONFIG_SUPPORT_RAW_INITRD allows user to supply
017e1f3f
MV
5983kernel with raw initrd images. The syntax is slightly different, the
5984address of the initrd must be augmented by it's size, in the following
5985format: "<initrd addres>:<initrd size>".
5986
2729af9d
WD
5987
5988Standalone HOWTO:
5989=================
5990
5991One of the features of U-Boot is that you can dynamically load and
5992run "standalone" applications, which can use some resources of
5993U-Boot like console I/O functions or interrupt services.
5994
5995Two simple examples are included with the sources:
5996
5997"Hello World" Demo:
5998-------------------
5999
6000'examples/hello_world.c' contains a small "Hello World" Demo
6001application; it is automatically compiled when you build U-Boot.
6002It's configured to run at address 0x00040004, so you can play with it
6003like that:
6004
6005 => loads
6006 ## Ready for S-Record download ...
6007 ~>examples/hello_world.srec
6008 1 2 3 4 5 6 7 8 9 10 11 ...
6009 [file transfer complete]
6010 [connected]
6011 ## Start Addr = 0x00040004
6012
6013 => go 40004 Hello World! This is a test.
6014 ## Starting application at 0x00040004 ...
6015 Hello World
6016 argc = 7
6017 argv[0] = "40004"
6018 argv[1] = "Hello"
6019 argv[2] = "World!"
6020 argv[3] = "This"
6021 argv[4] = "is"
6022 argv[5] = "a"
6023 argv[6] = "test."
6024 argv[7] = "<NULL>"
6025 Hit any key to exit ...
6026
6027 ## Application terminated, rc = 0x0
6028
6029Another example, which demonstrates how to register a CPM interrupt
6030handler with the U-Boot code, can be found in 'examples/timer.c'.
6031Here, a CPM timer is set up to generate an interrupt every second.
6032The interrupt service routine is trivial, just printing a '.'
6033character, but this is just a demo program. The application can be
6034controlled by the following keys:
6035
6036 ? - print current values og the CPM Timer registers
6037 b - enable interrupts and start timer
6038 e - stop timer and disable interrupts
6039 q - quit application
6040
6041 => loads
6042 ## Ready for S-Record download ...
6043 ~>examples/timer.srec
6044 1 2 3 4 5 6 7 8 9 10 11 ...
6045 [file transfer complete]
6046 [connected]
6047 ## Start Addr = 0x00040004
6048
6049 => go 40004
6050 ## Starting application at 0x00040004 ...
6051 TIMERS=0xfff00980
6052 Using timer 1
6053 tgcr @ 0xfff00980, tmr @ 0xfff00990, trr @ 0xfff00994, tcr @ 0xfff00998, tcn @ 0xfff0099c, ter @ 0xfff009b0
6054
6055Hit 'b':
6056 [q, b, e, ?] Set interval 1000000 us
6057 Enabling timer
6058Hit '?':
6059 [q, b, e, ?] ........
6060 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0xef6, ter=0x0
6061Hit '?':
6062 [q, b, e, ?] .
6063 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x2ad4, ter=0x0
6064Hit '?':
6065 [q, b, e, ?] .
6066 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x1efc, ter=0x0
6067Hit '?':
6068 [q, b, e, ?] .
6069 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x169d, ter=0x0
6070Hit 'e':
6071 [q, b, e, ?] ...Stopping timer
6072Hit 'q':
6073 [q, b, e, ?] ## Application terminated, rc = 0x0
6074
6075
6076Minicom warning:
6077================
6078
6079Over time, many people have reported problems when trying to use the
6080"minicom" terminal emulation program for serial download. I (wd)
6081consider minicom to be broken, and recommend not to use it. Under
6082Unix, I recommend to use C-Kermit for general purpose use (and
6083especially for kermit binary protocol download ("loadb" command), and
e53515a2
KP
6084use "cu" for S-Record download ("loads" command). See
6085http://www.denx.de/wiki/view/DULG/SystemSetup#Section_4.3.
6086for help with kermit.
6087
2729af9d
WD
6088
6089Nevertheless, if you absolutely want to use it try adding this
6090configuration to your "File transfer protocols" section:
6091
6092 Name Program Name U/D FullScr IO-Red. Multi
6093 X kermit /usr/bin/kermit -i -l %l -s Y U Y N N
6094 Y kermit /usr/bin/kermit -i -l %l -r N D Y N N
6095
6096
6097NetBSD Notes:
6098=============
6099
6100Starting at version 0.9.2, U-Boot supports NetBSD both as host
6101(build U-Boot) and target system (boots NetBSD/mpc8xx).
6102
6103Building requires a cross environment; it is known to work on
6104NetBSD/i386 with the cross-powerpc-netbsd-1.3 package (you will also
6105need gmake since the Makefiles are not compatible with BSD make).
6106Note that the cross-powerpc package does not install include files;
6107attempting to build U-Boot will fail because <machine/ansi.h> is
6108missing. This file has to be installed and patched manually:
6109
6110 # cd /usr/pkg/cross/powerpc-netbsd/include
6111 # mkdir powerpc
6112 # ln -s powerpc machine
6113 # cp /usr/src/sys/arch/powerpc/include/ansi.h powerpc/ansi.h
6114 # ${EDIT} powerpc/ansi.h ## must remove __va_list, _BSD_VA_LIST
6115
6116Native builds *don't* work due to incompatibilities between native
6117and U-Boot include files.
6118
6119Booting assumes that (the first part of) the image booted is a
6120stage-2 loader which in turn loads and then invokes the kernel
6121proper. Loader sources will eventually appear in the NetBSD source
6122tree (probably in sys/arc/mpc8xx/stand/u-boot_stage2/); in the
2a8af187 6123meantime, see ftp://ftp.denx.de/pub/u-boot/ppcboot_stage2.tar.gz
2729af9d
WD
6124
6125
6126Implementation Internals:
6127=========================
6128
6129The following is not intended to be a complete description of every
6130implementation detail. However, it should help to understand the
6131inner workings of U-Boot and make it easier to port it to custom
6132hardware.
6133
6134
6135Initial Stack, Global Data:
6136---------------------------
6137
6138The implementation of U-Boot is complicated by the fact that U-Boot
6139starts running out of ROM (flash memory), usually without access to
6140system RAM (because the memory controller is not initialized yet).
6141This means that we don't have writable Data or BSS segments, and BSS
6142is not initialized as zero. To be able to get a C environment working
6143at all, we have to allocate at least a minimal stack. Implementation
6144options for this are defined and restricted by the CPU used: Some CPU
6145models provide on-chip memory (like the IMMR area on MPC8xx and
6146MPC826x processors), on others (parts of) the data cache can be
6147locked as (mis-) used as memory, etc.
6148
218ca724 6149 Chris Hallinan posted a good summary of these issues to the
0668236b 6150 U-Boot mailing list:
2729af9d
WD
6151
6152 Subject: RE: [U-Boot-Users] RE: More On Memory Bank x (nothingness)?
6153 From: "Chris Hallinan" <clh@net1plus.com>
6154 Date: Mon, 10 Feb 2003 16:43:46 -0500 (22:43 MET)
6155 ...
6156
6157 Correct me if I'm wrong, folks, but the way I understand it
6158 is this: Using DCACHE as initial RAM for Stack, etc, does not
6159 require any physical RAM backing up the cache. The cleverness
6160 is that the cache is being used as a temporary supply of
6161 necessary storage before the SDRAM controller is setup. It's
11ccc33f 6162 beyond the scope of this list to explain the details, but you
2729af9d
WD
6163 can see how this works by studying the cache architecture and
6164 operation in the architecture and processor-specific manuals.
6165
6166 OCM is On Chip Memory, which I believe the 405GP has 4K. It
6167 is another option for the system designer to use as an
11ccc33f 6168 initial stack/RAM area prior to SDRAM being available. Either
2729af9d
WD
6169 option should work for you. Using CS 4 should be fine if your
6170 board designers haven't used it for something that would
6171 cause you grief during the initial boot! It is frequently not
6172 used.
6173
6d0f6bcf 6174 CONFIG_SYS_INIT_RAM_ADDR should be somewhere that won't interfere
2729af9d
WD
6175 with your processor/board/system design. The default value
6176 you will find in any recent u-boot distribution in
8a316c9b 6177 walnut.h should work for you. I'd set it to a value larger
2729af9d
WD
6178 than your SDRAM module. If you have a 64MB SDRAM module, set
6179 it above 400_0000. Just make sure your board has no resources
6180 that are supposed to respond to that address! That code in
6181 start.S has been around a while and should work as is when
6182 you get the config right.
6183
6184 -Chris Hallinan
6185 DS4.COM, Inc.
6186
6187It is essential to remember this, since it has some impact on the C
6188code for the initialization procedures:
6189
6190* Initialized global data (data segment) is read-only. Do not attempt
6191 to write it.
6192
11ccc33f 6193* Do not use any uninitialized global data (or implicitely initialized
2729af9d
WD
6194 as zero data - BSS segment) at all - this is undefined, initiali-
6195 zation is performed later (when relocating to RAM).
6196
6197* Stack space is very limited. Avoid big data buffers or things like
6198 that.
6199
6200Having only the stack as writable memory limits means we cannot use
6201normal global data to share information beween the code. But it
6202turned out that the implementation of U-Boot can be greatly
6203simplified by making a global data structure (gd_t) available to all
6204functions. We could pass a pointer to this data as argument to _all_
6205functions, but this would bloat the code. Instead we use a feature of
6206the GCC compiler (Global Register Variables) to share the data: we
6207place a pointer (gd) to the global data into a register which we
6208reserve for this purpose.
6209
6210When choosing a register for such a purpose we are restricted by the
6211relevant (E)ABI specifications for the current architecture, and by
6212GCC's implementation.
6213
6214For PowerPC, the following registers have specific use:
6215 R1: stack pointer
e7670f6c 6216 R2: reserved for system use
2729af9d
WD
6217 R3-R4: parameter passing and return values
6218 R5-R10: parameter passing
6219 R13: small data area pointer
6220 R30: GOT pointer
6221 R31: frame pointer
6222
e6bee808
JT
6223 (U-Boot also uses R12 as internal GOT pointer. r12
6224 is a volatile register so r12 needs to be reset when
6225 going back and forth between asm and C)
2729af9d 6226
e7670f6c 6227 ==> U-Boot will use R2 to hold a pointer to the global data
2729af9d
WD
6228
6229 Note: on PPC, we could use a static initializer (since the
6230 address of the global data structure is known at compile time),
6231 but it turned out that reserving a register results in somewhat
6232 smaller code - although the code savings are not that big (on
6233 average for all boards 752 bytes for the whole U-Boot image,
6234 624 text + 127 data).
6235
c4db335c 6236On Blackfin, the normal C ABI (except for P3) is followed as documented here:
4c58eb55
MF
6237 http://docs.blackfin.uclinux.org/doku.php?id=application_binary_interface
6238
c4db335c 6239 ==> U-Boot will use P3 to hold a pointer to the global data
4c58eb55 6240
2729af9d
WD
6241On ARM, the following registers are used:
6242
6243 R0: function argument word/integer result
6244 R1-R3: function argument word
12eba1b4
JH
6245 R9: platform specific
6246 R10: stack limit (used only if stack checking is enabled)
2729af9d
WD
6247 R11: argument (frame) pointer
6248 R12: temporary workspace
6249 R13: stack pointer
6250 R14: link register
6251 R15: program counter
6252
12eba1b4
JH
6253 ==> U-Boot will use R9 to hold a pointer to the global data
6254
6255 Note: on ARM, only R_ARM_RELATIVE relocations are supported.
2729af9d 6256
0df01fd3
TC
6257On Nios II, the ABI is documented here:
6258 http://www.altera.com/literature/hb/nios2/n2cpu_nii51016.pdf
6259
6260 ==> U-Boot will use gp to hold a pointer to the global data
6261
6262 Note: on Nios II, we give "-G0" option to gcc and don't use gp
6263 to access small data sections, so gp is free.
6264
afc1ce82
ML
6265On NDS32, the following registers are used:
6266
6267 R0-R1: argument/return
6268 R2-R5: argument
6269 R15: temporary register for assembler
6270 R16: trampoline register
6271 R28: frame pointer (FP)
6272 R29: global pointer (GP)
6273 R30: link register (LP)
6274 R31: stack pointer (SP)
6275 PC: program counter (PC)
6276
6277 ==> U-Boot will use R10 to hold a pointer to the global data
6278
d87080b7
WD
6279NOTE: DECLARE_GLOBAL_DATA_PTR must be used with file-global scope,
6280or current versions of GCC may "optimize" the code too much.
2729af9d
WD
6281
6282Memory Management:
6283------------------
6284
6285U-Boot runs in system state and uses physical addresses, i.e. the
6286MMU is not used either for address mapping nor for memory protection.
6287
6288The available memory is mapped to fixed addresses using the memory
6289controller. In this process, a contiguous block is formed for each
6290memory type (Flash, SDRAM, SRAM), even when it consists of several
6291physical memory banks.
6292
6293U-Boot is installed in the first 128 kB of the first Flash bank (on
6294TQM8xxL modules this is the range 0x40000000 ... 0x4001FFFF). After
6295booting and sizing and initializing DRAM, the code relocates itself
6296to the upper end of DRAM. Immediately below the U-Boot code some
6d0f6bcf 6297memory is reserved for use by malloc() [see CONFIG_SYS_MALLOC_LEN
2729af9d
WD
6298configuration setting]. Below that, a structure with global Board
6299Info data is placed, followed by the stack (growing downward).
6300
6301Additionally, some exception handler code is copied to the low 8 kB
6302of DRAM (0x00000000 ... 0x00001FFF).
6303
6304So a typical memory configuration with 16 MB of DRAM could look like
6305this:
6306
6307 0x0000 0000 Exception Vector code
6308 :
6309 0x0000 1FFF
6310 0x0000 2000 Free for Application Use
6311 :
6312 :
6313
6314 :
6315 :
6316 0x00FB FF20 Monitor Stack (Growing downward)
6317 0x00FB FFAC Board Info Data and permanent copy of global data
6318 0x00FC 0000 Malloc Arena
6319 :
6320 0x00FD FFFF
6321 0x00FE 0000 RAM Copy of Monitor Code
6322 ... eventually: LCD or video framebuffer
6323 ... eventually: pRAM (Protected RAM - unchanged by reset)
6324 0x00FF FFFF [End of RAM]
6325
6326
6327System Initialization:
6328----------------------
c609719b 6329
2729af9d 6330In the reset configuration, U-Boot starts at the reset entry point
11ccc33f 6331(on most PowerPC systems at address 0x00000100). Because of the reset
2729af9d
WD
6332configuration for CS0# this is a mirror of the onboard Flash memory.
6333To be able to re-map memory U-Boot then jumps to its link address.
6334To be able to implement the initialization code in C, a (small!)
6335initial stack is set up in the internal Dual Ported RAM (in case CPUs
6336which provide such a feature like MPC8xx or MPC8260), or in a locked
6337part of the data cache. After that, U-Boot initializes the CPU core,
6338the caches and the SIU.
6339
6340Next, all (potentially) available memory banks are mapped using a
6341preliminary mapping. For example, we put them on 512 MB boundaries
6342(multiples of 0x20000000: SDRAM on 0x00000000 and 0x20000000, Flash
6343on 0x40000000 and 0x60000000, SRAM on 0x80000000). Then UPM A is
6344programmed for SDRAM access. Using the temporary configuration, a
6345simple memory test is run that determines the size of the SDRAM
6346banks.
6347
6348When there is more than one SDRAM bank, and the banks are of
6349different size, the largest is mapped first. For equal size, the first
6350bank (CS2#) is mapped first. The first mapping is always for address
63510x00000000, with any additional banks following immediately to create
6352contiguous memory starting from 0.
6353
6354Then, the monitor installs itself at the upper end of the SDRAM area
6355and allocates memory for use by malloc() and for the global Board
6356Info data; also, the exception vector code is copied to the low RAM
6357pages, and the final stack is set up.
6358
6359Only after this relocation will you have a "normal" C environment;
6360until that you are restricted in several ways, mostly because you are
6361running from ROM, and because the code will have to be relocated to a
6362new address in RAM.
6363
6364
6365U-Boot Porting Guide:
6366----------------------
c609719b 6367
2729af9d
WD
6368[Based on messages by Jerry Van Baren in the U-Boot-Users mailing
6369list, October 2002]
c609719b
WD
6370
6371
6c3fef28 6372int main(int argc, char *argv[])
2729af9d
WD
6373{
6374 sighandler_t no_more_time;
c609719b 6375
6c3fef28
JVB
6376 signal(SIGALRM, no_more_time);
6377 alarm(PROJECT_DEADLINE - toSec (3 * WEEK));
c609719b 6378
2729af9d 6379 if (available_money > available_manpower) {
6c3fef28 6380 Pay consultant to port U-Boot;
c609719b
WD
6381 return 0;
6382 }
6383
2729af9d
WD
6384 Download latest U-Boot source;
6385
0668236b 6386 Subscribe to u-boot mailing list;
2729af9d 6387
6c3fef28
JVB
6388 if (clueless)
6389 email("Hi, I am new to U-Boot, how do I get started?");
2729af9d
WD
6390
6391 while (learning) {
6392 Read the README file in the top level directory;
6c3fef28
JVB
6393 Read http://www.denx.de/twiki/bin/view/DULG/Manual;
6394 Read applicable doc/*.README;
2729af9d 6395 Read the source, Luke;
6c3fef28 6396 /* find . -name "*.[chS]" | xargs grep -i <keyword> */
2729af9d
WD
6397 }
6398
6c3fef28
JVB
6399 if (available_money > toLocalCurrency ($2500))
6400 Buy a BDI3000;
6401 else
2729af9d 6402 Add a lot of aggravation and time;
2729af9d 6403
6c3fef28
JVB
6404 if (a similar board exists) { /* hopefully... */
6405 cp -a board/<similar> board/<myboard>
6406 cp include/configs/<similar>.h include/configs/<myboard>.h
6407 } else {
6408 Create your own board support subdirectory;
6409 Create your own board include/configs/<myboard>.h file;
6410 }
6411 Edit new board/<myboard> files
6412 Edit new include/configs/<myboard>.h
6413
6414 while (!accepted) {
6415 while (!running) {
6416 do {
6417 Add / modify source code;
6418 } until (compiles);
6419 Debug;
6420 if (clueless)
6421 email("Hi, I am having problems...");
6422 }
6423 Send patch file to the U-Boot email list;
6424 if (reasonable critiques)
6425 Incorporate improvements from email list code review;
6426 else
6427 Defend code as written;
2729af9d 6428 }
2729af9d
WD
6429
6430 return 0;
6431}
6432
6433void no_more_time (int sig)
6434{
6435 hire_a_guru();
6436}
6437
c609719b 6438
2729af9d
WD
6439Coding Standards:
6440-----------------
c609719b 6441
2729af9d 6442All contributions to U-Boot should conform to the Linux kernel
2c051651 6443coding style; see the file "Documentation/CodingStyle" and the script
7ca9296e 6444"scripts/Lindent" in your Linux kernel source directory.
2c051651
DZ
6445
6446Source files originating from a different project (for example the
6447MTD subsystem) are generally exempt from these guidelines and are not
6448reformated to ease subsequent migration to newer versions of those
6449sources.
6450
6451Please note that U-Boot is implemented in C (and to some small parts in
6452Assembler); no C++ is used, so please do not use C++ style comments (//)
6453in your code.
c609719b 6454
2729af9d
WD
6455Please also stick to the following formatting rules:
6456- remove any trailing white space
7ca9296e 6457- use TAB characters for indentation and vertical alignment, not spaces
2729af9d 6458- make sure NOT to use DOS '\r\n' line feeds
7ca9296e 6459- do not add more than 2 consecutive empty lines to source files
2729af9d 6460- do not add trailing empty lines to source files
180d3f74 6461
2729af9d
WD
6462Submissions which do not conform to the standards may be returned
6463with a request to reformat the changes.
c609719b
WD
6464
6465
2729af9d
WD
6466Submitting Patches:
6467-------------------
c609719b 6468
2729af9d
WD
6469Since the number of patches for U-Boot is growing, we need to
6470establish some rules. Submissions which do not conform to these rules
6471may be rejected, even when they contain important and valuable stuff.
c609719b 6472
0d28f34b 6473Please see http://www.denx.de/wiki/U-Boot/Patches for details.
218ca724 6474
0668236b
WD
6475Patches shall be sent to the u-boot mailing list <u-boot@lists.denx.de>;
6476see http://lists.denx.de/mailman/listinfo/u-boot
6477
2729af9d
WD
6478When you send a patch, please include the following information with
6479it:
c609719b 6480
2729af9d
WD
6481* For bug fixes: a description of the bug and how your patch fixes
6482 this bug. Please try to include a way of demonstrating that the
6483 patch actually fixes something.
c609719b 6484
2729af9d
WD
6485* For new features: a description of the feature and your
6486 implementation.
c609719b 6487
2729af9d 6488* A CHANGELOG entry as plaintext (separate from the patch)
c609719b 6489
2729af9d 6490* For major contributions, your entry to the CREDITS file
c609719b 6491
27af930e
AA
6492* When you add support for a new board, don't forget to add a
6493 maintainer e-mail address to the boards.cfg file, too.
c609719b 6494
2729af9d
WD
6495* If your patch adds new configuration options, don't forget to
6496 document these in the README file.
c609719b 6497
218ca724
WD
6498* The patch itself. If you are using git (which is *strongly*
6499 recommended) you can easily generate the patch using the
7ca9296e 6500 "git format-patch". If you then use "git send-email" to send it to
218ca724
WD
6501 the U-Boot mailing list, you will avoid most of the common problems
6502 with some other mail clients.
6503
6504 If you cannot use git, use "diff -purN OLD NEW". If your version of
6505 diff does not support these options, then get the latest version of
6506 GNU diff.
c609719b 6507
218ca724
WD
6508 The current directory when running this command shall be the parent
6509 directory of the U-Boot source tree (i. e. please make sure that
6510 your patch includes sufficient directory information for the
6511 affected files).
6dff5529 6512
218ca724
WD
6513 We prefer patches as plain text. MIME attachments are discouraged,
6514 and compressed attachments must not be used.
c609719b 6515
2729af9d
WD
6516* If one logical set of modifications affects or creates several
6517 files, all these changes shall be submitted in a SINGLE patch file.
52f52c14 6518
2729af9d
WD
6519* Changesets that contain different, unrelated modifications shall be
6520 submitted as SEPARATE patches, one patch per changeset.
8bde7f77 6521
52f52c14 6522
2729af9d 6523Notes:
c609719b 6524
2729af9d
WD
6525* Before sending the patch, run the MAKEALL script on your patched
6526 source tree and make sure that no errors or warnings are reported
6527 for any of the boards.
c609719b 6528
2729af9d
WD
6529* Keep your modifications to the necessary minimum: A patch
6530 containing several unrelated changes or arbitrary reformats will be
6531 returned with a request to re-formatting / split it.
c609719b 6532
2729af9d
WD
6533* If you modify existing code, make sure that your new code does not
6534 add to the memory footprint of the code ;-) Small is beautiful!
6535 When adding new features, these should compile conditionally only
6536 (using #ifdef), and the resulting code with the new feature
6537 disabled must not need more memory than the old code without your
6538 modification.
90dc6704 6539
0668236b
WD
6540* Remember that there is a size limit of 100 kB per message on the
6541 u-boot mailing list. Bigger patches will be moderated. If they are
6542 reasonable and not too big, they will be acknowledged. But patches
6543 bigger than the size limit should be avoided.