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Commit | Line | Data |
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281e00a3 WD |
1 | /* |
2 | * | |
3 | * (c) 2004 Sascha Hauer <sascha@saschahauer.de> | |
4 | * | |
1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
281e00a3 WD |
6 | */ |
7 | ||
8 | ||
9 | #include <common.h> | |
10 | #if defined (CONFIG_IMX) | |
11 | ||
12 | #include <asm/arch/imx-regs.h> | |
13 | ||
14 | /* ------------------------------------------------------------------------- */ | |
15 | /* NOTE: This describes the proper use of this file. | |
16 | * | |
17 | * CONFIG_SYS_CLK_FREQ should be defined as the input frequency of the PLL. | |
18 | * SH FIXME: 16780000 in our case | |
19 | * get_FCLK(), get_HCLK(), get_PCLK() and get_UCLK() return the clock of | |
20 | * the specified bus in HZ. | |
21 | */ | |
22 | /* ------------------------------------------------------------------------- */ | |
23 | ||
24 | ulong get_systemPLLCLK(void) | |
25 | { | |
26 | /* FIXME: We assume System_SEL = 0 here */ | |
27 | u32 spctl0 = SPCTL0; | |
28 | u32 mfi = (spctl0 >> 10) & 0xf; | |
29 | u32 mfn = spctl0 & 0x3f; | |
30 | u32 mfd = (spctl0 >> 16) & 0x3f; | |
31 | u32 pd = (spctl0 >> 26) & 0xf; | |
32 | ||
33 | mfi = mfi<=5 ? 5 : mfi; | |
34 | ||
35 | return (2*(CONFIG_SYSPLL_CLK_FREQ>>10)*( (mfi<<10) + (mfn<<10)/(mfd+1)))/(pd+1); | |
36 | } | |
37 | ||
38 | ulong get_mcuPLLCLK(void) | |
39 | { | |
40 | /* FIXME: We assume System_SEL = 0 here */ | |
41 | u32 mpctl0 = MPCTL0; | |
42 | u32 mfi = (mpctl0 >> 10) & 0xf; | |
43 | u32 mfn = mpctl0 & 0x3f; | |
44 | u32 mfd = (mpctl0 >> 16) & 0x3f; | |
45 | u32 pd = (mpctl0 >> 26) & 0xf; | |
46 | ||
47 | mfi = mfi<=5 ? 5 : mfi; | |
48 | ||
49 | return (2*(CONFIG_SYS_CLK_FREQ>>10)*( (mfi<<10) + (mfn<<10)/(mfd+1)))/(pd+1); | |
50 | } | |
51 | ||
52 | ulong get_FCLK(void) | |
53 | { | |
54 | return (( CSCR>>15)&1) ? get_mcuPLLCLK()>>1 : get_mcuPLLCLK(); | |
55 | } | |
56 | ||
57 | /* return HCLK frequency */ | |
58 | ulong get_HCLK(void) | |
59 | { | |
60 | u32 bclkdiv = (( CSCR >> 10 ) & 0xf) + 1; | |
61 | printf("bclkdiv: %d\n", bclkdiv); | |
62 | return get_systemPLLCLK() / bclkdiv; | |
63 | } | |
64 | ||
65 | /* return BCLK frequency */ | |
66 | ulong get_BCLK(void) | |
67 | { | |
68 | return get_HCLK(); | |
69 | } | |
70 | ||
71 | ulong get_PERCLK1(void) | |
72 | { | |
73 | return get_systemPLLCLK() / (((PCDR) & 0xf)+1); | |
74 | } | |
75 | ||
76 | ulong get_PERCLK2(void) | |
77 | { | |
78 | return get_systemPLLCLK() / (((PCDR>>4) & 0xf)+1); | |
79 | } | |
80 | ||
81 | ulong get_PERCLK3(void) | |
82 | { | |
83 | return get_systemPLLCLK() / (((PCDR>>16) & 0x7f)+1); | |
84 | } | |
85 | ||
86 | #endif /* defined (CONFIG_IMX) */ |