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7ebafb7e JCPV |
1 | /* |
2 | * (C) Copyright 2007-2008 | |
c9e798d3 | 3 | * Stelian Pop <stelian@popies.net> |
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4 | * Lead Tech Design <www.leadtechdesign.com> |
5 | * | |
1069a5cf | 6 | * (C) Copyright 2009-2011 |
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7 | * Daniel Gorsulowski <daniel.gorsulowski@esd.eu> |
8 | * esd electronic system design gmbh <www.esd.eu> | |
9 | * | |
1a459660 | 10 | * SPDX-License-Identifier: GPL-2.0+ |
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11 | */ |
12 | ||
13 | #include <common.h> | |
1069a5cf | 14 | #include <asm/io.h> |
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15 | #include <asm/arch/at91_common.h> |
16 | #include <asm/arch/at91_pmc.h> | |
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17 | #include <asm/arch/gpio.h> |
18 | ||
19 | /* | |
20 | * if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all | |
21 | * peripheral pins. Good to have if hardware is soldered optionally | |
22 | * or in case of SPI no slave is selected. Avoid lines to float | |
23 | * needlessly. Use a short local PUP define. | |
24 | * | |
25 | * Due to errata "TXD floats when CTS is inactive" pullups are always | |
26 | * on for TXD pins. | |
27 | */ | |
28 | #ifdef CONFIG_AT91_GPIO_PULLUP | |
29 | # define PUP CONFIG_AT91_GPIO_PULLUP | |
30 | #else | |
31 | # define PUP 0 | |
32 | #endif | |
7ebafb7e | 33 | |
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34 | void at91_serial0_hw_init(void) |
35 | { | |
1069a5cf | 36 | at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; |
0cf0b931 | 37 | |
7f9e8633 | 38 | at91_set_a_periph(AT91_PIO_PORTA, 26, 1); /* TXD0 */ |
ffa280fa | 39 | at91_set_a_periph(AT91_PIO_PORTA, 27, PUP); /* RXD0 */ |
1069a5cf | 40 | writel(1 << ATMEL_ID_USART0, &pmc->pcer); |
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41 | } |
42 | ||
43 | void at91_serial1_hw_init(void) | |
44 | { | |
1069a5cf | 45 | at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; |
0cf0b931 | 46 | |
7f9e8633 | 47 | at91_set_a_periph(AT91_PIO_PORTD, 0, 1); /* TXD1 */ |
ffa280fa | 48 | at91_set_a_periph(AT91_PIO_PORTD, 1, PUP); /* RXD1 */ |
1069a5cf | 49 | writel(1 << ATMEL_ID_USART1, &pmc->pcer); |
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50 | } |
51 | ||
52 | void at91_serial2_hw_init(void) | |
53 | { | |
1069a5cf | 54 | at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; |
0cf0b931 | 55 | |
7f9e8633 | 56 | at91_set_a_periph(AT91_PIO_PORTD, 2, 1); /* TXD2 */ |
ffa280fa | 57 | at91_set_a_periph(AT91_PIO_PORTD, 3, PUP); /* RXD2 */ |
1069a5cf | 58 | writel(1 << ATMEL_ID_USART2, &pmc->pcer); |
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59 | } |
60 | ||
1069a5cf | 61 | void at91_seriald_hw_init(void) |
1699da62 | 62 | { |
1069a5cf | 63 | at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; |
0cf0b931 | 64 | |
ffa280fa | 65 | at91_set_a_periph(AT91_PIO_PORTC, 30, PUP); /* DRXD */ |
7f9e8633 | 66 | at91_set_a_periph(AT91_PIO_PORTC, 31, 1); /* DTXD */ |
1069a5cf | 67 | writel(1 << ATMEL_ID_SYS, &pmc->pcer); |
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68 | } |
69 | ||
1069a5cf | 70 | #if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI) |
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71 | void at91_spi0_hw_init(unsigned long cs_mask) |
72 | { | |
1069a5cf | 73 | at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; |
0cf0b931 | 74 | |
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75 | at91_set_b_periph(AT91_PIO_PORTA, 0, PUP); /* SPI0_MISO */ |
76 | at91_set_b_periph(AT91_PIO_PORTA, 1, PUP); /* SPI0_MOSI */ | |
77 | at91_set_b_periph(AT91_PIO_PORTA, 2, PUP); /* SPI0_SPCK */ | |
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78 | |
79 | /* Enable clock */ | |
1069a5cf | 80 | writel(1 << ATMEL_ID_SPI0, &pmc->pcer); |
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81 | |
82 | if (cs_mask & (1 << 0)) { | |
7f9e8633 | 83 | at91_set_b_periph(AT91_PIO_PORTA, 5, 1); |
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84 | } |
85 | if (cs_mask & (1 << 1)) { | |
7f9e8633 | 86 | at91_set_b_periph(AT91_PIO_PORTA, 3, 1); |
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87 | } |
88 | if (cs_mask & (1 << 2)) { | |
7f9e8633 | 89 | at91_set_b_periph(AT91_PIO_PORTA, 4, 1); |
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90 | } |
91 | if (cs_mask & (1 << 3)) { | |
7f9e8633 | 92 | at91_set_b_periph(AT91_PIO_PORTB, 11, 1); |
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93 | } |
94 | if (cs_mask & (1 << 4)) { | |
7f9e8633 | 95 | at91_set_pio_output(AT91_PIO_PORTA, 5, 1); |
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96 | } |
97 | if (cs_mask & (1 << 5)) { | |
7f9e8633 | 98 | at91_set_pio_output(AT91_PIO_PORTA, 3, 1); |
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99 | } |
100 | if (cs_mask & (1 << 6)) { | |
7f9e8633 | 101 | at91_set_pio_output(AT91_PIO_PORTA, 4, 1); |
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102 | } |
103 | if (cs_mask & (1 << 7)) { | |
7f9e8633 | 104 | at91_set_pio_output(AT91_PIO_PORTB, 11, 1); |
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105 | } |
106 | } | |
107 | ||
108 | void at91_spi1_hw_init(unsigned long cs_mask) | |
109 | { | |
1069a5cf | 110 | at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; |
0cf0b931 | 111 | |
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112 | at91_set_a_periph(AT91_PIO_PORTB, 12, PUP); /* SPI1_MISO */ |
113 | at91_set_a_periph(AT91_PIO_PORTB, 13, PUP); /* SPI1_MOSI */ | |
114 | at91_set_a_periph(AT91_PIO_PORTB, 14, PUP); /* SPI1_SPCK */ | |
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115 | |
116 | /* Enable clock */ | |
1069a5cf | 117 | writel(1 << ATMEL_ID_SPI1, &pmc->pcer); |
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118 | |
119 | if (cs_mask & (1 << 0)) { | |
7f9e8633 | 120 | at91_set_a_periph(AT91_PIO_PORTB, 15, 1); |
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121 | } |
122 | if (cs_mask & (1 << 1)) { | |
7f9e8633 | 123 | at91_set_a_periph(AT91_PIO_PORTB, 16, 1); |
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124 | } |
125 | if (cs_mask & (1 << 2)) { | |
7f9e8633 | 126 | at91_set_a_periph(AT91_PIO_PORTB, 17, 1); |
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127 | } |
128 | if (cs_mask & (1 << 3)) { | |
7f9e8633 | 129 | at91_set_a_periph(AT91_PIO_PORTB, 18, 1); |
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130 | } |
131 | if (cs_mask & (1 << 4)) { | |
7f9e8633 | 132 | at91_set_pio_output(AT91_PIO_PORTB, 15, 1); |
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133 | } |
134 | if (cs_mask & (1 << 5)) { | |
7f9e8633 | 135 | at91_set_pio_output(AT91_PIO_PORTB, 16, 1); |
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136 | } |
137 | if (cs_mask & (1 << 6)) { | |
7f9e8633 | 138 | at91_set_pio_output(AT91_PIO_PORTB, 17, 1); |
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139 | } |
140 | if (cs_mask & (1 << 7)) { | |
7f9e8633 | 141 | at91_set_pio_output(AT91_PIO_PORTB, 18, 1); |
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142 | } |
143 | } | |
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144 | #endif |
145 | ||
146 | #ifdef CONFIG_MACB | |
147 | void at91_macb_hw_init(void) | |
148 | { | |
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149 | at91_set_a_periph(AT91_PIO_PORTE, 21, 0); /* ETXCK_EREFCK */ |
150 | at91_set_b_periph(AT91_PIO_PORTC, 25, 0); /* ERXDV */ | |
151 | at91_set_a_periph(AT91_PIO_PORTE, 25, 0); /* ERX0 */ | |
152 | at91_set_a_periph(AT91_PIO_PORTE, 26, 0); /* ERX1 */ | |
153 | at91_set_a_periph(AT91_PIO_PORTE, 27, 0); /* ERXER */ | |
154 | at91_set_a_periph(AT91_PIO_PORTE, 28, 0); /* ETXEN */ | |
155 | at91_set_a_periph(AT91_PIO_PORTE, 23, 0); /* ETX0 */ | |
156 | at91_set_a_periph(AT91_PIO_PORTE, 24, 0); /* ETX1 */ | |
157 | at91_set_a_periph(AT91_PIO_PORTE, 30, 0); /* EMDIO */ | |
158 | at91_set_a_periph(AT91_PIO_PORTE, 29, 0); /* EMDC */ | |
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159 | |
160 | #ifndef CONFIG_RMII | |
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161 | at91_set_a_periph(AT91_PIO_PORTE, 22, 0); /* ECRS */ |
162 | at91_set_b_periph(AT91_PIO_PORTC, 26, 0); /* ECOL */ | |
163 | at91_set_b_periph(AT91_PIO_PORTC, 22, 0); /* ERX2 */ | |
164 | at91_set_b_periph(AT91_PIO_PORTC, 23, 0); /* ERX3 */ | |
165 | at91_set_b_periph(AT91_PIO_PORTC, 27, 0); /* ERXCK */ | |
166 | at91_set_b_periph(AT91_PIO_PORTC, 20, 0); /* ETX2 */ | |
167 | at91_set_b_periph(AT91_PIO_PORTC, 21, 0); /* ETX3 */ | |
168 | at91_set_b_periph(AT91_PIO_PORTC, 24, 0); /* ETXER */ | |
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169 | #endif |
170 | } | |
171 | #endif | |
172 | ||
173 | #ifdef CONFIG_USB_OHCI_NEW | |
174 | void at91_uhp_hw_init(void) | |
175 | { | |
176 | /* Enable VBus on UHP ports */ | |
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177 | at91_set_pio_output(AT91_PIO_PORTA, 21, 0); |
178 | at91_set_pio_output(AT91_PIO_PORTA, 24, 0); | |
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179 | } |
180 | #endif | |
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181 | |
182 | #ifdef CONFIG_AT91_CAN | |
183 | void at91_can_hw_init(void) | |
184 | { | |
1069a5cf | 185 | at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; |
0cf0b931 | 186 | |
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187 | at91_set_a_periph(AT91_PIO_PORTA, 13, 0); /* CAN_TX */ |
188 | at91_set_a_periph(AT91_PIO_PORTA, 14, 1); /* CAN_RX */ | |
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189 | |
190 | /* Enable clock */ | |
1069a5cf | 191 | writel(1 << ATMEL_ID_CAN, &pmc->pcer); |
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192 | } |
193 | #endif |