[people/ms/u-boot.git] / arch / arm / cpu / arm926ejs / spear / spr600_mt47h64m16_3_333_cl5_psync.c

/*
 * (C) Copyright 2000-2009
 * Vipin Kumar, ST Microelectronics, vipin.kumar@st.com
 *
 * SPDX-License-Identifier:	GPL-2.0+ 
 */

#include <common.h>

#if (CONFIG_DDR_PLL2 || CONFIG_DDR_2HCLK)

const u32 mpmc_conf_vals[CONFIG_SPEAR_MPMCREGS] = {
#if (CONFIG_DDR_PLL2)
	0x00000001,
	0x00000000,
#elif (CONFIG_DDR_2HCLK)
	0x02020201,
	0x02020202,
#endif
	0x01000000,
	0x00000101,
	0x00000101,
	0x01000000,
	0x00010001,
	0x00000100,
	0x01010001,
	0x00000201,
	0x01000101,
	0x06000002,
	0x06060106,
	0x03050502,
	0x03040404,
	0x02020503,
#ifdef CONFIG_X600
	0x02030206,
#else
	0x02010106,
#endif
	0x03000405,
	0x03040202,
	0x04000305,
	0x0707073f,
	0x07070707,
	0x06060607,
	0x06060606,
	0x05050506,
	0x05050505,
	0x04040405,
	0x04040404,
	0x03030304,
	0x03030303,
	0x02020203,
	0x02020202,
	0x01010102,
	0x01010101,
	0x0a0a0a01,
	0x0000023f,
	0x00050a00,
	0x11000000,
	0x00001302,
	0x00000A0A,
#ifdef CONFIG_X600
	0x7f000000,
	0x005c0000,
#else
	0x72000000,
	0x00550000,
#endif
	0x2b050e86,
	0x00640064,
	0x00640064,
	0x00640064,
	0x00000064,
	0x00200020,
	0x00200020,
	0x00200020,
	0x00200020,
	0x00200020,
	0x00200020,
	0x00200020,
	0x00000a24,
	0x43C20000,
	0x5b1c00c8,
	0x00c8002e,
	0x00000000,
	0x0001046b,
	0x00000000,
	0x03030100,
	0x03030303,
	0x03030303,
	0x03030303,
	0x00210000,
	0x00010021,
	0x00200000,
	0x006c0090,
	0x003fffff,
	0x003fffff,
	0x00000000,
	0x00000000,
	0x003fffff,
	0x003fffff,
	0x00000000,
	0x00000000,
	0x003fffff,
	0x003fffff,
	0x00000000,
	0x00000000,
	0x003fffff,
	0x003fffff,
	0x00000000,
	0x00000000,
	0x003fffff,
	0x003fffff,
	0x00000000,
	0x00000000,
	0x003fffff,
	0x003fffff,
	0x00000000,
	0x00000000,
	0x003fffff,
	0x003fffff,
	0x00000000,
	0x00000000,
	0x00000000,
	0x00000000,
	0x00000000
};
#endif
Commit	Line	Data
4ae8bc43 SR	1	/*
	2	* (C) Copyright 2000-2009
	3	* Vipin Kumar, ST Microelectronics, vipin.kumar@st.com
	4	*
1a459660	5	* SPDX-License-Identifier: GPL-2.0+
4ae8bc43 SR	6	*/
	7
	8	#include <common.h>
	9
	10	#if (CONFIG_DDR_PLL2 \|\| CONFIG_DDR_2HCLK)
	11
	12	const u32 mpmc_conf_vals[CONFIG_SPEAR_MPMCREGS] = {
	13	#if (CONFIG_DDR_PLL2)
	14	0x00000001,
	15	0x00000000,
	16	#elif (CONFIG_DDR_2HCLK)
	17	0x02020201,
	18	0x02020202,
	19	#endif
	20	0x01000000,
	21	0x00000101,
	22	0x00000101,
	23	0x01000000,
	24	0x00010001,
	25	0x00000100,
	26	0x01010001,
	27	0x00000201,
	28	0x01000101,
	29	0x06000002,
	30	0x06060106,
	31	0x03050502,
	32	0x03040404,
	33	0x02020503,
	34	#ifdef CONFIG_X600
	35	0x02030206,
	36	#else
	37	0x02010106,
	38	#endif
	39	0x03000405,
	40	0x03040202,
	41	0x04000305,
	42	0x0707073f,
	43	0x07070707,
	44	0x06060607,
	45	0x06060606,
	46	0x05050506,
	47	0x05050505,
	48	0x04040405,
	49	0x04040404,
	50	0x03030304,
	51	0x03030303,
	52	0x02020203,
	53	0x02020202,
	54	0x01010102,
	55	0x01010101,
	56	0x0a0a0a01,
	57	0x0000023f,
	58	0x00050a00,
	59	0x11000000,
	60	0x00001302,
	61	0x00000A0A,
	62	#ifdef CONFIG_X600
	63	0x7f000000,
	64	0x005c0000,
	65	#else
	66	0x72000000,
	67	0x00550000,
	68	#endif
	69	0x2b050e86,
70	0x00640064,
71	0x00640064,
72	0x00640064,
73	0x00000064,
74	0x00200020,
75	0x00200020,
76	0x00200020,
77	0x00200020,
78	0x00200020,
79	0x00200020,
80	0x00200020,
81	0x00000a24,
82	0x43C20000,
83	0x5b1c00c8,
84	0x00c8002e,
85	0x00000000,
86	0x0001046b,
87	0x00000000,
88	0x03030100,
89	0x03030303,
90	0x03030303,
91	0x03030303,
92	0x00210000,
93	0x00010021,
94	0x00200000,
95	0x006c0090,
96	0x003fffff,
97	0x003fffff,
98	0x00000000,
99	0x00000000,
100	0x003fffff,
101	0x003fffff,
102	0x00000000,
103	0x00000000,
104	0x003fffff,
105	0x003fffff,
106	0x00000000,
107	0x00000000,
108	0x003fffff,
109	0x003fffff,
110	0x00000000,
111	0x00000000,
112	0x003fffff,
113	0x003fffff,
114	0x00000000,
115	0x00000000,
116	0x003fffff,
117	0x003fffff,
118	0x00000000,
119	0x00000000,
120	0x003fffff,
121	0x003fffff,
122	0x00000000,
123	0x00000000,
124	0x00000000,
125	0x00000000,
126	0x00000000
127	};
128	#endif