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64fdf452 SB |
1 | /* |
2 | * (C) Copyright 2007 | |
3 | * Sascha Hauer, Pengutronix | |
4 | * | |
5 | * (C) Copyright 2009 Freescale Semiconductor, Inc. | |
6 | * | |
7 | * See file CREDITS for list of people who contributed to this | |
8 | * project. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License as | |
12 | * published by the Free Software Foundation; either version 2 of | |
13 | * the License, or (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
23 | * MA 02111-1307 USA | |
24 | */ | |
25 | ||
26 | #include <common.h> | |
27 | #include <asm/io.h> | |
28 | #include <asm/arch/imx-regs.h> | |
29 | ||
30 | /* General purpose timers registers */ | |
31 | struct mxc_gpt { | |
32 | unsigned int control; | |
33 | unsigned int prescaler; | |
34 | unsigned int status; | |
35 | unsigned int nouse[6]; | |
36 | unsigned int counter; | |
37 | }; | |
38 | ||
39 | static struct mxc_gpt *cur_gpt = (struct mxc_gpt *)GPT1_BASE_ADDR; | |
40 | ||
41 | /* General purpose timers bitfields */ | |
42 | #define GPTCR_SWR (1<<15) /* Software reset */ | |
43 | #define GPTCR_FRR (1<<9) /* Freerun / restart */ | |
44 | #define GPTCR_CLKSOURCE_32 (4<<6) /* Clock source */ | |
45 | #define GPTCR_TEN (1) /* Timer enable */ | |
46 | ||
47 | static ulong timestamp; | |
48 | static ulong lastinc; | |
49 | ||
50 | int timer_init(void) | |
51 | { | |
52 | int i; | |
53 | ||
54 | /* setup GP Timer 1 */ | |
55 | __raw_writel(GPTCR_SWR, &cur_gpt->control); | |
56 | ||
57 | /* We have no udelay by now */ | |
58 | for (i = 0; i < 100; i++) | |
59 | __raw_writel(0, &cur_gpt->control); | |
60 | ||
61 | __raw_writel(0, &cur_gpt->prescaler); /* 32Khz */ | |
62 | ||
63 | /* Freerun Mode, PERCLK1 input */ | |
64 | i = __raw_readl(&cur_gpt->control); | |
65 | __raw_writel(i | GPTCR_CLKSOURCE_32 | GPTCR_TEN, &cur_gpt->control); | |
66 | reset_timer_masked(); | |
67 | return 0; | |
68 | } | |
69 | ||
70 | void reset_timer(void) | |
71 | { | |
72 | reset_timer_masked(); | |
73 | } | |
74 | ||
75 | void reset_timer_masked(void) | |
76 | { | |
77 | ulong val = __raw_readl(&cur_gpt->counter); | |
78 | lastinc = val / (CONFIG_MX51_CLK32 / CONFIG_SYS_HZ); | |
79 | timestamp = 0; | |
80 | } | |
81 | ||
82 | ulong get_timer_masked(void) | |
83 | { | |
84 | ulong val = __raw_readl(&cur_gpt->counter); | |
85 | val /= (CONFIG_MX51_CLK32 / CONFIG_SYS_HZ); | |
86 | if (val >= lastinc) | |
87 | timestamp += (val - lastinc); | |
88 | else | |
89 | timestamp += ((0xFFFFFFFF / (CONFIG_MX51_CLK32 / CONFIG_SYS_HZ)) | |
90 | - lastinc) + val; | |
91 | lastinc = val; | |
92 | return val; | |
93 | } | |
94 | ||
95 | ulong get_timer(ulong base) | |
96 | { | |
97 | return get_timer_masked() - base; | |
98 | } | |
99 | ||
100 | void set_timer(ulong t) | |
101 | { | |
102 | timestamp = t; | |
103 | } | |
104 | ||
105 | /* delay x useconds AND perserve advance timstamp value */ | |
106 | void __udelay(unsigned long usec) | |
107 | { | |
108 | unsigned long now, start, tmo; | |
109 | tmo = usec * (CONFIG_MX51_CLK32 / 1000) / 1000; | |
110 | ||
111 | if (!tmo) | |
112 | tmo = 1; | |
113 | ||
114 | now = start = readl(&cur_gpt->counter); | |
115 | ||
116 | while ((now - start) < tmo) | |
117 | now = readl(&cur_gpt->counter); | |
118 | ||
119 | } |