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common: Pass the boot device into spl_boot_mode()
[people/ms/u-boot.git] / arch / arm / cpu / armv7 / omap-common / boot-common.c
CommitLineData
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1/*
2 * boot-common.c
3 *
4 * Common bootmode functions for omap based boards
5 *
6 * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
7 *
1a459660 8 * SPDX-License-Identifier: GPL-2.0+
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9 */
10
11#include <common.h>
87791adc 12#include <ahci.h>
47f7bcae 13#include <spl.h>
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14#include <asm/omap_common.h>
15#include <asm/arch/omap.h>
f0881250 16#include <asm/arch/mmc_host_def.h>
1befaffb 17#include <asm/arch/sys_proto.h>
6843918e 18#include <watchdog.h>
87791adc 19#include <scsi.h>
60c7c30a 20#include <i2c.h>
8a8f084e 21
4a0eb757 22DECLARE_GLOBAL_DATA_PTR;
8a8f084e 23
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24__weak u32 omap_sys_boot_device(void)
25{
26 return BOOT_DEVICE_NONE;
27}
28
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29void save_omap_boot_params(void)
30{
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31 u32 boot_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
32 struct omap_boot_parameters *omap_boot_params;
8ceb34a1 33 int sys_boot_device = 0;
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34 u32 boot_device;
35 u32 boot_mode;
4596dcc1 36
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37 if ((boot_params < NON_SECURE_SRAM_START) ||
38 (boot_params > NON_SECURE_SRAM_END))
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39 return;
40
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41 omap_boot_params = (struct omap_boot_parameters *)boot_params;
42
60c7c30a 43 boot_device = omap_boot_params->boot_device;
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44 boot_mode = MMCSD_MODE_UNDEFINED;
45
46 /* Boot device */
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47
48#ifdef BOOT_DEVICE_NAND_I2C
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49 /*
50 * Re-map NAND&I2C boot-device to the "normal" NAND boot-device.
51 * Otherwise the SPL boot IF can't handle this device correctly.
52 * Somehow booting with Hynix 4GBit NAND H27U4G8 on Siemens
53 * Draco leads to this boot-device passed to SPL from the BootROM.
54 */
55 if (boot_device == BOOT_DEVICE_NAND_I2C)
56 boot_device = BOOT_DEVICE_NAND;
57#endif
df844772 58#ifdef BOOT_DEVICE_QSPI_4
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59 /*
60 * We get different values for QSPI_1 and QSPI_4 being used, but
61 * don't actually care about this difference. Rather than
62 * mangle the later code, if we're coming in as QSPI_4 just
63 * change to the QSPI_1 value.
64 */
df844772 65 if (boot_device == BOOT_DEVICE_QSPI_4)
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66 boot_device = BOOT_DEVICE_SPI;
67#endif
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68 /*
69 * When booting from peripheral booting, the boot device is not usable
70 * as-is (unless there is support for it), so the boot device is instead
71 * figured out using the SYS_BOOT pins.
72 */
73 switch (boot_device) {
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74#if defined(BOOT_DEVICE_UART) && !defined(CONFIG_SPL_YMODEM_SUPPORT)
75 case BOOT_DEVICE_UART:
76 sys_boot_device = 1;
77 break;
ed19bdae 78#endif
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79#if defined(BOOT_DEVICE_USB) && !defined(CONFIG_SPL_USB_SUPPORT)
80 case BOOT_DEVICE_USB:
81 sys_boot_device = 1;
82 break;
ed19bdae 83#endif
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84#if defined(BOOT_DEVICE_USBETH) && !defined(CONFIG_SPL_USBETH_SUPPORT)
85 case BOOT_DEVICE_USBETH:
86 sys_boot_device = 1;
87 break;
88#endif
89#if defined(BOOT_DEVICE_CPGMAC) && !defined(CONFIG_SPL_ETH_SUPPORT)
90 case BOOT_DEVICE_CPGMAC:
91 sys_boot_device = 1;
92 break;
93#endif
94 }
95
96 if (sys_boot_device) {
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97 boot_device = omap_sys_boot_device();
98
99 /* MMC raw mode will fallback to FS mode. */
100 if ((boot_device >= MMC_BOOT_DEVICES_START) &&
101 (boot_device <= MMC_BOOT_DEVICES_END))
102 boot_mode = MMCSD_MODE_RAW;
ed19bdae 103 }
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104
105 gd->arch.omap_boot_device = boot_device;
106
107 /* Boot mode */
108
ed19bdae 109#ifdef CONFIG_OMAP34XX
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110 if ((boot_device >= MMC_BOOT_DEVICES_START) &&
111 (boot_device <= MMC_BOOT_DEVICES_END)) {
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112 switch (boot_device) {
113 case BOOT_DEVICE_MMC1:
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114 boot_mode = MMCSD_MODE_FS;
115 break;
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116 case BOOT_DEVICE_MMC2:
117 boot_mode = MMCSD_MODE_RAW;
118 break;
119 }
ed19bdae 120 }
60c7c30a 121#else
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122 /*
123 * If the boot device was dynamically changed and doesn't match what
124 * the bootrom initially booted, we cannot use the boot device
125 * descriptor to figure out the boot mode.
126 */
127 if ((boot_device == omap_boot_params->boot_device) &&
128 (boot_device >= MMC_BOOT_DEVICES_START) &&
129 (boot_device <= MMC_BOOT_DEVICES_END)) {
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130 boot_params = omap_boot_params->boot_device_descriptor;
131 if ((boot_params < NON_SECURE_SRAM_START) ||
132 (boot_params > NON_SECURE_SRAM_END))
133 return;
134
135 boot_params = *((u32 *)(boot_params + DEVICE_DATA_OFFSET));
136 if ((boot_params < NON_SECURE_SRAM_START) ||
137 (boot_params > NON_SECURE_SRAM_END))
138 return;
139
140 boot_mode = *((u32 *)(boot_params + BOOT_MODE_OFFSET));
141
142 if (boot_mode != MMCSD_MODE_FS &&
143 boot_mode != MMCSD_MODE_RAW)
144#ifdef CONFIG_SUPPORT_EMMC_BOOT
ed19bdae 145 boot_mode = MMCSD_MODE_EMMCBOOT;
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146#else
147 boot_mode = MMCSD_MODE_UNDEFINED;
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148#endif
149 }
ed19bdae 150#endif
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151
152 gd->arch.omap_boot_mode = boot_mode;
153
154#if !defined(CONFIG_TI814X) && !defined(CONFIG_TI816X) && \
155 !defined(CONFIG_AM33XX) && !defined(CONFIG_AM43XX)
156
157 /* CH flags */
158
159 gd->arch.omap_ch_flags = omap_boot_params->ch_flags;
79b079f3 160#endif
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161}
162
8a8f084e 163#ifdef CONFIG_SPL_BUILD
8e1b836e 164u32 spl_boot_device(void)
8a8f084e 165{
60c7c30a 166 return gd->arch.omap_boot_device;
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167}
168
2b1cdafa 169u32 spl_boot_mode(const u32 boot_device)
8a8f084e 170{
60c7c30a 171 return gd->arch.omap_boot_mode;
8a8f084e 172}
f0881250 173
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174void spl_board_init(void)
175{
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176 /*
177 * Save the boot parameters passed from romcode.
178 * We cannot delay the saving further than this,
179 * to prevent overwrites.
180 */
181 save_omap_boot_params();
182
183 /* Prepare console output */
184 preloader_console_init();
185
60c7c30a 186#if defined(CONFIG_SPL_NAND_SUPPORT) || defined(CONFIG_SPL_ONENAND_SUPPORT)
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187 gpmc_init();
188#endif
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189#ifdef CONFIG_SPL_I2C_SUPPORT
190 i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
191#endif
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192#if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW_SUPPORT)
193 arch_misc_init();
194#endif
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195#if defined(CONFIG_HW_WATCHDOG)
196 hw_watchdog_init();
197#endif
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198#ifdef CONFIG_AM33XX
199 am33xx_spl_board_init();
200#endif
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201}
202
a4475af5 203__weak int board_mmc_init(bd_t *bis)
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204{
205 switch (spl_boot_device()) {
206 case BOOT_DEVICE_MMC1:
e3913f56 207 omap_mmc_init(0, 0, 0, -1, -1);
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208 break;
209 case BOOT_DEVICE_MMC2:
210 case BOOT_DEVICE_MMC2_2:
312db9f7 211 omap_mmc_init(0, 0, 0, -1, -1);
e3913f56 212 omap_mmc_init(1, 0, 0, -1, -1);
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213 break;
214 }
215 return 0;
216}
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217
218void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
219{
220 typedef void __noreturn (*image_entry_noargs_t)(u32 *);
221 image_entry_noargs_t image_entry =
222 (image_entry_noargs_t) spl_image->entry_point;
223
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224 u32 boot_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
225
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226 debug("image entry point: 0x%X\n", spl_image->entry_point);
227 /* Pass the saved boot_params from rom code */
60c7c30a 228 image_entry((u32 *)boot_params);
4a0eb757 229}
8a8f084e 230#endif
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231
232#ifdef CONFIG_SCSI_AHCI_PLAT
233void arch_preboot_os(void)
234{
9efaca3e 235 ahci_reset((void __iomem *)DWC_AHSATA_BASE);
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236}
237#endif
ecd85579 238
17da3c0c 239#if defined(CONFIG_USB_FUNCTION_FASTBOOT) && !defined(CONFIG_ENV_IS_NOWHERE)
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240int fb_set_reboot_flag(void)
241{
242 printf("Setting reboot to fastboot flag ...\n");
243 setenv("dofastboot", "1");
244 saveenv();
245 return 0;
246}
247#endif