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OMAP5: io: Configure the io settings for omap5430 sevm board.
[people/ms/u-boot.git] / arch / arm / cpu / armv7 / omap5 / sdram_elpida.c
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1/*
2 * Timing and Organization details of the Elpida parts used in OMAP5
3 * EVM
4 *
5 * (C) Copyright 2010
6 * Texas Instruments, <www.ti.com>
7 *
8 * Aneesh V <aneesh@ti.com>
9 * Sricharan R <r.sricharan@ti.com>
10 *
11 * See file CREDITS for list of people who contributed to this
12 * project.
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 * MA 02111-1307 USA
28 */
29
30#include <asm/emif.h>
31#include <asm/arch/sys_proto.h>
32
33/*
34 * This file provides details of the LPDDR2 SDRAM parts used on OMAP5
35 * EVM. Since the parts used and geometry are identical for
36 * evm for a given OMAP5 revision, this information is kept
37 * here instead of being in board directory. However the key functions
38 * exported are weakly linked so that they can be over-ridden in the board
39 * directory if there is a OMAP5 board in the future that uses a different
40 * memory device or geometry.
41 *
42 * For any new board with different memory devices over-ride one or more
43 * of the following functions as per the CONFIG flags you intend to enable:
44 * - emif_get_reg_dump()
45 * - emif_get_dmm_regs()
46 * - emif_get_device_details()
47 * - emif_get_device_timings()
48 */
49
50#ifdef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
51
52const struct emif_regs emif_regs_elpida_532_mhz_1cs = {
53 .sdram_config_init = 0x80801aB2,
54 .sdram_config = 0x808022B2,
55 .ref_ctrl = 0x0000081A,
56 .sdram_tim1 = 0x772F6873,
57 .sdram_tim2 = 0x304A129A,
58 .sdram_tim3 = 0x02F7E45F,
59 .read_idle_ctrl = 0x00050000,
60 .zq_config = 0x000B3215,
61 .temp_alert_config = 0x08000A05,
62 .emif_ddr_phy_ctlr_1_init = 0x0E38200D,
63 .emif_ddr_phy_ctlr_1 = 0x0E38200D
64};
65
66const struct dmm_lisa_map_regs lisa_map_4G_x_1_x_2 = {
67 .dmm_lisa_map_0 = 0xFF020100,
68 .dmm_lisa_map_1 = 0,
69 .dmm_lisa_map_2 = 0,
70 .dmm_lisa_map_3 = 0x80640300
71};
72
73static void emif_get_reg_dump_sdp(u32 emif_nr, const struct emif_regs **regs)
74{
75 *regs = &emif_regs_elpida_532_mhz_1cs;
76}
77void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)
78 __attribute__((weak, alias("emif_get_reg_dump_sdp")));
79
80static void emif_get_dmm_regs_sdp(const struct dmm_lisa_map_regs
81 **dmm_lisa_regs)
82{
83 *dmm_lisa_regs = &lisa_map_4G_x_1_x_2;
84}
85
86void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs)
87 __attribute__((weak, alias("emif_get_dmm_regs_sdp")));
88
89#else
90
91static const struct lpddr2_device_details elpida_4G_S4_details = {
92 .type = LPDDR2_TYPE_S4,
93 .density = LPDDR2_DENSITY_4Gb,
94 .io_width = LPDDR2_IO_WIDTH_32,
95 .manufacturer = LPDDR2_MANUFACTURER_ELPIDA
96};
97
98static void emif_get_device_details_sdp(u32 emif_nr,
99 struct lpddr2_device_details *cs0_device_details,
100 struct lpddr2_device_details *cs1_device_details)
101{
102 /* EMIF1 & EMIF2 have identical configuration */
103 *cs0_device_details = elpida_4G_S4_details;
104
105 /* Nothing is conected on cs1 */
106 cs1_device_details = NULL;
107}
108
109void emif_get_device_details(u32 emif_nr,
110 struct lpddr2_device_details *cs0_device_details,
111 struct lpddr2_device_details *cs1_device_details)
112 __attribute__((weak, alias("emif_get_device_details_sdp")));
113
114#endif /* CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS */
115
116#ifndef CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
117static const struct lpddr2_ac_timings timings_jedec_532_mhz = {
118 .max_freq = 532000000,
119 .RL = 8,
120 .tRPab = 21,
121 .tRCD = 18,
122 .tWR = 15,
123 .tRASmin = 42,
124 .tRRD = 10,
125 .tWTRx2 = 15,
126 .tXSR = 140,
127 .tXPx2 = 15,
128 .tRFCab = 130,
129 .tRTPx2 = 15,
130 .tCKE = 3,
131 .tCKESR = 15,
132 .tZQCS = 90,
133 .tZQCL = 360,
134 .tZQINIT = 1000,
135 .tDQSCKMAXx2 = 11,
136 .tRASmax = 70,
137 .tFAW = 50
138};
139
140static const struct lpddr2_min_tck min_tck_elpida = {
141 .tRL = 3,
142 .tRP_AB = 3,
143 .tRCD = 3,
144 .tWR = 3,
145 .tRAS_MIN = 3,
146 .tRRD = 2,
147 .tWTR = 2,
148 .tXP = 2,
149 .tRTP = 2,
150 .tCKE = 3,
151 .tCKESR = 3,
152 .tFAW = 8
153};
154
155static const struct lpddr2_ac_timings *elpida_ac_timings[MAX_NUM_SPEEDBINS] = {
156 &timings_jedec_532_mhz
157};
158
159static const struct lpddr2_device_timings elpida_4G_S4_timings = {
160 .ac_timings = elpida_ac_timings,
161 .min_tck = &min_tck_elpida,
162};
163
164void emif_get_device_timings_sdp(u32 emif_nr,
165 const struct lpddr2_device_timings **cs0_device_timings,
166 const struct lpddr2_device_timings **cs1_device_timings)
167{
168 /* Identical devices on EMIF1 & EMIF2 */
169 *cs0_device_timings = &elpida_4G_S4_timings;
170 *cs1_device_timings = NULL;
171}
172
173void emif_get_device_timings(u32 emif_nr,
174 const struct lpddr2_device_timings **cs0_device_timings,
175 const struct lpddr2_device_timings **cs1_device_timings)
176 __attribute__((weak, alias("emif_get_device_timings_sdp")));
177
178#endif /* CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS */