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ba94a1bb WD |
1 | /** |
2 | * @file IxEthMii.h | |
3 | * | |
4 | * @brief this file contains the public API of @ref IxEthMii component | |
5 | * | |
6 | * Design notes : | |
7 | * The main intent of this API is to inplement MII high level fonctionalitoes | |
8 | * to support the codelets provided with the IXP400 software releases. It | |
9 | * superceedes previous interfaces provided with @ref IxEThAcc component. | |
10 | * | |
11 | * This API has been tested with the PHYs provided with the | |
12 | * IXP400 development platforms. It may not work for specific Ethernet PHYs | |
13 | * used on specific boards. | |
14 | * | |
15 | * This source code detects and interface the LXT972, LXT973 and KS6995 | |
16 | * Ethernet PHYs. | |
17 | * | |
18 | * This source code should be considered as an example which may need | |
19 | * to be adapted for different hardware implementations. | |
20 | * | |
21 | * It is strongly recommended to use public domain and GPL utilities | |
22 | * like libmii, mii-diag for MII interface support. | |
23 | * | |
24 | * | |
25 | * | |
26 | * @par | |
27 | * IXP400 SW Release version 2.0 | |
28 | * | |
29 | * -- Copyright Notice -- | |
30 | * | |
31 | * @par | |
32 | * Copyright 2001-2005, Intel Corporation. | |
33 | * All rights reserved. | |
34 | * | |
35 | * @par | |
36 | * Redistribution and use in source and binary forms, with or without | |
37 | * modification, are permitted provided that the following conditions | |
38 | * are met: | |
39 | * 1. Redistributions of source code must retain the above copyright | |
40 | * notice, this list of conditions and the following disclaimer. | |
41 | * 2. Redistributions in binary form must reproduce the above copyright | |
42 | * notice, this list of conditions and the following disclaimer in the | |
43 | * documentation and/or other materials provided with the distribution. | |
44 | * 3. Neither the name of the Intel Corporation nor the names of its contributors | |
45 | * may be used to endorse or promote products derived from this software | |
46 | * without specific prior written permission. | |
47 | * | |
48 | * @par | |
49 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS'' | |
50 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
51 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
52 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE | |
53 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
54 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | |
55 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | |
56 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | |
57 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | |
58 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | |
59 | * SUCH DAMAGE. | |
60 | * | |
61 | * @par | |
62 | * -- End of Copyright Notice -- | |
63 | */ | |
64 | ||
65 | #ifndef IxEthMii_H | |
66 | #define IxEthMii_H | |
67 | ||
68 | #include <IxTypes.h> | |
69 | ||
70 | /** | |
71 | * @defgroup IxEthMii IXP400 Ethernet Phy Access (IxEthMii) API | |
72 | * | |
73 | * @brief ethMii is a library that does provides access to the | |
74 | * Ethernet PHYs | |
75 | * | |
76 | *@{ | |
77 | */ | |
78 | ||
79 | /** | |
80 | * @ingroup IxEthMii | |
81 | * | |
82 | * @fn ixEthMiiPhyScan(BOOL phyPresent[], UINT32 maxPhyCount) | |
83 | * | |
84 | * @brief Scan the MDIO bus for PHYs | |
85 | * This function scans PHY addresses 0 through 31, and sets phyPresent[n] to | |
86 | * TRUE if a phy is discovered at address n. | |
87 | * | |
88 | * - Reentrant - no | |
89 | * - ISR Callable - no | |
90 | * | |
91 | * @pre The MAC on Ethernet Port 2 (NPE C) must be initialised, and generating the MDIO clock. | |
92 | * | |
93 | * @param phyPresent BOOL [in] - boolean array of IXP425_ETH_ACC_MII_MAX_ADDR entries | |
94 | * @param maxPhyCount UINT32 [in] - number of PHYs to search for (the scan will stop when | |
95 | * the indicated number of PHYs is found). | |
96 | * | |
97 | * @return IX_STATUS | |
98 | * - IX_ETH_ACC_SUCCESS | |
99 | * - IX_ETH_ACC_FAIL : invalid arguments. | |
100 | * | |
101 | * <hr> | |
102 | */ | |
103 | PUBLIC IX_STATUS ixEthMiiPhyScan(BOOL phyPresent[], UINT32 maxPhyCount); | |
104 | ||
105 | /** | |
106 | * @ingroup IxEthMii | |
107 | * | |
108 | * @fn ixEthMiiPhyConfig(UINT32 phyAddr, | |
53677ef1 WD |
109 | BOOL speed100, |
110 | BOOL fullDuplex, | |
111 | BOOL autonegotiate) | |
ba94a1bb WD |
112 | * |
113 | * | |
114 | * @brief Configure a PHY | |
115 | * Configure a PHY's speed, duplex and autonegotiation status | |
116 | * | |
117 | * - Reentrant - no | |
118 | * - ISR Callable - no | |
119 | * | |
120 | * @pre The MAC on Ethernet Port 2 (NPE C) must be initialised, and generating the MDIO clock. | |
121 | * | |
122 | * @param phyAddr UINT32 [in] | |
123 | * @param speed100 BOOL [in] - set to TRUE for 100Mbit/s operation, FALSE for 10Mbit/s | |
124 | * @param fullDuplex BOOL [in] - set to TRUE for Full Duplex, FALSE for Half Duplex | |
125 | * @param autonegotiate BOOL [in] - set to TRUE to enable autonegotiation | |
126 | * | |
127 | * @return IX_STATUS | |
128 | * - IX_SUCCESS | |
129 | * - IX_FAIL : invalid arguments. | |
130 | * | |
131 | * <hr> | |
132 | */ | |
133 | PUBLIC IX_STATUS ixEthMiiPhyConfig(UINT32 phyAddr, | |
134 | BOOL speed100, | |
135 | BOOL fullDuplex, | |
136 | BOOL autonegotiate); | |
137 | ||
138 | /** | |
139 | * @ingroup IxEthMii | |
140 | * | |
141 | * @fn ixEthMiiPhyLoopbackEnable(UINT32 phyAddr) | |
142 | * | |
143 | * | |
144 | * @brief Enable PHY Loopback in a specific Eth MII port | |
145 | * | |
146 | * @note When PHY Loopback is enabled, frames sent out to the PHY from the | |
147 | * IXP400 will be looped back to the IXP400. They will not be transmitted out | |
148 | * on the wire. | |
149 | * | |
150 | * - Reentrant - no | |
151 | * - ISR Callable - no | |
152 | * | |
153 | * @param phyAddr UINT32 [in] - the address of the Ethernet PHY (0-31) | |
154 | * | |
155 | * @return IX_STATUS | |
156 | * - IX_SUCCESS | |
157 | * - IX_FAIL : invalid arguments. | |
158 | * <hr> | |
159 | */ | |
160 | PUBLIC IX_STATUS | |
161 | ixEthMiiPhyLoopbackEnable (UINT32 phyAddr); | |
162 | ||
163 | /** | |
164 | * @ingroup IxEthMii | |
165 | * | |
166 | * @fn ixEthMiiPhyLoopbackDisable(UINT32 phyAddr) | |
167 | * | |
168 | * | |
169 | * @brief Disable PHY Loopback in a specific Eth MII port | |
170 | * | |
171 | * - Reentrant - no | |
172 | * - ISR Callable - no | |
173 | * | |
174 | * @param phyAddr UINT32 [in] - the address of the Ethernet PHY (0-31) | |
175 | * | |
176 | * @return IX_STATUS | |
177 | * - IX_SUCCESS | |
178 | * - IX_FAIL : invalid arguments. | |
179 | * <hr> | |
180 | */ | |
181 | PUBLIC IX_STATUS | |
182 | ixEthMiiPhyLoopbackDisable (UINT32 phyAddr); | |
183 | ||
184 | /** | |
185 | * @ingroup IxEthMii | |
186 | * | |
187 | * @fn ixEthMiiPhyReset(UINT32 phyAddr) | |
188 | * | |
189 | * @brief Reset a PHY | |
190 | * Reset a PHY | |
191 | * | |
192 | * - Reentrant - no | |
193 | * - ISR Callable - no | |
194 | * | |
195 | * @pre The MAC on Ethernet Port 2 (NPE C) must be initialised, and generating the MDIO clock. | |
196 | * | |
197 | * @param phyAddr UINT32 [in] - the address of the Ethernet PHY (0-31) | |
198 | * | |
199 | * @return IX_STATUS | |
200 | * - IX_SUCCESS | |
201 | * - IX_FAIL : invalid arguments. | |
202 | * | |
203 | * <hr> | |
204 | */ | |
205 | PUBLIC IX_STATUS ixEthMiiPhyReset(UINT32 phyAddr); | |
206 | ||
207 | ||
208 | /** | |
209 | * @ingroup IxEthMii | |
210 | * | |
211 | * @fn ixEthMiiLinkStatus(UINT32 phyAddr, | |
53677ef1 WD |
212 | BOOL *linkUp, |
213 | BOOL *speed100, | |
214 | BOOL *fullDuplex, | |
215 | BOOL *autoneg) | |
ba94a1bb WD |
216 | * |
217 | * @brief Retrieve the current status of a PHY | |
218 | * Retrieve the link, speed, duplex and autonegotiation status of a PHY | |
219 | * | |
220 | * - Reentrant - no | |
221 | * - ISR Callable - no | |
222 | * | |
223 | * @pre The MAC on Ethernet Port 2 (NPE C) must be initialised, and generating the MDIO clock. | |
224 | * | |
225 | * @param phyAddr UINT32 [in] - the address of the Ethernet PHY (0-31) | |
226 | * @param linkUp BOOL [out] - set to TRUE if the link is up | |
227 | * @param speed100 BOOL [out] - set to TRUE indicates 100Mbit/s, FALSE indicates 10Mbit/s | |
228 | * @param fullDuplex BOOL [out] - set to TRUE indicates Full Duplex, FALSE indicates Half Duplex | |
229 | * @param autoneg BOOL [out] - set to TRUE indicates autonegotiation is enabled, FALSE indicates autonegotiation is disabled | |
230 | * | |
231 | * @return IX_STATUS | |
232 | * - IX_SUCCESS | |
233 | * - IX_FAIL : invalid arguments. | |
234 | * | |
235 | * <hr> | |
236 | */ | |
237 | PUBLIC IX_STATUS ixEthMiiLinkStatus(UINT32 phyAddr, | |
238 | BOOL *linkUp, | |
239 | BOOL *speed100, | |
240 | BOOL *fullDuplex, | |
241 | BOOL *autoneg); | |
242 | ||
243 | /** | |
244 | * @ingroup IxEthMii | |
245 | * | |
246 | * @fn ixEthMiiPhyShow (UINT32 phyAddr) | |
247 | * | |
248 | * | |
249 | * @brief Display information on a specified PHY | |
250 | * Display link status, speed, duplex and Auto Negotiation status | |
251 | * | |
252 | * - Reentrant - no | |
253 | * - ISR Callable - no | |
254 | * | |
255 | * @pre The MAC on Ethernet Port 2 (NPE C) must be initialised, and generating the MDIO clock. | |
256 | * | |
257 | * @param phyAddr UINT32 [in] - the address of the Ethernet PHY (0-31) | |
258 | * | |
259 | * @return IX_STATUS | |
260 | * - IX_SUCCESS | |
261 | * - IX_FAIL : invalid arguments. | |
262 | * | |
263 | * <hr> | |
264 | */ | |
265 | PUBLIC IX_STATUS ixEthMiiPhyShow (UINT32 phyAddr); | |
266 | ||
267 | #endif /* ndef IxEthMii_H */ | |
268 | /** | |
269 | *@} | |
270 | */ |