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1335483a SR |
1 | /* |
2 | * Copyright (C) 2016 Marvell Technology Group Ltd. | |
3 | * | |
4 | * This file is dual-licensed: you can use it either under the terms | |
5 | * of the GPLv2 or the X11 license, at your option. Note that this dual | |
6 | * licensing only applies to this file, and not this project as a | |
7 | * whole. | |
8 | * | |
9 | * a) This library is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License as | |
11 | * published by the Free Software Foundation; either version 2 of the | |
12 | * License, or (at your option) any later version. | |
13 | * | |
14 | * This library is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * Or, alternatively, | |
20 | * | |
21 | * b) Permission is hereby granted, free of charge, to any person | |
22 | * obtaining a copy of this software and associated documentation | |
23 | * files (the "Software"), to deal in the Software without | |
24 | * restriction, including without limitation the rights to use, | |
25 | * copy, modify, merge, publish, distribute, sublicense, and/or | |
26 | * sell copies of the Software, and to permit persons to whom the | |
27 | * Software is furnished to do so, subject to the following | |
28 | * conditions: | |
29 | * | |
30 | * The above copyright notice and this permission notice shall be | |
31 | * included in all copies or substantial portions of the Software. | |
32 | * | |
33 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
34 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
35 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
36 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
37 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
38 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
39 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
40 | * OTHER DEALINGS IN THE SOFTWARE. | |
41 | */ | |
42 | ||
43 | /* | |
44 | * Device Tree file for Marvell Armada 7040 Development board platform | |
50eacd8e | 45 | * Boot device: SPI NOR, 0x32 (SW3) |
1335483a SR |
46 | */ |
47 | ||
48 | #include "armada-7040.dtsi" | |
49 | ||
50 | / { | |
51 | model = "Marvell Armada 7040 DB board"; | |
52 | compatible = "marvell,armada7040-db", "marvell,armada7040", | |
53 | "marvell,armada-ap806-quad", "marvell,armada-ap806"; | |
54 | ||
55 | chosen { | |
56 | stdout-path = "serial0:115200n8"; | |
57 | }; | |
58 | ||
b28d29f7 SR |
59 | aliases { |
60 | i2c0 = &cpm_i2c0; | |
61 | spi0 = &cpm_spi1; | |
62 | }; | |
63 | ||
1335483a SR |
64 | memory@00000000 { |
65 | device_type = "memory"; | |
66 | reg = <0x0 0x0 0x0 0x80000000>; | |
67 | }; | |
68 | }; | |
69 | ||
f99386c5 KP |
70 | &ap_pinctl { |
71 | /* MPP Bus: | |
72 | * SDIO [0-5] | |
73 | * UART0 [11,19] | |
74 | */ | |
75 | /* 0 1 2 3 4 5 6 7 8 9 */ | |
76 | pin-func = < 1 1 1 1 1 1 0 0 0 0 | |
77 | 0 3 0 0 0 0 0 0 0 3 >; | |
78 | }; | |
79 | ||
1335483a SR |
80 | &uart0 { |
81 | status = "okay"; | |
82 | }; | |
83 | ||
84 | ||
85 | &cpm_pcie2 { | |
86 | status = "okay"; | |
87 | }; | |
88 | ||
89 | &cpm_i2c0 { | |
f99386c5 KP |
90 | pinctrl-names = "default"; |
91 | pinctrl-0 = <&cpm_i2c0_pins>; | |
1335483a SR |
92 | status = "okay"; |
93 | clock-frequency = <100000>; | |
94 | }; | |
95 | ||
f99386c5 KP |
96 | &cpm_pinctl { |
97 | /* MPP Bus: | |
98 | * TDM [0-11] | |
99 | * SPI [13-16] | |
100 | * SATA1 [28] | |
101 | * UART0 [29-30] | |
102 | * SMI [32,34] | |
103 | * XSMI [35-36] | |
104 | * I2C [37-38] | |
105 | * RGMII1[44-55] | |
106 | * SD [56-62] | |
107 | */ | |
108 | /* 0 1 2 3 4 5 6 7 8 9 */ | |
109 | pin-func = < 4 4 4 4 4 4 4 4 4 4 | |
110 | 4 4 0 3 3 3 3 0 0 0 | |
111 | 0 0 0 0 0 0 0 0 9 0xA | |
112 | 0xA 0 7 0 7 7 7 2 2 0 | |
113 | 0 0 0 0 1 1 1 1 1 1 | |
114 | 1 1 1 1 1 1 0xE 0xE 0xE 0xE | |
115 | 0xE 0xE 0xE >; | |
116 | }; | |
117 | ||
1335483a | 118 | &cpm_spi1 { |
f99386c5 KP |
119 | pinctrl-names = "default"; |
120 | pinctrl-0 = <&cpm_spi0_pins>; | |
1335483a SR |
121 | status = "okay"; |
122 | ||
123 | spi-flash@0 { | |
124 | #address-cells = <0x1>; | |
125 | #size-cells = <0x1>; | |
126 | compatible = "jedec,spi-nor"; | |
127 | reg = <0x0>; | |
128 | spi-max-frequency = <20000000>; | |
129 | ||
130 | partitions { | |
131 | compatible = "fixed-partitions"; | |
132 | #address-cells = <1>; | |
133 | #size-cells = <1>; | |
134 | ||
135 | partition@0 { | |
136 | label = "U-Boot"; | |
137 | reg = <0x0 0x200000>; | |
138 | }; | |
139 | ||
140 | partition@400000 { | |
141 | label = "Filesystem"; | |
142 | reg = <0x200000 0xe00000>; | |
143 | }; | |
144 | }; | |
145 | }; | |
146 | }; | |
147 | ||
148 | &cpm_sata0 { | |
149 | status = "okay"; | |
150 | }; | |
151 | ||
152 | &cpm_usb3_0 { | |
153 | status = "okay"; | |
154 | }; | |
155 | ||
156 | &cpm_usb3_1 { | |
157 | status = "okay"; | |
158 | }; | |
78806891 | 159 | |
a12c92e3 | 160 | &cpm_comphy { |
78806891 | 161 | phy0 { |
fdc9e880 | 162 | phy-type = <PHY_TYPE_SGMII1>; |
d74238ae | 163 | phy-speed = <PHY_SPEED_1_25G>; |
78806891 SR |
164 | }; |
165 | ||
166 | phy1 { | |
167 | phy-type = <PHY_TYPE_USB3_HOST0>; | |
168 | phy-speed = <PHY_SPEED_5G>; | |
169 | }; | |
170 | ||
171 | phy2 { | |
0cc20912 | 172 | phy-type = <PHY_TYPE_SFI>; |
78806891 SR |
173 | }; |
174 | ||
175 | phy3 { | |
176 | phy-type = <PHY_TYPE_SATA1>; | |
177 | phy-speed = <PHY_SPEED_5G>; | |
178 | }; | |
179 | ||
180 | phy4 { | |
181 | phy-type = <PHY_TYPE_USB3_HOST1>; | |
182 | phy-speed = <PHY_SPEED_5G>; | |
183 | }; | |
184 | ||
185 | phy5 { | |
186 | phy-type = <PHY_TYPE_PEX2>; | |
187 | phy-speed = <PHY_SPEED_5G>; | |
188 | }; | |
189 | }; | |
190 | ||
a12c92e3 | 191 | &cpm_utmi0 { |
78806891 SR |
192 | status = "okay"; |
193 | }; | |
194 | ||
a12c92e3 | 195 | &cpm_utmi1 { |
78806891 SR |
196 | status = "okay"; |
197 | }; | |
27090324 SR |
198 | |
199 | &ap_sdhci0 { | |
200 | status = "okay"; | |
201 | bus-width = <4>; | |
202 | no-1-8-v; | |
203 | non-removable; | |
204 | }; | |
205 | ||
206 | &cpm_sdhci0 { | |
207 | status = "okay"; | |
208 | bus-width = <4>; | |
209 | no-1-8-v; | |
210 | non-removable; | |
211 | }; | |
a6555ebe TP |
212 | |
213 | &cpm_mdio { | |
214 | phy0: ethernet-phy@0 { | |
215 | reg = <0>; | |
216 | }; | |
217 | phy1: ethernet-phy@1 { | |
218 | reg = <1>; | |
219 | }; | |
220 | }; | |
221 | ||
222 | &cpm_ethernet { | |
223 | status = "okay"; | |
224 | }; | |
225 | ||
0cc20912 SR |
226 | &cpm_eth0 { |
227 | status = "okay"; | |
228 | phy-mode = "sfi"; /* lane-2 */ | |
229 | }; | |
230 | ||
a6555ebe TP |
231 | &cpm_eth1 { |
232 | status = "okay"; | |
233 | phy = <&phy0>; | |
234 | phy-mode = "sgmii"; | |
235 | }; | |
236 | ||
237 | &cpm_eth2 { | |
238 | status = "okay"; | |
239 | phy = <&phy1>; | |
240 | phy-mode = "rgmii-id"; | |
241 | }; |