[people/ms/u-boot.git] / arch / arm / dts / ast2500.dtsi

/*
 * This device tree is copied from
 * https://raw.githubusercontent.com/torvalds/linux/34ea5c9d/arch/arm/boot/dts/aspeed-g5.dtsi
 */
#include "skeleton.dtsi"

/ {
	model = "Aspeed BMC";
	compatible = "aspeed,ast2500";
	#address-cells = <1>;
	#size-cells = <1>;
	interrupt-parent = <&vic>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			compatible = "arm,arm1176jzf-s";
			device_type = "cpu";
			reg = <0>;
		};
	};

	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		vic: interrupt-controller@1e6c0080 {
			compatible = "aspeed,ast2400-vic";
			interrupt-controller;
			#interrupt-cells = <1>;
			valid-sources = <0xfefff7ff 0x0807ffff>;
			reg = <0x1e6c0080 0x80>;
		};

		mac0: ethernet@1e660000 {
			compatible = "faraday,ftgmac100";
			reg = <0x1e660000 0x180>;
			interrupts = <2>;
			no-hw-checksum;
			status = "disabled";
		};

		mac1: ethernet@1e680000 {
			compatible = "faraday,ftgmac100";
			reg = <0x1e680000 0x180>;
			interrupts = <3>;
			no-hw-checksum;
			status = "disabled";
		};

		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			clk_clkin: clk_clkin@1e6e2070 {
				#clock-cells = <0>;
				compatible = "aspeed,g5-clkin-clock";
				reg = <0x1e6e2070 0x04>;
			};

			syscon: syscon@1e6e2000 {
				compatible = "aspeed,g5-scu", "syscon", "simple-mfd";
				reg = <0x1e6e2000 0x1a8>;

				pinctrl: pinctrl {
					compatible = "aspeed,g5-pinctrl";
					aspeed,external-nodes = <&gfx &lhc>;

					pinctrl_acpi_default: acpi_default {
						function = "ACPI";
						groups = "ACPI";
					};

					pinctrl_adc0_default: adc0_default {
						function = "ADC0";
						groups = "ADC0";
					};

					pinctrl_adc1_default: adc1_default {
						function = "ADC1";
						groups = "ADC1";
					};

					pinctrl_adc10_default: adc10_default {
						function = "ADC10";
						groups = "ADC10";
					};

					pinctrl_adc11_default: adc11_default {
						function = "ADC11";
						groups = "ADC11";
					};

					pinctrl_adc12_default: adc12_default {
						function = "ADC12";
						groups = "ADC12";
					};

					pinctrl_adc13_default: adc13_default {
						function = "ADC13";
						groups = "ADC13";
					};

					pinctrl_adc14_default: adc14_default {
						function = "ADC14";
						groups = "ADC14";
					};

					pinctrl_adc15_default: adc15_default {
						function = "ADC15";
						groups = "ADC15";
					};

					pinctrl_adc2_default: adc2_default {
						function = "ADC2";
						groups = "ADC2";
					};

					pinctrl_adc3_default: adc3_default {
						function = "ADC3";
						groups = "ADC3";
					};

					pinctrl_adc4_default: adc4_default {
						function = "ADC4";
						groups = "ADC4";
					};

					pinctrl_adc5_default: adc5_default {
						function = "ADC5";
						groups = "ADC5";
					};

					pinctrl_adc6_default: adc6_default {
						function = "ADC6";
						groups = "ADC6";
					};

					pinctrl_adc7_default: adc7_default {
						function = "ADC7";
						groups = "ADC7";
					};

					pinctrl_adc8_default: adc8_default {
						function = "ADC8";
						groups = "ADC8";
					};

					pinctrl_adc9_default: adc9_default {
						function = "ADC9";
						groups = "ADC9";
					};

					pinctrl_bmcint_default: bmcint_default {
						function = "BMCINT";
						groups = "BMCINT";
					};

					pinctrl_ddcclk_default: ddcclk_default {
						function = "DDCCLK";
						groups = "DDCCLK";
					};

					pinctrl_ddcdat_default: ddcdat_default {
						function = "DDCDAT";
						groups = "DDCDAT";
					};

					pinctrl_espi_default: espi_default {
						function = "ESPI";
						groups = "ESPI";
					};

					pinctrl_fwspics1_default: fwspics1_default {
						function = "FWSPICS1";
						groups = "FWSPICS1";
					};

					pinctrl_fwspics2_default: fwspics2_default {
						function = "FWSPICS2";
						groups = "FWSPICS2";
					};

					pinctrl_gpid0_default: gpid0_default {
						function = "GPID0";
						groups = "GPID0";
					};

					pinctrl_gpid2_default: gpid2_default {
						function = "GPID2";
						groups = "GPID2";
					};

					pinctrl_gpid4_default: gpid4_default {
						function = "GPID4";
						groups = "GPID4";
					};

					pinctrl_gpid6_default: gpid6_default {
						function = "GPID6";
						groups = "GPID6";
					};

					pinctrl_gpie0_default: gpie0_default {
						function = "GPIE0";
						groups = "GPIE0";
					};

					pinctrl_gpie2_default: gpie2_default {
						function = "GPIE2";
						groups = "GPIE2";
					};

					pinctrl_gpie4_default: gpie4_default {
						function = "GPIE4";
						groups = "GPIE4";
					};

					pinctrl_gpie6_default: gpie6_default {
						function = "GPIE6";
						groups = "GPIE6";
					};

					pinctrl_i2c10_default: i2c10_default {
						function = "I2C10";
						groups = "I2C10";
					};

					pinctrl_i2c11_default: i2c11_default {
						function = "I2C11";
						groups = "I2C11";
					};

					pinctrl_i2c12_default: i2c12_default {
						function = "I2C12";
						groups = "I2C12";
					};

					pinctrl_i2c13_default: i2c13_default {
						function = "I2C13";
						groups = "I2C13";
					};

					pinctrl_i2c14_default: i2c14_default {
						function = "I2C14";
						groups = "I2C14";
					};

					pinctrl_i2c3_default: i2c3_default {
						function = "I2C3";
						groups = "I2C3";
					};

					pinctrl_i2c4_default: i2c4_default {
						function = "I2C4";
						groups = "I2C4";
					};

					pinctrl_i2c5_default: i2c5_default {
						function = "I2C5";
						groups = "I2C5";
					};

					pinctrl_i2c6_default: i2c6_default {
						function = "I2C6";
						groups = "I2C6";
					};

					pinctrl_i2c7_default: i2c7_default {
						function = "I2C7";
						groups = "I2C7";
					};

					pinctrl_i2c8_default: i2c8_default {
						function = "I2C8";
						groups = "I2C8";
					};

					pinctrl_i2c9_default: i2c9_default {
						function = "I2C9";
						groups = "I2C9";
					};

					pinctrl_lad0_default: lad0_default {
						function = "LAD0";
						groups = "LAD0";
					};

					pinctrl_lad1_default: lad1_default {
						function = "LAD1";
						groups = "LAD1";
					};

					pinctrl_lad2_default: lad2_default {
						function = "LAD2";
						groups = "LAD2";
					};

					pinctrl_lad3_default: lad3_default {
						function = "LAD3";
						groups = "LAD3";
					};

					pinctrl_lclk_default: lclk_default {
						function = "LCLK";
						groups = "LCLK";
					};

					pinctrl_lframe_default: lframe_default {
						function = "LFRAME";
						groups = "LFRAME";
					};

					pinctrl_lpchc_default: lpchc_default {
						function = "LPCHC";
						groups = "LPCHC";
					};

					pinctrl_lpcpd_default: lpcpd_default {
						function = "LPCPD";
						groups = "LPCPD";
					};

					pinctrl_lpcplus_default: lpcplus_default {
						function = "LPCPLUS";
						groups = "LPCPLUS";
					};

					pinctrl_lpcpme_default: lpcpme_default {
						function = "LPCPME";
						groups = "LPCPME";
					};

					pinctrl_lpcrst_default: lpcrst_default {
						function = "LPCRST";
						groups = "LPCRST";
					};

					pinctrl_lpcsmi_default: lpcsmi_default {
						function = "LPCSMI";
						groups = "LPCSMI";
					};

					pinctrl_lsirq_default: lsirq_default {
						function = "LSIRQ";
						groups = "LSIRQ";
					};

					pinctrl_mac1link_default: mac1link_default {
						function = "MAC1LINK";
						groups = "MAC1LINK";
					};

					pinctrl_mac2link_default: mac2link_default {
						function = "MAC2LINK";
						groups = "MAC2LINK";
					};

					pinctrl_mdio1_default: mdio1_default {
						function = "MDIO1";
						groups = "MDIO1";
					};

					pinctrl_mdio2_default: mdio2_default {
						function = "MDIO2";
						groups = "MDIO2";
					};

					pinctrl_ncts1_default: ncts1_default {
						function = "NCTS1";
						groups = "NCTS1";
					};

					pinctrl_ncts2_default: ncts2_default {
						function = "NCTS2";
						groups = "NCTS2";
					};

					pinctrl_ncts3_default: ncts3_default {
						function = "NCTS3";
						groups = "NCTS3";
					};

					pinctrl_ncts4_default: ncts4_default {
						function = "NCTS4";
						groups = "NCTS4";
					};

					pinctrl_ndcd1_default: ndcd1_default {
						function = "NDCD1";
						groups = "NDCD1";
					};

					pinctrl_ndcd2_default: ndcd2_default {
						function = "NDCD2";
						groups = "NDCD2";
					};

					pinctrl_ndcd3_default: ndcd3_default {
						function = "NDCD3";
						groups = "NDCD3";
					};

					pinctrl_ndcd4_default: ndcd4_default {
						function = "NDCD4";
						groups = "NDCD4";
					};

					pinctrl_ndsr1_default: ndsr1_default {
						function = "NDSR1";
						groups = "NDSR1";
					};

					pinctrl_ndsr2_default: ndsr2_default {
						function = "NDSR2";
						groups = "NDSR2";
					};

					pinctrl_ndsr3_default: ndsr3_default {
						function = "NDSR3";
						groups = "NDSR3";
					};

					pinctrl_ndsr4_default: ndsr4_default {
						function = "NDSR4";
						groups = "NDSR4";
					};

					pinctrl_ndtr1_default: ndtr1_default {
						function = "NDTR1";
						groups = "NDTR1";
					};

					pinctrl_ndtr2_default: ndtr2_default {
						function = "NDTR2";
						groups = "NDTR2";
					};

					pinctrl_ndtr3_default: ndtr3_default {
						function = "NDTR3";
						groups = "NDTR3";
					};

					pinctrl_ndtr4_default: ndtr4_default {
						function = "NDTR4";
						groups = "NDTR4";
					};

					pinctrl_nri1_default: nri1_default {
						function = "NRI1";
						groups = "NRI1";
					};

					pinctrl_nri2_default: nri2_default {
						function = "NRI2";
						groups = "NRI2";
					};

					pinctrl_nri3_default: nri3_default {
						function = "NRI3";
						groups = "NRI3";
					};

					pinctrl_nri4_default: nri4_default {
						function = "NRI4";
						groups = "NRI4";
					};

					pinctrl_nrts1_default: nrts1_default {
						function = "NRTS1";
						groups = "NRTS1";
					};

					pinctrl_nrts2_default: nrts2_default {
						function = "NRTS2";
						groups = "NRTS2";
					};

					pinctrl_nrts3_default: nrts3_default {
						function = "NRTS3";
						groups = "NRTS3";
					};

					pinctrl_nrts4_default: nrts4_default {
						function = "NRTS4";
						groups = "NRTS4";
					};

					pinctrl_oscclk_default: oscclk_default {
						function = "OSCCLK";
						groups = "OSCCLK";
					};

					pinctrl_pewake_default: pewake_default {
						function = "PEWAKE";
						groups = "PEWAKE";
					};

					pinctrl_pnor_default: pnor_default {
						function = "PNOR";
						groups = "PNOR";
					};

					pinctrl_pwm0_default: pwm0_default {
						function = "PWM0";
						groups = "PWM0";
					};

					pinctrl_pwm1_default: pwm1_default {
						function = "PWM1";
						groups = "PWM1";
					};

					pinctrl_pwm2_default: pwm2_default {
						function = "PWM2";
						groups = "PWM2";
					};

					pinctrl_pwm3_default: pwm3_default {
						function = "PWM3";
						groups = "PWM3";
					};

					pinctrl_pwm4_default: pwm4_default {
						function = "PWM4";
						groups = "PWM4";
					};

					pinctrl_pwm5_default: pwm5_default {
						function = "PWM5";
						groups = "PWM5";
					};

					pinctrl_pwm6_default: pwm6_default {
						function = "PWM6";
						groups = "PWM6";
					};

					pinctrl_pwm7_default: pwm7_default {
						function = "PWM7";
						groups = "PWM7";
					};

					pinctrl_rgmii1_default: rgmii1_default {
						function = "RGMII1";
						groups = "RGMII1";
					};

					pinctrl_rgmii2_default: rgmii2_default {
						function = "RGMII2";
						groups = "RGMII2";
					};

					pinctrl_rmii1_default: rmii1_default {
						function = "RMII1";
						groups = "RMII1";
					};

					pinctrl_rmii2_default: rmii2_default {
						function = "RMII2";
						groups = "RMII2";
					};

					pinctrl_rxd1_default: rxd1_default {
						function = "RXD1";
						groups = "RXD1";
					};

					pinctrl_rxd2_default: rxd2_default {
						function = "RXD2";
						groups = "RXD2";
					};

					pinctrl_rxd3_default: rxd3_default {
						function = "RXD3";
						groups = "RXD3";
					};

					pinctrl_rxd4_default: rxd4_default {
						function = "RXD4";
						groups = "RXD4";
					};

					pinctrl_salt1_default: salt1_default {
						function = "SALT1";
						groups = "SALT1";
					};

					pinctrl_salt10_default: salt10_default {
						function = "SALT10";
						groups = "SALT10";
					};

					pinctrl_salt11_default: salt11_default {
						function = "SALT11";
						groups = "SALT11";
					};

					pinctrl_salt12_default: salt12_default {
						function = "SALT12";
						groups = "SALT12";
					};

					pinctrl_salt13_default: salt13_default {
						function = "SALT13";
						groups = "SALT13";
					};

					pinctrl_salt14_default: salt14_default {
						function = "SALT14";
						groups = "SALT14";
					};

					pinctrl_salt2_default: salt2_default {
						function = "SALT2";
						groups = "SALT2";
					};

					pinctrl_salt3_default: salt3_default {
						function = "SALT3";
						groups = "SALT3";
					};

					pinctrl_salt4_default: salt4_default {
						function = "SALT4";
						groups = "SALT4";
					};

					pinctrl_salt5_default: salt5_default {
						function = "SALT5";
						groups = "SALT5";
					};

					pinctrl_salt6_default: salt6_default {
						function = "SALT6";
						groups = "SALT6";
					};

					pinctrl_salt7_default: salt7_default {
						function = "SALT7";
						groups = "SALT7";
					};

					pinctrl_salt8_default: salt8_default {
						function = "SALT8";
						groups = "SALT8";
					};

					pinctrl_salt9_default: salt9_default {
						function = "SALT9";
						groups = "SALT9";
					};

					pinctrl_scl1_default: scl1_default {
						function = "SCL1";
						groups = "SCL1";
					};

					pinctrl_scl2_default: scl2_default {
						function = "SCL2";
						groups = "SCL2";
					};

					pinctrl_sd1_default: sd1_default {
						function = "SD1";
						groups = "SD1";
					};

					pinctrl_sd2_default: sd2_default {
						function = "SD2";
						groups = "SD2";
					};

					pinctrl_sda1_default: sda1_default {
						function = "SDA1";
						groups = "SDA1";
					};

					pinctrl_sda2_default: sda2_default {
						function = "SDA2";
						groups = "SDA2";
					};

					pinctrl_sgps1_default: sgps1_default {
						function = "SGPS1";
						groups = "SGPS1";
					};

					pinctrl_sgps2_default: sgps2_default {
						function = "SGPS2";
						groups = "SGPS2";
					};

					pinctrl_sioonctrl_default: sioonctrl_default {
						function = "SIOONCTRL";
						groups = "SIOONCTRL";
					};

					pinctrl_siopbi_default: siopbi_default {
						function = "SIOPBI";
						groups = "SIOPBI";
					};

					pinctrl_siopbo_default: siopbo_default {
						function = "SIOPBO";
						groups = "SIOPBO";
					};

					pinctrl_siopwreq_default: siopwreq_default {
						function = "SIOPWREQ";
						groups = "SIOPWREQ";
					};

					pinctrl_siopwrgd_default: siopwrgd_default {
						function = "SIOPWRGD";
						groups = "SIOPWRGD";
					};

					pinctrl_sios3_default: sios3_default {
						function = "SIOS3";
						groups = "SIOS3";
					};

					pinctrl_sios5_default: sios5_default {
						function = "SIOS5";
						groups = "SIOS5";
					};

					pinctrl_siosci_default: siosci_default {
						function = "SIOSCI";
						groups = "SIOSCI";
					};

					pinctrl_spi1_default: spi1_default {
						function = "SPI1";
						groups = "SPI1";
					};

					pinctrl_spi1cs1_default: spi1cs1_default {
						function = "SPI1CS1";
						groups = "SPI1CS1";
					};

					pinctrl_spi1debug_default: spi1debug_default {
						function = "SPI1DEBUG";
						groups = "SPI1DEBUG";
					};

					pinctrl_spi1passthru_default: spi1passthru_default {
						function = "SPI1PASSTHRU";
						groups = "SPI1PASSTHRU";
					};

					pinctrl_spi2ck_default: spi2ck_default {
						function = "SPI2CK";
						groups = "SPI2CK";
					};

					pinctrl_spi2cs0_default: spi2cs0_default {
						function = "SPI2CS0";
						groups = "SPI2CS0";
					};

					pinctrl_spi2cs1_default: spi2cs1_default {
						function = "SPI2CS1";
						groups = "SPI2CS1";
					};

					pinctrl_spi2miso_default: spi2miso_default {
						function = "SPI2MISO";
						groups = "SPI2MISO";
					};

					pinctrl_spi2mosi_default: spi2mosi_default {
						function = "SPI2MOSI";
						groups = "SPI2MOSI";
					};

					pinctrl_timer3_default: timer3_default {
						function = "TIMER3";
						groups = "TIMER3";
					};

					pinctrl_timer4_default: timer4_default {
						function = "TIMER4";
						groups = "TIMER4";
					};

					pinctrl_timer5_default: timer5_default {
						function = "TIMER5";
						groups = "TIMER5";
					};

					pinctrl_timer6_default: timer6_default {
						function = "TIMER6";
						groups = "TIMER6";
					};

					pinctrl_timer7_default: timer7_default {
						function = "TIMER7";
						groups = "TIMER7";
					};

					pinctrl_timer8_default: timer8_default {
						function = "TIMER8";
						groups = "TIMER8";
					};

					pinctrl_txd1_default: txd1_default {
						function = "TXD1";
						groups = "TXD1";
					};

					pinctrl_txd2_default: txd2_default {
						function = "TXD2";
						groups = "TXD2";
					};

					pinctrl_txd3_default: txd3_default {
						function = "TXD3";
						groups = "TXD3";
					};

					pinctrl_txd4_default: txd4_default {
						function = "TXD4";
						groups = "TXD4";
					};

					pinctrl_uart6_default: uart6_default {
						function = "UART6";
						groups = "UART6";
					};

					pinctrl_usbcki_default: usbcki_default {
						function = "USBCKI";
						groups = "USBCKI";
					};

					pinctrl_vgabiosrom_default: vgabiosrom_default {
						function = "VGABIOSROM";
						groups = "VGABIOSROM";
					};

					pinctrl_vgahs_default: vgahs_default {
						function = "VGAHS";
						groups = "VGAHS";
					};

					pinctrl_vgavs_default: vgavs_default {
						function = "VGAVS";
						groups = "VGAVS";
					};

					pinctrl_vpi24_default: vpi24_default {
						function = "VPI24";
						groups = "VPI24";
					};

					pinctrl_vpo_default: vpo_default {
						function = "VPO";
						groups = "VPO";
					};

					pinctrl_wdtrst1_default: wdtrst1_default {
						function = "WDTRST1";
						groups = "WDTRST1";
					};

					pinctrl_wdtrst2_default: wdtrst2_default {
						function = "WDTRST2";
						groups = "WDTRST2";
					};

				};
			};

			clk_hpll: clk_hpll@1e6e2024 {
				#clock-cells = <0>;
				compatible = "aspeed,g5-hpll-clock";
				reg = <0x1e6e2024 0x4>;
				clocks = <&clk_clkin>;
			};

			clk_ahb: clk_ahb@1e6e2070 {
				#clock-cells = <0>;
				compatible = "aspeed,g5-ahb-clock";
				reg = <0x1e6e2070 0x4>;
				clocks = <&clk_hpll>;
			};

			clk_apb: clk_apb@1e6e2008 {
				#clock-cells = <0>;
				compatible = "aspeed,g5-apb-clock";
				reg = <0x1e6e2008 0x4>;
				clocks = <&clk_hpll>;
			};

			clk_uart: clk_uart@1e6e2008 {
				#clock-cells = <0>;
				compatible = "aspeed,uart-clock";
				reg = <0x1e6e202c 0x4>;
			};

			gfx: display@1e6e6000 {
				compatible = "aspeed,ast2500-gfx", "syscon";
				reg = <0x1e6e6000 0x1000>;
				reg-io-width = <4>;
			};

			sram@1e720000 {
				compatible = "mmio-sram";
				reg = <0x1e720000 0x9000>;	// 36K
			};

			gpio: gpio@1e780000 {
				#gpio-cells = <2>;
				gpio-controller;
				compatible = "aspeed,ast2500-gpio";
				reg = <0x1e780000 0x1000>;
				interrupts = <20>;
				gpio-ranges = <&pinctrl 0 0 220>;
				interrupt-controller;
			};

			timer: timer@1e782000 {
				compatible = "aspeed,ast2400-timer";
				reg = <0x1e782000 0x90>;
				// The moxart_timer driver registers only one
				// interrupt and assumes it's for timer 1
				//interrupts = <16 17 18 35 36 37 38 39>;
				interrupts = <16>;
				clocks = <&clk_apb>;
			};


			wdt1: wdt@1e785000 {
				compatible = "aspeed,wdt";
				reg = <0x1e785000 0x1c>;
				interrupts = <27>;
			};

			wdt2: wdt@1e785020 {
				compatible = "aspeed,wdt";
				reg = <0x1e785020 0x1c>;
				interrupts = <27>;
				status = "disabled";
			};

			wdt3: wdt@1e785040 {
				compatible = "aspeed,wdt";
				reg = <0x1e785074 0x1c>;
				status = "disabled";
			};

			uart1: serial@1e783000 {
				compatible = "ns16550a";
				reg = <0x1e783000 0x1000>;
				reg-shift = <2>;
				interrupts = <9>;
				clocks = <&clk_uart>;
				no-loopback-test;
				status = "disabled";
			};

			lpc: lpc@1e789000 {
				compatible = "aspeed,ast2500-lpc", "simple-mfd";
				reg = <0x1e789000 0x1000>;

				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x1e789000 0x1000>;

				lpc_bmc: lpc-bmc@0 {
					compatible = "aspeed,ast2500-lpc-bmc";
					reg = <0x0 0x80>;
				};

				lpc_host: lpc-host@80 {
					compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
					reg = <0x80 0x1e0>;

					#address-cells = <1>;
					#size-cells = <1>;
					ranges = <0 0x80 0x1e0>;

					reg-io-width = <4>;

					lhc: lhc@20 {
						compatible = "aspeed,ast2500-lhc";
						reg = <0x20 0x24 0x48 0x8>;
					};
				};
			};

			uart2: serial@1e78d000 {
				compatible = "ns16550a";
				reg = <0x1e78d000 0x1000>;
				reg-shift = <2>;
				interrupts = <32>;
				clocks = <&clk_uart>;
				no-loopback-test;
				status = "disabled";
			};

			uart3: serial@1e78e000 {
				compatible = "ns16550a";
				reg = <0x1e78e000 0x1000>;
				reg-shift = <2>;
				interrupts = <33>;
				clocks = <&clk_uart>;
				no-loopback-test;
				status = "disabled";
			};

			uart4: serial@1e78f000 {
				compatible = "ns16550a";
				reg = <0x1e78f000 0x1000>;
				reg-shift = <2>;
				interrupts = <34>;
				clocks = <&clk_uart>;
				no-loopback-test;
				status = "disabled";
			};

			uart5: serial@1e784000 {
				compatible = "ns16550a";
				reg = <0x1e784000 0x1000>;
				reg-shift = <2>;
				interrupts = <10>;
				clocks = <&clk_uart>;
				current-speed = <38400>;
				no-loopback-test;
				status = "disabled";
			};

			uart6: serial@1e787000 {
				compatible = "ns16550a";
				reg = <0x1e787000 0x1000>;
				reg-shift = <2>;
				interrupts = <10>;
				clocks = <&clk_uart>;
				no-loopback-test;
				status = "disabled";
			};
		};
	};
};
Commit	Line	Data
14e4b149	1	/*
14e4b149	2	* This device tree is copied from
17c5fb19	3	* https://raw.githubusercontent.com/torvalds/linux/34ea5c9d/arch/arm/boot/dts/aspeed-g5.dtsi
14e4b149	4	*/
	5	#include "skeleton.dtsi"
	6
	7	/ {
	8	model = "Aspeed BMC";
	9	compatible = "aspeed,ast2500";
	10	#address-cells = <1>;
	11	#size-cells = <1>;
	12	interrupt-parent = <&vic>;
	13
	14	cpus {
	15	#address-cells = <1>;
	16	#size-cells = <0>;
	17
	18	cpu@0 {
	19	compatible = "arm,arm1176jzf-s";
	20	device_type = "cpu";
	21	reg = <0>;
	22	};
	23	};
	24
	25	ahb {
	26	compatible = "simple-bus";
	27	#address-cells = <1>;
	28	#size-cells = <1>;
	29	ranges;
	30
	31	vic: interrupt-controller@1e6c0080 {
	32	compatible = "aspeed,ast2400-vic";
	33	interrupt-controller;
	34	#interrupt-cells = <1>;
	35	valid-sources = <0xfefff7ff 0x0807ffff>;
	36	reg = <0x1e6c0080 0x80>;
	37	};
	38
17c5fb19	39	mac0: ethernet@1e660000 {
	40	compatible = "faraday,ftgmac100";
	41	reg = <0x1e660000 0x180>;
	42	interrupts = <2>;
	43	no-hw-checksum;
	44	status = "disabled";
	45	};
	46
	47	mac1: ethernet@1e680000 {
	48	compatible = "faraday,ftgmac100";
	49	reg = <0x1e680000 0x180>;
	50	interrupts = <3>;
	51	no-hw-checksum;
	52	status = "disabled";
	53	};
	54
14e4b149	55	apb {
	56	compatible = "simple-bus";
	57	#address-cells = <1>;
	58	#size-cells = <1>;
	59	ranges;
	60
	61	clk_clkin: clk_clkin@1e6e2070 {
	62	#clock-cells = <0>;
	63	compatible = "aspeed,g5-clkin-clock";
	64	reg = <0x1e6e2070 0x04>;
	65	};
	66
17c5fb19	67	syscon: syscon@1e6e2000 {
	68	compatible = "aspeed,g5-scu", "syscon", "simple-mfd";
	69	reg = <0x1e6e2000 0x1a8>;
	70
	71	pinctrl: pinctrl {
	72	compatible = "aspeed,g5-pinctrl";
	73	aspeed,external-nodes = <&gfx &lhc>;
	74
	75	pinctrl_acpi_default: acpi_default {
	76	function = "ACPI";
	77	groups = "ACPI";
	78	};
	79
	80	pinctrl_adc0_default: adc0_default {
	81	function = "ADC0";
	82	groups = "ADC0";
	83	};
	84
	85	pinctrl_adc1_default: adc1_default {
	86	function = "ADC1";
	87	groups = "ADC1";
	88	};
	89
	90	pinctrl_adc10_default: adc10_default {
	91	function = "ADC10";
	92	groups = "ADC10";
	93	};
	94
	95	pinctrl_adc11_default: adc11_default {
	96	function = "ADC11";
	97	groups = "ADC11";
	98	};
	99
	100	pinctrl_adc12_default: adc12_default {
	101	function = "ADC12";
	102	groups = "ADC12";
	103	};
	104
	105	pinctrl_adc13_default: adc13_default {
	106	function = "ADC13";
	107	groups = "ADC13";
	108	};
	109
	110	pinctrl_adc14_default: adc14_default {
	111	function = "ADC14";
	112	groups = "ADC14";
	113	};
	114
	115	pinctrl_adc15_default: adc15_default {
	116	function = "ADC15";
	117	groups = "ADC15";
	118	};
	119
	120	pinctrl_adc2_default: adc2_default {
	121	function = "ADC2";
	122	groups = "ADC2";
	123	};
	124
	125	pinctrl_adc3_default: adc3_default {
	126	function = "ADC3";
	127	groups = "ADC3";
	128	};
	129
	130	pinctrl_adc4_default: adc4_default {
131	function = "ADC4";
132	groups = "ADC4";
133	};
134
135	pinctrl_adc5_default: adc5_default {
136	function = "ADC5";
137	groups = "ADC5";
138	};
139
140	pinctrl_adc6_default: adc6_default {
141	function = "ADC6";
142	groups = "ADC6";
143	};
144
145	pinctrl_adc7_default: adc7_default {
146	function = "ADC7";
147	groups = "ADC7";
148	};
149
150	pinctrl_adc8_default: adc8_default {
151	function = "ADC8";
152	groups = "ADC8";
153	};
154
155	pinctrl_adc9_default: adc9_default {
156	function = "ADC9";
157	groups = "ADC9";
158	};
159
160	pinctrl_bmcint_default: bmcint_default {
161	function = "BMCINT";
162	groups = "BMCINT";
163	};
164
165	pinctrl_ddcclk_default: ddcclk_default {
166	function = "DDCCLK";
167	groups = "DDCCLK";
168	};
169
170	pinctrl_ddcdat_default: ddcdat_default {
171	function = "DDCDAT";
172	groups = "DDCDAT";
173	};
174
175	pinctrl_espi_default: espi_default {
176	function = "ESPI";
177	groups = "ESPI";
178	};
179
180	pinctrl_fwspics1_default: fwspics1_default {
181	function = "FWSPICS1";
182	groups = "FWSPICS1";
183	};
184
185	pinctrl_fwspics2_default: fwspics2_default {
186	function = "FWSPICS2";
187	groups = "FWSPICS2";
188	};
189
190	pinctrl_gpid0_default: gpid0_default {
191	function = "GPID0";
192	groups = "GPID0";
193	};
194
195	pinctrl_gpid2_default: gpid2_default {
196	function = "GPID2";
197	groups = "GPID2";
198	};
199
200	pinctrl_gpid4_default: gpid4_default {
201	function = "GPID4";
202	groups = "GPID4";
203	};
204
205	pinctrl_gpid6_default: gpid6_default {
206	function = "GPID6";
207	groups = "GPID6";
208	};
209
210	pinctrl_gpie0_default: gpie0_default {
211	function = "GPIE0";
212	groups = "GPIE0";
213	};
214
215	pinctrl_gpie2_default: gpie2_default {
216	function = "GPIE2";
217	groups = "GPIE2";
218	};
219
220	pinctrl_gpie4_default: gpie4_default {
221	function = "GPIE4";
222	groups = "GPIE4";
223	};
224
225	pinctrl_gpie6_default: gpie6_default {
226	function = "GPIE6";
227	groups = "GPIE6";
228	};
229
230	pinctrl_i2c10_default: i2c10_default {
231	function = "I2C10";
232	groups = "I2C10";
233	};
234
235	pinctrl_i2c11_default: i2c11_default {
236	function = "I2C11";
237	groups = "I2C11";
238	};
239
240	pinctrl_i2c12_default: i2c12_default {
241	function = "I2C12";
242	groups = "I2C12";
243	};
244
245	pinctrl_i2c13_default: i2c13_default {
246	function = "I2C13";
247	groups = "I2C13";
248	};
249
250	pinctrl_i2c14_default: i2c14_default {
251	function = "I2C14";
252	groups = "I2C14";
253	};
254
255	pinctrl_i2c3_default: i2c3_default {
256	function = "I2C3";
257	groups = "I2C3";
258	};
259
260	pinctrl_i2c4_default: i2c4_default {
261	function = "I2C4";
262	groups = "I2C4";
263	};
264
265	pinctrl_i2c5_default: i2c5_default {
266	function = "I2C5";
267	groups = "I2C5";
268	};
269
270	pinctrl_i2c6_default: i2c6_default {
271	function = "I2C6";
272	groups = "I2C6";
273	};
274
275	pinctrl_i2c7_default: i2c7_default {
276	function = "I2C7";
277	groups = "I2C7";
278	};
279
280	pinctrl_i2c8_default: i2c8_default {
281	function = "I2C8";
282	groups = "I2C8";
283	};
284
285	pinctrl_i2c9_default: i2c9_default {
286	function = "I2C9";
287	groups = "I2C9";
288	};
289
290	pinctrl_lad0_default: lad0_default {
291	function = "LAD0";
292	groups = "LAD0";
293	};
294
295	pinctrl_lad1_default: lad1_default {
296	function = "LAD1";
297	groups = "LAD1";
298	};
299
300	pinctrl_lad2_default: lad2_default {
301	function = "LAD2";
302	groups = "LAD2";
303	};
304
305	pinctrl_lad3_default: lad3_default {
306	function = "LAD3";
307	groups = "LAD3";
308	};
309
310	pinctrl_lclk_default: lclk_default {
311	function = "LCLK";
312	groups = "LCLK";
313	};
314
315	pinctrl_lframe_default: lframe_default {
316	function = "LFRAME";
317	groups = "LFRAME";
318	};
319
320	pinctrl_lpchc_default: lpchc_default {
321	function = "LPCHC";
322	groups = "LPCHC";
323	};
324
325	pinctrl_lpcpd_default: lpcpd_default {
326	function = "LPCPD";
327	groups = "LPCPD";
328	};
329
330	pinctrl_lpcplus_default: lpcplus_default {
331	function = "LPCPLUS";
332	groups = "LPCPLUS";
333	};
334
335	pinctrl_lpcpme_default: lpcpme_default {
336	function = "LPCPME";
337	groups = "LPCPME";
338	};
339
340	pinctrl_lpcrst_default: lpcrst_default {
341	function = "LPCRST";
342	groups = "LPCRST";
343	};
344
345	pinctrl_lpcsmi_default: lpcsmi_default {
346	function = "LPCSMI";
347	groups = "LPCSMI";
348	};
349
350	pinctrl_lsirq_default: lsirq_default {
351	function = "LSIRQ";
352	groups = "LSIRQ";
353	};
354
355	pinctrl_mac1link_default: mac1link_default {
356	function = "MAC1LINK";
357	groups = "MAC1LINK";
358	};
359
360	pinctrl_mac2link_default: mac2link_default {
361	function = "MAC2LINK";
362	groups = "MAC2LINK";
363	};
364
365	pinctrl_mdio1_default: mdio1_default {
366	function = "MDIO1";
367	groups = "MDIO1";
368	};
369
370	pinctrl_mdio2_default: mdio2_default {
371	function = "MDIO2";
372	groups = "MDIO2";
373	};
374
375	pinctrl_ncts1_default: ncts1_default {
376	function = "NCTS1";
377	groups = "NCTS1";
378	};
379
380	pinctrl_ncts2_default: ncts2_default {
381	function = "NCTS2";
382	groups = "NCTS2";
383	};
384
385	pinctrl_ncts3_default: ncts3_default {
386	function = "NCTS3";
387	groups = "NCTS3";
388	};
389
390	pinctrl_ncts4_default: ncts4_default {
391	function = "NCTS4";
392	groups = "NCTS4";
393	};
394
395	pinctrl_ndcd1_default: ndcd1_default {
396	function = "NDCD1";
397	groups = "NDCD1";
398	};
399
400	pinctrl_ndcd2_default: ndcd2_default {
401	function = "NDCD2";
402	groups = "NDCD2";
403	};
404
405	pinctrl_ndcd3_default: ndcd3_default {
406	function = "NDCD3";
407	groups = "NDCD3";
408	};
409
410	pinctrl_ndcd4_default: ndcd4_default {
411	function = "NDCD4";
412	groups = "NDCD4";
413	};
414
415	pinctrl_ndsr1_default: ndsr1_default {
416	function = "NDSR1";
417	groups = "NDSR1";
418	};
419
420	pinctrl_ndsr2_default: ndsr2_default {
421	function = "NDSR2";
422	groups = "NDSR2";
423	};
424
425	pinctrl_ndsr3_default: ndsr3_default {
426	function = "NDSR3";
427	groups = "NDSR3";
428	};
429
430	pinctrl_ndsr4_default: ndsr4_default {
431	function = "NDSR4";
432	groups = "NDSR4";
433	};
434
435	pinctrl_ndtr1_default: ndtr1_default {
436	function = "NDTR1";
437	groups = "NDTR1";
438	};
439
440	pinctrl_ndtr2_default: ndtr2_default {
441	function = "NDTR2";
442	groups = "NDTR2";
443	};
444
445	pinctrl_ndtr3_default: ndtr3_default {
446	function = "NDTR3";
447	groups = "NDTR3";
448	};
449
450	pinctrl_ndtr4_default: ndtr4_default {
451	function = "NDTR4";
452	groups = "NDTR4";
453	};
454
455	pinctrl_nri1_default: nri1_default {
456	function = "NRI1";
457	groups = "NRI1";
458	};
459
460	pinctrl_nri2_default: nri2_default {
461	function = "NRI2";
462	groups = "NRI2";
463	};
464
465	pinctrl_nri3_default: nri3_default {
466	function = "NRI3";
467	groups = "NRI3";
468	};
469
470	pinctrl_nri4_default: nri4_default {
471	function = "NRI4";
472	groups = "NRI4";
473	};
474
475	pinctrl_nrts1_default: nrts1_default {
476	function = "NRTS1";
477	groups = "NRTS1";
478	};
479
480	pinctrl_nrts2_default: nrts2_default {
481	function = "NRTS2";
482	groups = "NRTS2";
483	};
484
485	pinctrl_nrts3_default: nrts3_default {
486	function = "NRTS3";
487	groups = "NRTS3";
488	};
489
490	pinctrl_nrts4_default: nrts4_default {
491	function = "NRTS4";
492	groups = "NRTS4";
493	};
494
495	pinctrl_oscclk_default: oscclk_default {
496	function = "OSCCLK";
497	groups = "OSCCLK";
498	};
499
500	pinctrl_pewake_default: pewake_default {
501	function = "PEWAKE";
502	groups = "PEWAKE";
503	};
504
505	pinctrl_pnor_default: pnor_default {
506	function = "PNOR";
507	groups = "PNOR";
508	};
509
510	pinctrl_pwm0_default: pwm0_default {
511	function = "PWM0";
512	groups = "PWM0";
513	};
514
515	pinctrl_pwm1_default: pwm1_default {
516	function = "PWM1";
517	groups = "PWM1";
518	};
519
520	pinctrl_pwm2_default: pwm2_default {
521	function = "PWM2";
522	groups = "PWM2";
523	};
524
525	pinctrl_pwm3_default: pwm3_default {
526	function = "PWM3";
527	groups = "PWM3";
528	};
529
530	pinctrl_pwm4_default: pwm4_default {
531	function = "PWM4";
532	groups = "PWM4";
533	};
534
535	pinctrl_pwm5_default: pwm5_default {
536	function = "PWM5";
537	groups = "PWM5";
538	};
539
540	pinctrl_pwm6_default: pwm6_default {
541	function = "PWM6";
542	groups = "PWM6";
543	};
544
545	pinctrl_pwm7_default: pwm7_default {
546	function = "PWM7";
547	groups = "PWM7";
548	};
549
550	pinctrl_rgmii1_default: rgmii1_default {
551	function = "RGMII1";
552	groups = "RGMII1";
553	};
554
555	pinctrl_rgmii2_default: rgmii2_default {
556	function = "RGMII2";
557	groups = "RGMII2";
558	};
559
560	pinctrl_rmii1_default: rmii1_default {
561	function = "RMII1";
562	groups = "RMII1";
563	};
564
565	pinctrl_rmii2_default: rmii2_default {
566	function = "RMII2";
567	groups = "RMII2";
568	};
569
570	pinctrl_rxd1_default: rxd1_default {
571	function = "RXD1";
572	groups = "RXD1";
573	};
574
575	pinctrl_rxd2_default: rxd2_default {
576	function = "RXD2";
577	groups = "RXD2";
578	};
579
580	pinctrl_rxd3_default: rxd3_default {
581	function = "RXD3";
582	groups = "RXD3";
583	};
584
585	pinctrl_rxd4_default: rxd4_default {
586	function = "RXD4";
587	groups = "RXD4";
588	};
589
590	pinctrl_salt1_default: salt1_default {
591	function = "SALT1";
592	groups = "SALT1";
593	};
594
595	pinctrl_salt10_default: salt10_default {
596	function = "SALT10";
597	groups = "SALT10";
598	};
599
600	pinctrl_salt11_default: salt11_default {
601	function = "SALT11";
602	groups = "SALT11";
603	};
604
605	pinctrl_salt12_default: salt12_default {
606	function = "SALT12";
607	groups = "SALT12";
608	};
609
610	pinctrl_salt13_default: salt13_default {
611	function = "SALT13";
612	groups = "SALT13";
613	};
614
615	pinctrl_salt14_default: salt14_default {
616	function = "SALT14";
617	groups = "SALT14";
618	};
619
620	pinctrl_salt2_default: salt2_default {
621	function = "SALT2";
622	groups = "SALT2";
623	};
624
625	pinctrl_salt3_default: salt3_default {
626	function = "SALT3";
627	groups = "SALT3";
628	};
629
630	pinctrl_salt4_default: salt4_default {
631	function = "SALT4";
632	groups = "SALT4";
633	};
634
635	pinctrl_salt5_default: salt5_default {
636	function = "SALT5";
637	groups = "SALT5";
638	};
639
640	pinctrl_salt6_default: salt6_default {
641	function = "SALT6";
642	groups = "SALT6";
643	};
644
645	pinctrl_salt7_default: salt7_default {
646	function = "SALT7";
647	groups = "SALT7";
648	};
649
650	pinctrl_salt8_default: salt8_default {
651	function = "SALT8";
652	groups = "SALT8";
653	};
654
655	pinctrl_salt9_default: salt9_default {
656	function = "SALT9";
657	groups = "SALT9";
658	};
659
660	pinctrl_scl1_default: scl1_default {
661	function = "SCL1";
662	groups = "SCL1";
663	};
664
665	pinctrl_scl2_default: scl2_default {
666	function = "SCL2";
667	groups = "SCL2";
668	};
669
670	pinctrl_sd1_default: sd1_default {
671	function = "SD1";
672	groups = "SD1";
673	};
674
675	pinctrl_sd2_default: sd2_default {
676	function = "SD2";
677	groups = "SD2";
678	};
679
680	pinctrl_sda1_default: sda1_default {
681	function = "SDA1";
682	groups = "SDA1";
683	};
684
685	pinctrl_sda2_default: sda2_default {
686	function = "SDA2";
687	groups = "SDA2";
688	};
689
690	pinctrl_sgps1_default: sgps1_default {
691	function = "SGPS1";
692	groups = "SGPS1";
693	};
694
695	pinctrl_sgps2_default: sgps2_default {
696	function = "SGPS2";
697	groups = "SGPS2";
698	};
699
700	pinctrl_sioonctrl_default: sioonctrl_default {
701	function = "SIOONCTRL";
702	groups = "SIOONCTRL";
703	};
704
705	pinctrl_siopbi_default: siopbi_default {
706	function = "SIOPBI";
707	groups = "SIOPBI";
708	};
709
710	pinctrl_siopbo_default: siopbo_default {
711	function = "SIOPBO";
712	groups = "SIOPBO";
713	};
714
715	pinctrl_siopwreq_default: siopwreq_default {
716	function = "SIOPWREQ";
717	groups = "SIOPWREQ";
718	};
719
720	pinctrl_siopwrgd_default: siopwrgd_default {
721	function = "SIOPWRGD";
722	groups = "SIOPWRGD";
723	};
724
725	pinctrl_sios3_default: sios3_default {
726	function = "SIOS3";
727	groups = "SIOS3";
728	};
729
730	pinctrl_sios5_default: sios5_default {
731	function = "SIOS5";
732	groups = "SIOS5";
733	};
734
735	pinctrl_siosci_default: siosci_default {
736	function = "SIOSCI";
737	groups = "SIOSCI";
738	};
739
740	pinctrl_spi1_default: spi1_default {
741	function = "SPI1";
742	groups = "SPI1";
743	};
744
745	pinctrl_spi1cs1_default: spi1cs1_default {
746	function = "SPI1CS1";
747	groups = "SPI1CS1";
748	};
749
750	pinctrl_spi1debug_default: spi1debug_default {
751	function = "SPI1DEBUG";
752	groups = "SPI1DEBUG";
753	};
754
755	pinctrl_spi1passthru_default: spi1passthru_default {
756	function = "SPI1PASSTHRU";
757	groups = "SPI1PASSTHRU";
758	};
759
760	pinctrl_spi2ck_default: spi2ck_default {
761	function = "SPI2CK";
762	groups = "SPI2CK";
763	};
764
765	pinctrl_spi2cs0_default: spi2cs0_default {
766	function = "SPI2CS0";
767	groups = "SPI2CS0";
768	};
769
770	pinctrl_spi2cs1_default: spi2cs1_default {
771	function = "SPI2CS1";
772	groups = "SPI2CS1";
773	};
774
775	pinctrl_spi2miso_default: spi2miso_default {
776	function = "SPI2MISO";
777	groups = "SPI2MISO";
778	};
779
780	pinctrl_spi2mosi_default: spi2mosi_default {
781	function = "SPI2MOSI";
782	groups = "SPI2MOSI";
783	};
784
785	pinctrl_timer3_default: timer3_default {
786	function = "TIMER3";
787	groups = "TIMER3";
788	};
789
790	pinctrl_timer4_default: timer4_default {
791	function = "TIMER4";
792	groups = "TIMER4";
793	};
794
795	pinctrl_timer5_default: timer5_default {
796	function = "TIMER5";
797	groups = "TIMER5";
798	};
799
800	pinctrl_timer6_default: timer6_default {
801	function = "TIMER6";
802	groups = "TIMER6";
803	};
804
805	pinctrl_timer7_default: timer7_default {
806	function = "TIMER7";
807	groups = "TIMER7";
808	};
809
810	pinctrl_timer8_default: timer8_default {
811	function = "TIMER8";
812	groups = "TIMER8";
813	};
814
815	pinctrl_txd1_default: txd1_default {
816	function = "TXD1";
817	groups = "TXD1";
818	};
819
820	pinctrl_txd2_default: txd2_default {
821	function = "TXD2";
822	groups = "TXD2";
823	};
824
825	pinctrl_txd3_default: txd3_default {
826	function = "TXD3";
827	groups = "TXD3";
828	};
829
830	pinctrl_txd4_default: txd4_default {
831	function = "TXD4";
832	groups = "TXD4";
833	};
834
835	pinctrl_uart6_default: uart6_default {
836	function = "UART6";
837	groups = "UART6";
838	};
839
840	pinctrl_usbcki_default: usbcki_default {
841	function = "USBCKI";
842	groups = "USBCKI";
843	};
844
845	pinctrl_vgabiosrom_default: vgabiosrom_default {
846	function = "VGABIOSROM";
847	groups = "VGABIOSROM";
848	};
849
850	pinctrl_vgahs_default: vgahs_default {
851	function = "VGAHS";
852	groups = "VGAHS";
853	};
854
855	pinctrl_vgavs_default: vgavs_default {
856	function = "VGAVS";
857	groups = "VGAVS";
858	};
859
860	pinctrl_vpi24_default: vpi24_default {
861	function = "VPI24";
862	groups = "VPI24";
863	};
864
865	pinctrl_vpo_default: vpo_default {
866	function = "VPO";
867	groups = "VPO";
868	};
869
870	pinctrl_wdtrst1_default: wdtrst1_default {
871	function = "WDTRST1";
872	groups = "WDTRST1";
873	};
874
875	pinctrl_wdtrst2_default: wdtrst2_default {
876	function = "WDTRST2";
877	groups = "WDTRST2";
878	};
879
880	};
881	};
882
14e4b149	883	clk_hpll: clk_hpll@1e6e2024 {
	884	#clock-cells = <0>;
	885	compatible = "aspeed,g5-hpll-clock";
	886	reg = <0x1e6e2024 0x4>;
	887	clocks = <&clk_clkin>;
	888	};
	889
	890	clk_ahb: clk_ahb@1e6e2070 {
	891	#clock-cells = <0>;
	892	compatible = "aspeed,g5-ahb-clock";
	893	reg = <0x1e6e2070 0x4>;
	894	clocks = <&clk_hpll>;
	895	};
	896
	897	clk_apb: clk_apb@1e6e2008 {
	898	#clock-cells = <0>;
	899	compatible = "aspeed,g5-apb-clock";
	900	reg = <0x1e6e2008 0x4>;
	901	clocks = <&clk_hpll>;
	902	};
	903
	904	clk_uart: clk_uart@1e6e2008 {
	905	#clock-cells = <0>;
	906	compatible = "aspeed,uart-clock";
	907	reg = <0x1e6e202c 0x4>;
	908	};
	909
17c5fb19	910	gfx: display@1e6e6000 {
	911	compatible = "aspeed,ast2500-gfx", "syscon";
	912	reg = <0x1e6e6000 0x1000>;
	913	reg-io-width = <4>;
	914	};
	915
14e4b149	916	sram@1e720000 {
	917	compatible = "mmio-sram";
	918	reg = <0x1e720000 0x9000>; // 36K
	919	};
	920
17c5fb19	921	gpio: gpio@1e780000 {
	922	#gpio-cells = <2>;
	923	gpio-controller;
	924	compatible = "aspeed,ast2500-gpio";
	925	reg = <0x1e780000 0x1000>;
	926	interrupts = <20>;
	927	gpio-ranges = <&pinctrl 0 0 220>;
	928	interrupt-controller;
	929	};
	930
14e4b149	931	timer: timer@1e782000 {
	932	compatible = "aspeed,ast2400-timer";
	933	reg = <0x1e782000 0x90>;
	934	// The moxart_timer driver registers only one
	935	// interrupt and assumes it's for timer 1
	936	//interrupts = <16 17 18 35 36 37 38 39>;
	937	interrupts = <16>;
	938	clocks = <&clk_apb>;
	939	};
	940
17c5fb19	941
14e4b149	942	wdt1: wdt@1e785000 {
	943	compatible = "aspeed,wdt";
	944	reg = <0x1e785000 0x1c>;
	945	interrupts = <27>;
	946	};
	947
	948	wdt2: wdt@1e785020 {
	949	compatible = "aspeed,wdt";
	950	reg = <0x1e785020 0x1c>;
	951	interrupts = <27>;
	952	status = "disabled";
	953	};
	954
	955	wdt3: wdt@1e785040 {
	956	compatible = "aspeed,wdt";
	957	reg = <0x1e785074 0x1c>;
	958	status = "disabled";
	959	};
	960
	961	uart1: serial@1e783000 {
	962	compatible = "ns16550a";
	963	reg = <0x1e783000 0x1000>;
	964	reg-shift = <2>;
	965	interrupts = <9>;
	966	clocks = <&clk_uart>;
	967	no-loopback-test;
	968	status = "disabled";
	969	};
	970
17c5fb19	971	lpc: lpc@1e789000 {
	972	compatible = "aspeed,ast2500-lpc", "simple-mfd";
	973	reg = <0x1e789000 0x1000>;
	974
	975	#address-cells = <1>;
	976	#size-cells = <1>;
	977	ranges = <0 0x1e789000 0x1000>;
	978
	979	lpc_bmc: lpc-bmc@0 {
	980	compatible = "aspeed,ast2500-lpc-bmc";
	981	reg = <0x0 0x80>;
	982	};
	983
	984	lpc_host: lpc-host@80 {
	985	compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
	986	reg = <0x80 0x1e0>;
	987
	988	#address-cells = <1>;
	989	#size-cells = <1>;
	990	ranges = <0 0x80 0x1e0>;
	991
	992	reg-io-width = <4>;
	993
	994	lhc: lhc@20 {
	995	compatible = "aspeed,ast2500-lhc";
	996	reg = <0x20 0x24 0x48 0x8>;
	997	};
	998	};
	999	};
	1000
14e4b149	1001	uart2: serial@1e78d000 {
	1002	compatible = "ns16550a";
	1003	reg = <0x1e78d000 0x1000>;
	1004	reg-shift = <2>;
	1005	interrupts = <32>;
	1006	clocks = <&clk_uart>;
	1007	no-loopback-test;
	1008	status = "disabled";
	1009	};
	1010
	1011	uart3: serial@1e78e000 {
	1012	compatible = "ns16550a";
	1013	reg = <0x1e78e000 0x1000>;
	1014	reg-shift = <2>;
	1015	interrupts = <33>;
	1016	clocks = <&clk_uart>;
	1017	no-loopback-test;
	1018	status = "disabled";
	1019	};
	1020
	1021	uart4: serial@1e78f000 {
	1022	compatible = "ns16550a";
	1023	reg = <0x1e78f000 0x1000>;
	1024	reg-shift = <2>;
	1025	interrupts = <34>;
	1026	clocks = <&clk_uart>;
	1027	no-loopback-test;
	1028	status = "disabled";
	1029	};
	1030
	1031	uart5: serial@1e784000 {
	1032	compatible = "ns16550a";
	1033	reg = <0x1e784000 0x1000>;
	1034	reg-shift = <2>;
	1035	interrupts = <10>;
	1036	clocks = <&clk_uart>;
	1037	current-speed = <38400>;
	1038	no-loopback-test;
	1039	status = "disabled";
	1040	};
	1041
	1042	uart6: serial@1e787000 {
	1043	compatible = "ns16550a";
	1044	reg = <0x1e787000 0x1000>;
	1045	reg-shift = <2>;
	1046	interrupts = <10>;
	1047	clocks = <&clk_uart>;
	1048	no-loopback-test;
	1049	status = "disabled";
	1050	};
	1051	};
	1052	};
	1053	};