[people/ms/u-boot.git] / arch / arm / dts / fsl-ls1046a-qds.dtsi

/*
 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
 *
 * Copyright (C) 2016, Freescale Semiconductor
 *
 * Mingkai Hu <Mingkai.hu@nxp.com>
 *
 * SPDX-License-Identifier:    GPL-2.0+	X11
 */

/include/ "fsl-ls1046a.dtsi"

/ {
	model = "LS1046A QDS Board";
	aliases {
		spi0 = &qspi;
		spi1 = &dspi0;
	};
};

&dspi0 {
	bus-num = <0>;
	status = "okay";

	dflash0: n25q128a {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "spi-flash";
		spi-max-frequency = <1000000>; /* input clock */
		spi-cpol;
		spi-cpha;
		reg = <0>;
	};

	dflash1: sst25wf040b {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "spi-flash";
		spi-max-frequency = <3500000>;
		spi-cpol;
		spi-cpha;
		reg = <1>;
	};

	dflash2: en25s64 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "spi-flash";
		spi-max-frequency = <3500000>;
		spi-cpol;
		spi-cpha;
		reg = <2>;
	};
};

&qspi {
	bus-num = <0>;
	status = "okay";

	qflash0: s25fl128s@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "spi-flash";
		spi-max-frequency = <20000000>;
		reg = <0>;
	};
};

&duart0 {
	status = "okay";
};

&duart1 {
	status = "okay";
};

&lpuart0 {
	status = "okay";
};
Commit	Line	Data
126fe70d SX	1	/*
	2	* Device Tree Include file for Freescale Layerscape-1046A family SoC.
	3	*
	4	* Copyright (C) 2016, Freescale Semiconductor
	5	*
	6	* Mingkai Hu <Mingkai.hu@nxp.com>
	7	*
6d48d1c4	8	* SPDX-License-Identifier: GPL-2.0+ X11
126fe70d SX	9	*/
	10
	11	/include/ "fsl-ls1046a.dtsi"
	12
	13	/ {
	14	model = "LS1046A QDS Board";
	15	aliases {
	16	spi0 = &qspi;
	17	spi1 = &dspi0;
	18	};
	19	};
	20
	21	&dspi0 {
	22	bus-num = <0>;
	23	status = "okay";
	24
	25	dflash0: n25q128a {
	26	#address-cells = <1>;
	27	#size-cells = <1>;
	28	compatible = "spi-flash";
	29	spi-max-frequency = <1000000>; /* input clock */
	30	spi-cpol;
	31	spi-cpha;
	32	reg = <0>;
	33	};
	34
	35	dflash1: sst25wf040b {
	36	#address-cells = <1>;
	37	#size-cells = <1>;
	38	compatible = "spi-flash";
	39	spi-max-frequency = <3500000>;
	40	spi-cpol;
	41	spi-cpha;
	42	reg = <1>;
	43	};
	44
	45	dflash2: en25s64 {
	46	#address-cells = <1>;
	47	#size-cells = <1>;
	48	compatible = "spi-flash";
	49	spi-max-frequency = <3500000>;
	50	spi-cpol;
	51	spi-cpha;
	52	reg = <2>;
	53	};
	54	};
	55
	56	&qspi {
	57	bus-num = <0>;
	58	status = "okay";
	59
	60	qflash0: s25fl128s@0 {
	61	#address-cells = <1>;
	62	#size-cells = <1>;
	63	compatible = "spi-flash";
	64	spi-max-frequency = <20000000>;
	65	reg = <0>;
	66	};
	67	};
	68
	69	&duart0 {
	70	status = "okay";
	71	};
	72
73	&duart1 {
74	status = "okay";
75	};
fdc2b54c SX	76
	77	&lpuart0 {
	78	status = "okay";
	79	};