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2cc416a8 PF |
1 | /* |
2 | * Copyright (C) 2013 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | */ | |
8 | ||
9 | /dts-v1/; | |
10 | ||
11 | #include <dt-bindings/gpio/gpio.h> | |
12 | #include <dt-bindings/input/input.h> | |
13 | #include "imx6sl.dtsi" | |
14 | ||
15 | / { | |
16 | model = "Freescale i.MX6 SoloLite EVK Board"; | |
17 | compatible = "fsl,imx6sl-evk", "fsl,imx6sl"; | |
18 | ||
19 | memory { | |
20 | reg = <0x80000000 0x40000000>; | |
21 | }; | |
22 | ||
23 | backlight { | |
24 | compatible = "pwm-backlight"; | |
25 | pwms = <&pwm1 0 5000000>; | |
26 | brightness-levels = <0 4 8 16 32 64 128 255>; | |
27 | default-brightness-level = <6>; | |
28 | }; | |
29 | ||
30 | leds { | |
31 | compatible = "gpio-leds"; | |
32 | pinctrl-names = "default"; | |
33 | pinctrl-0 = <&pinctrl_led>; | |
34 | ||
35 | user { | |
36 | label = "debug"; | |
37 | gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>; | |
38 | linux,default-trigger = "heartbeat"; | |
39 | }; | |
40 | }; | |
41 | ||
42 | regulators { | |
43 | compatible = "simple-bus"; | |
44 | #address-cells = <1>; | |
45 | #size-cells = <0>; | |
46 | ||
47 | reg_usb_otg1_vbus: regulator@0 { | |
48 | compatible = "regulator-fixed"; | |
49 | reg = <0>; | |
50 | regulator-name = "usb_otg1_vbus"; | |
51 | regulator-min-microvolt = <5000000>; | |
52 | regulator-max-microvolt = <5000000>; | |
53 | gpio = <&gpio4 0 0>; | |
54 | enable-active-high; | |
55 | vin-supply = <&swbst_reg>; | |
56 | }; | |
57 | ||
58 | reg_usb_otg2_vbus: regulator@1 { | |
59 | compatible = "regulator-fixed"; | |
60 | reg = <1>; | |
61 | regulator-name = "usb_otg2_vbus"; | |
62 | regulator-min-microvolt = <5000000>; | |
63 | regulator-max-microvolt = <5000000>; | |
64 | gpio = <&gpio4 2 0>; | |
65 | enable-active-high; | |
66 | vin-supply = <&swbst_reg>; | |
67 | }; | |
68 | ||
69 | reg_aud3v: regulator@2 { | |
70 | compatible = "regulator-fixed"; | |
71 | reg = <2>; | |
72 | regulator-name = "wm8962-supply-3v15"; | |
73 | regulator-min-microvolt = <3150000>; | |
74 | regulator-max-microvolt = <3150000>; | |
75 | regulator-boot-on; | |
76 | }; | |
77 | ||
78 | reg_aud4v: regulator@3 { | |
79 | compatible = "regulator-fixed"; | |
80 | reg = <3>; | |
81 | regulator-name = "wm8962-supply-4v2"; | |
82 | regulator-min-microvolt = <4325000>; | |
83 | regulator-max-microvolt = <4325000>; | |
84 | regulator-boot-on; | |
85 | }; | |
86 | ||
87 | reg_lcd_3v3: regulator@4 { | |
88 | compatible = "regulator-fixed"; | |
89 | reg = <4>; | |
90 | regulator-name = "lcd-3v3"; | |
91 | gpio = <&gpio4 3 0>; | |
92 | enable-active-high; | |
93 | }; | |
94 | }; | |
95 | ||
96 | sound { | |
97 | compatible = "fsl,imx6sl-evk-wm8962", "fsl,imx-audio-wm8962"; | |
98 | model = "wm8962-audio"; | |
99 | ssi-controller = <&ssi2>; | |
100 | audio-codec = <&codec>; | |
101 | audio-routing = | |
102 | "Headphone Jack", "HPOUTL", | |
103 | "Headphone Jack", "HPOUTR", | |
104 | "Ext Spk", "SPKOUTL", | |
105 | "Ext Spk", "SPKOUTR", | |
106 | "AMIC", "MICBIAS", | |
107 | "IN3R", "AMIC"; | |
108 | mux-int-port = <2>; | |
109 | mux-ext-port = <3>; | |
110 | }; | |
111 | }; | |
112 | ||
113 | &audmux { | |
114 | pinctrl-names = "default"; | |
115 | pinctrl-0 = <&pinctrl_audmux3>; | |
116 | status = "okay"; | |
117 | }; | |
118 | ||
119 | &ecspi1 { | |
120 | cs-gpios = <&gpio4 11 0>; | |
121 | pinctrl-names = "default"; | |
122 | pinctrl-0 = <&pinctrl_ecspi1>; | |
123 | status = "okay"; | |
124 | ||
125 | flash: m25p80@0 { | |
126 | #address-cells = <1>; | |
127 | #size-cells = <1>; | |
128 | compatible = "st,m25p32", "jedec,spi-nor"; | |
129 | spi-max-frequency = <20000000>; | |
130 | reg = <0>; | |
131 | }; | |
132 | }; | |
133 | ||
134 | &fec { | |
135 | pinctrl-names = "default", "sleep"; | |
136 | pinctrl-0 = <&pinctrl_fec>; | |
137 | pinctrl-1 = <&pinctrl_fec_sleep>; | |
138 | phy-mode = "rmii"; | |
139 | status = "okay"; | |
140 | }; | |
141 | ||
142 | &i2c1 { | |
143 | clock-frequency = <100000>; | |
144 | pinctrl-names = "default"; | |
145 | pinctrl-0 = <&pinctrl_i2c1>; | |
146 | status = "okay"; | |
147 | ||
148 | pmic: pfuze100@08 { | |
149 | compatible = "fsl,pfuze100"; | |
150 | reg = <0x08>; | |
151 | ||
152 | regulators { | |
153 | sw1a_reg: sw1ab { | |
154 | regulator-min-microvolt = <300000>; | |
155 | regulator-max-microvolt = <1875000>; | |
156 | regulator-boot-on; | |
157 | regulator-always-on; | |
158 | regulator-ramp-delay = <6250>; | |
159 | }; | |
160 | ||
161 | sw1c_reg: sw1c { | |
162 | regulator-min-microvolt = <300000>; | |
163 | regulator-max-microvolt = <1875000>; | |
164 | regulator-boot-on; | |
165 | regulator-always-on; | |
166 | regulator-ramp-delay = <6250>; | |
167 | }; | |
168 | ||
169 | sw2_reg: sw2 { | |
170 | regulator-min-microvolt = <800000>; | |
171 | regulator-max-microvolt = <3300000>; | |
172 | regulator-boot-on; | |
173 | regulator-always-on; | |
174 | }; | |
175 | ||
176 | sw3a_reg: sw3a { | |
177 | regulator-min-microvolt = <400000>; | |
178 | regulator-max-microvolt = <1975000>; | |
179 | regulator-boot-on; | |
180 | regulator-always-on; | |
181 | }; | |
182 | ||
183 | sw3b_reg: sw3b { | |
184 | regulator-min-microvolt = <400000>; | |
185 | regulator-max-microvolt = <1975000>; | |
186 | regulator-boot-on; | |
187 | regulator-always-on; | |
188 | }; | |
189 | ||
190 | sw4_reg: sw4 { | |
191 | regulator-min-microvolt = <800000>; | |
192 | regulator-max-microvolt = <3300000>; | |
193 | }; | |
194 | ||
195 | swbst_reg: swbst { | |
196 | regulator-min-microvolt = <5000000>; | |
197 | regulator-max-microvolt = <5150000>; | |
198 | }; | |
199 | ||
200 | snvs_reg: vsnvs { | |
201 | regulator-min-microvolt = <1000000>; | |
202 | regulator-max-microvolt = <3000000>; | |
203 | regulator-boot-on; | |
204 | regulator-always-on; | |
205 | }; | |
206 | ||
207 | vref_reg: vrefddr { | |
208 | regulator-boot-on; | |
209 | regulator-always-on; | |
210 | }; | |
211 | ||
212 | vgen1_reg: vgen1 { | |
213 | regulator-min-microvolt = <800000>; | |
214 | regulator-max-microvolt = <1550000>; | |
215 | regulator-always-on; | |
216 | }; | |
217 | ||
218 | vgen2_reg: vgen2 { | |
219 | regulator-min-microvolt = <800000>; | |
220 | regulator-max-microvolt = <1550000>; | |
221 | }; | |
222 | ||
223 | vgen3_reg: vgen3 { | |
224 | regulator-min-microvolt = <1800000>; | |
225 | regulator-max-microvolt = <3300000>; | |
226 | }; | |
227 | ||
228 | vgen4_reg: vgen4 { | |
229 | regulator-min-microvolt = <1800000>; | |
230 | regulator-max-microvolt = <3300000>; | |
231 | regulator-always-on; | |
232 | }; | |
233 | ||
234 | vgen5_reg: vgen5 { | |
235 | regulator-min-microvolt = <1800000>; | |
236 | regulator-max-microvolt = <3300000>; | |
237 | regulator-always-on; | |
238 | }; | |
239 | ||
240 | vgen6_reg: vgen6 { | |
241 | regulator-min-microvolt = <1800000>; | |
242 | regulator-max-microvolt = <3300000>; | |
243 | regulator-always-on; | |
244 | }; | |
245 | }; | |
246 | }; | |
247 | }; | |
248 | ||
249 | &i2c2 { | |
250 | clock-frequency = <100000>; | |
251 | pinctrl-names = "default"; | |
252 | pinctrl-0 = <&pinctrl_i2c2>; | |
253 | status = "okay"; | |
254 | ||
255 | codec: wm8962@1a { | |
256 | compatible = "wlf,wm8962"; | |
257 | reg = <0x1a>; | |
258 | clocks = <&clks IMX6SL_CLK_EXTERN_AUDIO>; | |
259 | DCVDD-supply = <&vgen3_reg>; | |
260 | DBVDD-supply = <®_aud3v>; | |
261 | AVDD-supply = <&vgen3_reg>; | |
262 | CPVDD-supply = <&vgen3_reg>; | |
263 | MICVDD-supply = <®_aud3v>; | |
264 | PLLVDD-supply = <&vgen3_reg>; | |
265 | SPKVDD1-supply = <®_aud4v>; | |
266 | SPKVDD2-supply = <®_aud4v>; | |
267 | }; | |
268 | }; | |
269 | ||
270 | &iomuxc { | |
271 | pinctrl-names = "default"; | |
272 | pinctrl-0 = <&pinctrl_hog>; | |
273 | ||
274 | imx6sl-evk { | |
275 | pinctrl_hog: hoggrp { | |
276 | fsl,pins = < | |
277 | MX6SL_PAD_KEY_ROW7__GPIO4_IO07 0x17059 | |
278 | MX6SL_PAD_KEY_COL7__GPIO4_IO06 0x17059 | |
279 | MX6SL_PAD_SD2_DAT7__GPIO5_IO00 0x17059 | |
280 | MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x17059 | |
281 | MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059 | |
282 | MX6SL_PAD_KEY_COL4__GPIO4_IO00 0x80000000 | |
283 | MX6SL_PAD_KEY_COL5__GPIO4_IO02 0x80000000 | |
284 | MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x4130b0 | |
285 | >; | |
286 | }; | |
287 | ||
288 | pinctrl_audmux3: audmux3grp { | |
289 | fsl,pins = < | |
290 | MX6SL_PAD_AUD_RXD__AUD3_RXD 0x4130b0 | |
291 | MX6SL_PAD_AUD_TXC__AUD3_TXC 0x4130b0 | |
292 | MX6SL_PAD_AUD_TXD__AUD3_TXD 0x4110b0 | |
293 | MX6SL_PAD_AUD_TXFS__AUD3_TXFS 0x4130b0 | |
294 | >; | |
295 | }; | |
296 | ||
297 | pinctrl_ecspi1: ecspi1grp { | |
298 | fsl,pins = < | |
299 | MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO 0x100b1 | |
300 | MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x100b1 | |
301 | MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x100b1 | |
302 | MX6SL_PAD_ECSPI1_SS0__GPIO4_IO11 0x80000000 | |
303 | >; | |
304 | }; | |
305 | ||
306 | pinctrl_fec: fecgrp { | |
307 | fsl,pins = < | |
308 | MX6SL_PAD_FEC_MDC__FEC_MDC 0x1b0b0 | |
309 | MX6SL_PAD_FEC_MDIO__FEC_MDIO 0x1b0b0 | |
310 | MX6SL_PAD_FEC_CRS_DV__FEC_RX_DV 0x1b0b0 | |
311 | MX6SL_PAD_FEC_RXD0__FEC_RX_DATA0 0x1b0b0 | |
312 | MX6SL_PAD_FEC_RXD1__FEC_RX_DATA1 0x1b0b0 | |
313 | MX6SL_PAD_FEC_TX_EN__FEC_TX_EN 0x1b0b0 | |
314 | MX6SL_PAD_FEC_TXD0__FEC_TX_DATA0 0x1b0b0 | |
315 | MX6SL_PAD_FEC_TXD1__FEC_TX_DATA1 0x1b0b0 | |
316 | MX6SL_PAD_FEC_REF_CLK__FEC_REF_OUT 0x4001b0a8 | |
317 | >; | |
318 | }; | |
319 | ||
320 | pinctrl_fec_sleep: fecgrp-sleep { | |
321 | fsl,pins = < | |
322 | MX6SL_PAD_FEC_MDC__GPIO4_IO23 0x3080 | |
323 | MX6SL_PAD_FEC_CRS_DV__GPIO4_IO25 0x3080 | |
324 | MX6SL_PAD_FEC_RXD0__GPIO4_IO17 0x3080 | |
325 | MX6SL_PAD_FEC_RXD1__GPIO4_IO18 0x3080 | |
326 | MX6SL_PAD_FEC_TX_EN__GPIO4_IO22 0x3080 | |
327 | MX6SL_PAD_FEC_TXD0__GPIO4_IO24 0x3080 | |
328 | MX6SL_PAD_FEC_TXD1__GPIO4_IO16 0x3080 | |
329 | MX6SL_PAD_FEC_REF_CLK__GPIO4_IO26 0x3080 | |
330 | >; | |
331 | }; | |
332 | ||
333 | pinctrl_i2c1: i2c1grp { | |
334 | fsl,pins = < | |
335 | MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x4001b8b1 | |
336 | MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x4001b8b1 | |
337 | >; | |
338 | }; | |
339 | ||
340 | ||
341 | pinctrl_i2c2: i2c2grp { | |
342 | fsl,pins = < | |
343 | MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x4001b8b1 | |
344 | MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x4001b8b1 | |
345 | >; | |
346 | }; | |
347 | ||
348 | pinctrl_kpp: kppgrp { | |
349 | fsl,pins = < | |
350 | MX6SL_PAD_KEY_ROW0__KEY_ROW0 0x1b010 | |
351 | MX6SL_PAD_KEY_ROW1__KEY_ROW1 0x1b010 | |
352 | MX6SL_PAD_KEY_ROW2__KEY_ROW2 0x1b0b0 | |
353 | MX6SL_PAD_KEY_COL0__KEY_COL0 0x110b0 | |
354 | MX6SL_PAD_KEY_COL1__KEY_COL1 0x110b0 | |
355 | MX6SL_PAD_KEY_COL2__KEY_COL2 0x110b0 | |
356 | >; | |
357 | }; | |
358 | ||
359 | pinctrl_lcd: lcdgrp { | |
360 | fsl,pins = < | |
361 | MX6SL_PAD_LCD_DAT0__LCD_DATA00 0x1b0b0 | |
362 | MX6SL_PAD_LCD_DAT1__LCD_DATA01 0x1b0b0 | |
363 | MX6SL_PAD_LCD_DAT2__LCD_DATA02 0x1b0b0 | |
364 | MX6SL_PAD_LCD_DAT3__LCD_DATA03 0x1b0b0 | |
365 | MX6SL_PAD_LCD_DAT4__LCD_DATA04 0x1b0b0 | |
366 | MX6SL_PAD_LCD_DAT5__LCD_DATA05 0x1b0b0 | |
367 | MX6SL_PAD_LCD_DAT6__LCD_DATA06 0x1b0b0 | |
368 | MX6SL_PAD_LCD_DAT7__LCD_DATA07 0x1b0b0 | |
369 | MX6SL_PAD_LCD_DAT8__LCD_DATA08 0x1b0b0 | |
370 | MX6SL_PAD_LCD_DAT9__LCD_DATA09 0x1b0b0 | |
371 | MX6SL_PAD_LCD_DAT10__LCD_DATA10 0x1b0b0 | |
372 | MX6SL_PAD_LCD_DAT11__LCD_DATA11 0x1b0b0 | |
373 | MX6SL_PAD_LCD_DAT12__LCD_DATA12 0x1b0b0 | |
374 | MX6SL_PAD_LCD_DAT13__LCD_DATA13 0x1b0b0 | |
375 | MX6SL_PAD_LCD_DAT14__LCD_DATA14 0x1b0b0 | |
376 | MX6SL_PAD_LCD_DAT15__LCD_DATA15 0x1b0b0 | |
377 | MX6SL_PAD_LCD_DAT16__LCD_DATA16 0x1b0b0 | |
378 | MX6SL_PAD_LCD_DAT17__LCD_DATA17 0x1b0b0 | |
379 | MX6SL_PAD_LCD_DAT18__LCD_DATA18 0x1b0b0 | |
380 | MX6SL_PAD_LCD_DAT19__LCD_DATA19 0x1b0b0 | |
381 | MX6SL_PAD_LCD_DAT20__LCD_DATA20 0x1b0b0 | |
382 | MX6SL_PAD_LCD_DAT21__LCD_DATA21 0x1b0b0 | |
383 | MX6SL_PAD_LCD_DAT22__LCD_DATA22 0x1b0b0 | |
384 | MX6SL_PAD_LCD_DAT23__LCD_DATA23 0x1b0b0 | |
385 | MX6SL_PAD_LCD_CLK__LCD_CLK 0x1b0b0 | |
386 | MX6SL_PAD_LCD_ENABLE__LCD_ENABLE 0x1b0b0 | |
387 | MX6SL_PAD_LCD_HSYNC__LCD_HSYNC 0x1b0b0 | |
388 | MX6SL_PAD_LCD_VSYNC__LCD_VSYNC 0x1b0b0 | |
389 | >; | |
390 | }; | |
391 | ||
392 | pinctrl_led: ledgrp { | |
393 | fsl,pins = < | |
394 | MX6SL_PAD_HSIC_STROBE__GPIO3_IO20 0x17059 | |
395 | >; | |
396 | }; | |
397 | ||
398 | pinctrl_pwm1: pwmgrp { | |
399 | fsl,pins = < | |
400 | MX6SL_PAD_PWM1__PWM1_OUT 0x110b0 | |
401 | >; | |
402 | }; | |
403 | ||
404 | pinctrl_uart1: uart1grp { | |
405 | fsl,pins = < | |
406 | MX6SL_PAD_UART1_RXD__UART1_RX_DATA 0x1b0b1 | |
407 | MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x1b0b1 | |
408 | >; | |
409 | }; | |
410 | ||
411 | pinctrl_usbotg1: usbotg1grp { | |
412 | fsl,pins = < | |
413 | MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x17059 | |
414 | >; | |
415 | }; | |
416 | ||
417 | pinctrl_usdhc1: usdhc1grp { | |
418 | fsl,pins = < | |
419 | MX6SL_PAD_SD1_CMD__SD1_CMD 0x17059 | |
420 | MX6SL_PAD_SD1_CLK__SD1_CLK 0x10059 | |
421 | MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x17059 | |
422 | MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x17059 | |
423 | MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x17059 | |
424 | MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x17059 | |
425 | MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x17059 | |
426 | MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x17059 | |
427 | MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x17059 | |
428 | MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x17059 | |
429 | >; | |
430 | }; | |
431 | ||
432 | pinctrl_usdhc1_100mhz: usdhc1grp100mhz { | |
433 | fsl,pins = < | |
434 | MX6SL_PAD_SD1_CMD__SD1_CMD 0x170b9 | |
435 | MX6SL_PAD_SD1_CLK__SD1_CLK 0x100b9 | |
436 | MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170b9 | |
437 | MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170b9 | |
438 | MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170b9 | |
439 | MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170b9 | |
440 | MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170b9 | |
441 | MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170b9 | |
442 | MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170b9 | |
443 | MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170b9 | |
444 | >; | |
445 | }; | |
446 | ||
447 | pinctrl_usdhc1_200mhz: usdhc1grp200mhz { | |
448 | fsl,pins = < | |
449 | MX6SL_PAD_SD1_CMD__SD1_CMD 0x170f9 | |
450 | MX6SL_PAD_SD1_CLK__SD1_CLK 0x100f9 | |
451 | MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170f9 | |
452 | MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170f9 | |
453 | MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170f9 | |
454 | MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170f9 | |
455 | MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170f9 | |
456 | MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170f9 | |
457 | MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170f9 | |
458 | MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170f9 | |
459 | >; | |
460 | }; | |
461 | ||
462 | pinctrl_usdhc2: usdhc2grp { | |
463 | fsl,pins = < | |
464 | MX6SL_PAD_SD2_CMD__SD2_CMD 0x17059 | |
465 | MX6SL_PAD_SD2_CLK__SD2_CLK 0x10059 | |
466 | MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x17059 | |
467 | MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x17059 | |
468 | MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x17059 | |
469 | MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x17059 | |
470 | >; | |
471 | }; | |
472 | ||
473 | pinctrl_usdhc2_100mhz: usdhc2grp100mhz { | |
474 | fsl,pins = < | |
475 | MX6SL_PAD_SD2_CMD__SD2_CMD 0x170b9 | |
476 | MX6SL_PAD_SD2_CLK__SD2_CLK 0x100b9 | |
477 | MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170b9 | |
478 | MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170b9 | |
479 | MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170b9 | |
480 | MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170b9 | |
481 | >; | |
482 | }; | |
483 | ||
484 | pinctrl_usdhc2_200mhz: usdhc2grp200mhz { | |
485 | fsl,pins = < | |
486 | MX6SL_PAD_SD2_CMD__SD2_CMD 0x170f9 | |
487 | MX6SL_PAD_SD2_CLK__SD2_CLK 0x100f9 | |
488 | MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170f9 | |
489 | MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170f9 | |
490 | MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170f9 | |
491 | MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170f9 | |
492 | >; | |
493 | }; | |
494 | ||
495 | pinctrl_usdhc3: usdhc3grp { | |
496 | fsl,pins = < | |
497 | MX6SL_PAD_SD3_CMD__SD3_CMD 0x17059 | |
498 | MX6SL_PAD_SD3_CLK__SD3_CLK 0x10059 | |
499 | MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x17059 | |
500 | MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x17059 | |
501 | MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x17059 | |
502 | MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x17059 | |
503 | >; | |
504 | }; | |
505 | ||
506 | pinctrl_usdhc3_100mhz: usdhc3grp100mhz { | |
507 | fsl,pins = < | |
508 | MX6SL_PAD_SD3_CMD__SD3_CMD 0x170b9 | |
509 | MX6SL_PAD_SD3_CLK__SD3_CLK 0x100b9 | |
510 | MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170b9 | |
511 | MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170b9 | |
512 | MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170b9 | |
513 | MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170b9 | |
514 | >; | |
515 | }; | |
516 | ||
517 | pinctrl_usdhc3_200mhz: usdhc3grp200mhz { | |
518 | fsl,pins = < | |
519 | MX6SL_PAD_SD3_CMD__SD3_CMD 0x170f9 | |
520 | MX6SL_PAD_SD3_CLK__SD3_CLK 0x100f9 | |
521 | MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 | |
522 | MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 | |
523 | MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 | |
524 | MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 | |
525 | >; | |
526 | }; | |
527 | }; | |
528 | }; | |
529 | ||
530 | &kpp { | |
531 | pinctrl-names = "default"; | |
532 | pinctrl-0 = <&pinctrl_kpp>; | |
533 | linux,keymap = < | |
534 | MATRIX_KEY(0x0, 0x0, KEY_UP) /* ROW0, COL0 */ | |
535 | MATRIX_KEY(0x0, 0x1, KEY_DOWN) /* ROW0, COL1 */ | |
536 | MATRIX_KEY(0x0, 0x2, KEY_ENTER) /* ROW0, COL2 */ | |
537 | MATRIX_KEY(0x1, 0x0, KEY_HOME) /* ROW1, COL0 */ | |
538 | MATRIX_KEY(0x1, 0x1, KEY_RIGHT) /* ROW1, COL1 */ | |
539 | MATRIX_KEY(0x1, 0x2, KEY_LEFT) /* ROW1, COL2 */ | |
540 | MATRIX_KEY(0x2, 0x0, KEY_VOLUMEDOWN) /* ROW2, COL0 */ | |
541 | MATRIX_KEY(0x2, 0x1, KEY_VOLUMEUP) /* ROW2, COL1 */ | |
542 | >; | |
543 | status = "okay"; | |
544 | }; | |
545 | ||
546 | &lcdif { | |
547 | pinctrl-names = "default"; | |
548 | pinctrl-0 = <&pinctrl_lcd>; | |
549 | lcd-supply = <®_lcd_3v3>; | |
550 | display = <&display0>; | |
551 | status = "okay"; | |
552 | ||
553 | display0: display0 { | |
554 | bits-per-pixel = <32>; | |
555 | bus-width = <24>; | |
556 | ||
557 | display-timings { | |
558 | native-mode = <&timing0>; | |
559 | timing0: timing0 { | |
560 | clock-frequency = <33500000>; | |
561 | hactive = <800>; | |
562 | vactive = <480>; | |
563 | hback-porch = <89>; | |
564 | hfront-porch = <164>; | |
565 | vback-porch = <23>; | |
566 | vfront-porch = <10>; | |
567 | hsync-len = <10>; | |
568 | vsync-len = <10>; | |
569 | hsync-active = <0>; | |
570 | vsync-active = <0>; | |
571 | de-active = <1>; | |
572 | pixelclk-active = <0>; | |
573 | }; | |
574 | }; | |
575 | }; | |
576 | }; | |
577 | ||
578 | &pwm1 { | |
579 | pinctrl-names = "default"; | |
580 | pinctrl-0 = <&pinctrl_pwm1>; | |
581 | status = "okay"; | |
582 | }; | |
583 | ||
584 | &snvs_poweroff { | |
585 | status = "okay"; | |
586 | }; | |
587 | ||
588 | &ssi2 { | |
589 | status = "okay"; | |
590 | }; | |
591 | ||
592 | &uart1 { | |
593 | pinctrl-names = "default"; | |
594 | pinctrl-0 = <&pinctrl_uart1>; | |
595 | status = "okay"; | |
596 | }; | |
597 | ||
598 | &usbotg1 { | |
599 | vbus-supply = <®_usb_otg1_vbus>; | |
600 | pinctrl-names = "default"; | |
601 | pinctrl-0 = <&pinctrl_usbotg1>; | |
602 | disable-over-current; | |
603 | status = "okay"; | |
604 | }; | |
605 | ||
606 | &usbotg2 { | |
607 | vbus-supply = <®_usb_otg2_vbus>; | |
608 | dr_mode = "host"; | |
609 | disable-over-current; | |
610 | status = "okay"; | |
611 | }; | |
612 | ||
613 | &usdhc1 { | |
614 | pinctrl-names = "default", "state_100mhz", "state_200mhz"; | |
615 | pinctrl-0 = <&pinctrl_usdhc1>; | |
616 | pinctrl-1 = <&pinctrl_usdhc1_100mhz>; | |
617 | pinctrl-2 = <&pinctrl_usdhc1_200mhz>; | |
618 | bus-width = <8>; | |
619 | cd-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>; | |
620 | wp-gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; | |
621 | status = "okay"; | |
622 | }; | |
623 | ||
624 | &usdhc2 { | |
625 | pinctrl-names = "default", "state_100mhz", "state_200mhz"; | |
626 | pinctrl-0 = <&pinctrl_usdhc2>; | |
627 | pinctrl-1 = <&pinctrl_usdhc2_100mhz>; | |
628 | pinctrl-2 = <&pinctrl_usdhc2_200mhz>; | |
629 | cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; | |
630 | wp-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>; | |
631 | status = "okay"; | |
632 | }; | |
633 | ||
634 | &usdhc3 { | |
635 | pinctrl-names = "default", "state_100mhz", "state_200mhz"; | |
636 | pinctrl-0 = <&pinctrl_usdhc3>; | |
637 | pinctrl-1 = <&pinctrl_usdhc3_100mhz>; | |
638 | pinctrl-2 = <&pinctrl_usdhc3_200mhz>; | |
639 | cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; | |
640 | status = "okay"; | |
641 | }; |