[people/ms/u-boot.git] / arch / arm / dts / imx6ul-geam-kit.dts

/*
 * Copyright (C) 2016 Amarula Solutions B.V.
 * Copyright (C) 2016 Engicam S.r.l.
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License
 *     version 2 as published by the Free Software Foundation.
 *
 *     This file is distributed in the hope that it will be useful
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

/dts-v1/;

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "imx6ul.dtsi"

/ {
	model = "Engicam GEAM6UL";
	compatible = "engicam,imx6ul-geam", "fsl,imx6ul";

	memory {
		reg = <0x80000000 0x08000000>;
	};

	chosen {
		stdout-path = &uart1;
	};
};

&fec1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet1>;
	phy-mode = "rmii";
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";
};

&i2c2 {
	clock_frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&usdhc1 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc1>;
	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
	bus-width = <4>;
	cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
	no-1-8-v;
	status = "okay";
};

&iomuxc {
	pinctrl_enet1: enet1grp {
		fsl,pins = <
			MX6UL_PAD_GPIO1_IO07__ENET2_MDC		0x1b0b0
			MX6UL_PAD_GPIO1_IO06__ENET2_MDIO	0x1b0b0
			MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN	0x1b0b0
			MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00	0x1b0b0
			MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01	0x1b0b0
			MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN	0x1b0b0
			MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00	0x1b0b0
			MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01	0x1b0b0
			MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1	0x4001b031
		>;
	};

	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
			MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
		>;
	};

	pinctrl_i2c2: i2c2grp {
			fsl,pins = <
			MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
			MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
			MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
		>;
	};

	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x17059
			MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x10059
			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
		>;
	};

	pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
		fsl,pins = <
			MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170b9
			MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100b9
			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
		>;
	};

	pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
		fsl,pins = <
			MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170f9
			MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100f9
			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
		>;
	};
};
Commit	Line	Data
a5b9f8c8 JT	1	/*
	2	* Copyright (C) 2016 Amarula Solutions B.V.
	3	* Copyright (C) 2016 Engicam S.r.l.
	4	*
	5	* This file is dual-licensed: you can use it either under the terms
	6	* of the GPL or the X11 license, at your option. Note that this dual
	7	* licensing only applies to this file, and not this project as a
	8	* whole.
	9	*
	10	* a) This file is free software; you can redistribute it and/or
	11	* modify it under the terms of the GNU General Public License
	12	* version 2 as published by the Free Software Foundation.
	13	*
	14	* This file is distributed in the hope that it will be useful
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* Or, alternatively
	20	*
	21	* b) Permission is hereby granted, free of charge, to any person
	22	* obtaining a copy of this software and associated documentation
	23	* files (the "Software"), to deal in the Software without
	24	* restriction, including without limitation the rights to use
	25	* copy, modify, merge, publish, distribute, sublicense, and/or
	26	* sell copies of the Software, and to permit persons to whom the
	27	* Software is furnished to do so, subject to the following
	28	* conditions:
	29	*
	30	* The above copyright notice and this permission notice shall be
	31	* included in all copies or substantial portions of the Software.
	32	*
	33	* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
	34	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	35	* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	36	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
	37	* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
	38	* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	39	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	40	* OTHER DEALINGS IN THE SOFTWARE.
	41	*/
	42
	43	/dts-v1/;
	44
	45	#include <dt-bindings/gpio/gpio.h>
	46	#include <dt-bindings/input/input.h>
	47	#include "imx6ul.dtsi"
	48
	49	/ {
	50	model = "Engicam GEAM6UL";
	51	compatible = "engicam,imx6ul-geam", "fsl,imx6ul";
	52
	53	memory {
	54	reg = <0x80000000 0x08000000>;
	55	};
	56
	57	chosen {
	58	stdout-path = &uart1;
	59	};
	60	};
	61
b443c88b JT	62	&fec1 {
	63	pinctrl-names = "default";
	64	pinctrl-0 = <&pinctrl_enet1>;
	65	phy-mode = "rmii";
	66	status = "okay";
	67	};
	68
6116da98 JT	69	&i2c1 {
	70	clock-frequency = <100000>;
	71	pinctrl-names = "default";
	72	pinctrl-0 = <&pinctrl_i2c1>;
	73	status = "okay";
	74	};
	75
	76	&i2c2 {
	77	clock_frequency = <100000>;
	78	pinctrl-names = "default";
	79	pinctrl-0 = <&pinctrl_i2c2>;
	80	status = "okay";
	81	};
	82
a5b9f8c8 JT	83	&uart1 {
	84	pinctrl-names = "default";
	85	pinctrl-0 = <&pinctrl_uart1>;
	86	status = "okay";
	87	};
	88
	89	&usdhc1 {
	90	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	91	pinctrl-0 = <&pinctrl_usdhc1>;
	92	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
	93	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
	94	bus-width = <4>;
	95	cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
	96	no-1-8-v;
	97	status = "okay";
	98	};
	99
	100	&iomuxc {
b443c88b JT	101	pinctrl_enet1: enet1grp {
	102	fsl,pins = <
	103	MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
	104	MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
	105	MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
	106	MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
	107	MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
	108	MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
	109	MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
	110	MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
	111	MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
	112	>;
	113	};
	114
6116da98 JT	115	pinctrl_i2c1: i2c1grp {
	116	fsl,pins = <
	117	MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
	118	MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
	119	>;
	120	};
	121
	122	pinctrl_i2c2: i2c2grp {
	123	fsl,pins = <
	124	MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
	125	MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
	126	>;
	127	};
	128
a5b9f8c8 JT	129	pinctrl_uart1: uart1grp {
	130	fsl,pins = <
	131	MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
	132	MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
	133	>;
	134	};
	135
	136	pinctrl_usdhc1: usdhc1grp {
	137	fsl,pins = <
	138	MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
	139	MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
	140	MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
	141	MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
	142	MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
	143	MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
	144	>;
	145	};
	146
	147	pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
	148	fsl,pins = <
	149	MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9
	150	MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9
	151	MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
	152	MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
	153	MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
	154	MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
	155	>;
	156	};
	157
	158	pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
	159	fsl,pins = <
	160	MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9
	161	MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9
	162	MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
	163	MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
	164	MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
	165	MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
	166	>;
	167	};
	168	};