projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| e9dfa1e1 JT |
1 | /* |
| 2 | * Copyright (C) 2016 Amarula Solutions B.V. | |
| 3 | * Copyright (C) 2016 Engicam S.r.l. | |
| 4 | * | |
| 5 | * This file is dual-licensed: you can use it either under the terms | |
| 6 | * of the GPL or the X11 license, at your option. Note that this dual | |
| 7 | * licensing only applies to this file, and not this project as a | |
| 8 | * whole. | |
| 9 | * | |
| 10 | * a) This file is free software; you can redistribute it and/or | |
| 11 | * modify it under the terms of the GNU General Public License | |
| 12 | * version 2 as published by the Free Software Foundation. | |
| 13 | * | |
| 14 | * This file is distributed in the hope that it will be useful | |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 17 | * GNU General Public License for more details. | |
| 18 | * | |
| 19 | * Or, alternatively | |
| 20 | * | |
| 21 | * b) Permission is hereby granted, free of charge, to any person | |
| 22 | * obtaining a copy of this software and associated documentation | |
| 23 | * files (the "Software"), to deal in the Software without | |
| 24 | * restriction, including without limitation the rights to use | |
| 25 | * copy, modify, merge, publish, distribute, sublicense, and/or | |
| 26 | * sell copies of the Software, and to permit persons to whom the | |
| 27 | * Software is furnished to do so, subject to the following | |
| 28 | * conditions: | |
| 29 | * | |
| 30 | * The above copyright notice and this permission notice shall be | |
| 31 | * included in all copies or substantial portions of the Software. | |
| 32 | * | |
| 33 | * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND | |
| 34 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
| 35 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
| 36 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
| 37 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY | |
| 38 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
| 39 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
| 40 | * OTHER DEALINGS IN THE SOFTWARE. | |
| 41 | */ | |
| 42 | ||
| e9dfa1e1 JT |
43 | #include <dt-bindings/gpio/gpio.h> |
| 44 | #include <dt-bindings/input/input.h> | |
| 45 | #include "imx6ul.dtsi" | |
| 46 | ||
| 47 | / { | |
| 48 | memory { | |
| 49 | reg = <0x80000000 0x20000000>; | |
| 50 | }; | |
| 51 | ||
| 52 | chosen { | |
| 53 | stdout-path = &uart1; | |
| 54 | }; | |
| 55 | }; | |
| 56 | ||
| 580a7d69 JT |
57 | &fec1 { |
| 58 | pinctrl-names = "default"; | |
| 59 | pinctrl-0 = <&pinctrl_enet1>; | |
| 60 | phy-mode = "rmii"; | |
| 61 | status = "okay"; | |
| 62 | }; | |
| 63 | ||
| 08a480b4 JT |
64 | &i2c1 { |
| 65 | clock-frequency = <100000>; | |
| 66 | pinctrl-names = "default"; | |
| 67 | pinctrl-0 = <&pinctrl_i2c1>; | |
| 68 | status = "okay"; | |
| 69 | }; | |
| 70 | ||
| 71 | &i2c2 { | |
| 72 | clock_frequency = <100000>; | |
| 73 | pinctrl-names = "default"; | |
| 74 | pinctrl-0 = <&pinctrl_i2c2>; | |
| 75 | status = "okay"; | |
| 76 | }; | |
| 77 | ||
| e9dfa1e1 JT |
78 | &uart1 { |
| 79 | pinctrl-names = "default"; | |
| 80 | pinctrl-0 = <&pinctrl_uart1>; | |
| 81 | status = "okay"; | |
| 82 | }; | |
| 83 | ||
| 84 | &usdhc1 { | |
| 152038ea | 85 | u-boot,dm-spl; |
| e9dfa1e1 JT |
86 | pinctrl-names = "default"; |
| 87 | pinctrl-0 = <&pinctrl_usdhc1>; | |
| 88 | cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; | |
| 89 | bus-width = <4>; | |
| 90 | no-1-8-v; | |
| 91 | status = "okay"; | |
| 92 | }; | |
| 93 | ||
| 94 | &iomuxc { | |
| 580a7d69 JT |
95 | pinctrl_enet1: enet1grp { |
| 96 | fsl,pins = < | |
| 97 | MX6UL_PAD_ENET2_RX_DATA0__ENET1_MDIO 0x1b0b0 | |
| 98 | MX6UL_PAD_ENET2_RX_DATA1__ENET1_MDC 0x1b0b0 | |
| 99 | MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 | |
| 100 | MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 | |
| 101 | MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 | |
| 102 | MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 | |
| 103 | MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 | |
| 104 | MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 | |
| 105 | MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031 | |
| 106 | MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10 0x1b0b0 | |
| 107 | >; | |
| 108 | }; | |
| 109 | ||
| 08a480b4 JT |
110 | pinctrl_i2c1: i2c1grp { |
| 111 | fsl,pins = < | |
| 112 | MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 | |
| 113 | MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0 | |
| 114 | >; | |
| 115 | }; | |
| 116 | ||
| 117 | pinctrl_i2c2: i2c2grp { | |
| 118 | fsl,pins = < | |
| 119 | MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0 | |
| 120 | MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0 | |
| 121 | >; | |
| 122 | }; | |
| 123 | ||
| e9dfa1e1 JT |
124 | pinctrl_uart1: uart1grp { |
| 125 | fsl,pins = < | |
| 126 | MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 | |
| 127 | MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 | |
| 128 | >; | |
| 129 | }; | |
| 130 | ||
| 131 | pinctrl_usdhc1: usdhc1grp { | |
| 152038ea | 132 | u-boot,dm-spl; |
| e9dfa1e1 JT |
133 | fsl,pins = < |
| 134 | MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 | |
| 135 | MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 | |
| 136 | MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 | |
| 137 | MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 | |
| 138 | MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 | |
| 139 | MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 | |
| 140 | >; | |
| 141 | }; | |
| 142 | }; |