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ARM: dts: rmobile: Make scif0 available before reloc on Porter
[people/ms/u-boot.git] / arch / arm / dts / r8a7791-porter.dts
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1/*
2 * Device Tree Source for the Porter board
3 *
4 * Copyright (C) 2015 Cogent Embedded, Inc.
5 *
6 * SPDX-License-Identifier: GPL-2.0
7 */
8
9/*
10 * SSI-AK4642
11 *
12 * JP3: 2-1: AK4642
13 * 2-3: ADV7511
14 *
15 * This command is required before playback/capture:
16 *
17 * amixer set "LINEOUT Mixer DACL" on
18 */
19
20/dts-v1/;
21#include "r8a7791.dtsi"
22#include <dt-bindings/gpio/gpio.h>
23
24/ {
25 model = "Porter";
26 compatible = "renesas,porter", "renesas,r8a7791";
27
28 aliases {
29 serial0 = &scif0;
30 };
31
32 chosen {
33 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
34 stdout-path = "serial0:115200n8";
35 };
36
37 memory@40000000 {
38 device_type = "memory";
39 reg = <0 0x40000000 0 0x40000000>;
40 };
41
42 memory@200000000 {
43 device_type = "memory";
44 reg = <2 0x00000000 0 0x40000000>;
45 };
46
47 vcc_sdhi0: regulator-vcc-sdhi0 {
48 compatible = "regulator-fixed";
49
50 regulator-name = "SDHI0 Vcc";
51 regulator-min-microvolt = <3300000>;
52 regulator-max-microvolt = <3300000>;
53 regulator-always-on;
54 };
55
56 vccq_sdhi0: regulator-vccq-sdhi0 {
57 compatible = "regulator-gpio";
58
59 regulator-name = "SDHI0 VccQ";
60 regulator-min-microvolt = <1800000>;
61 regulator-max-microvolt = <3300000>;
62
63 gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
64 gpios-states = <1>;
65 states = <3300000 1
66 1800000 0>;
67 };
68
69 vcc_sdhi2: regulator-vcc-sdhi2 {
70 compatible = "regulator-fixed";
71
72 regulator-name = "SDHI2 Vcc";
73 regulator-min-microvolt = <3300000>;
74 regulator-max-microvolt = <3300000>;
75 regulator-always-on;
76 };
77
78 vccq_sdhi2: regulator-vccq-sdhi2 {
79 compatible = "regulator-gpio";
80
81 regulator-name = "SDHI2 VccQ";
82 regulator-min-microvolt = <1800000>;
83 regulator-max-microvolt = <3300000>;
84
85 gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
86 gpios-states = <1>;
87 states = <3300000 1
88 1800000 0>;
89 };
90
91 hdmi-out {
92 compatible = "hdmi-connector";
93 type = "a";
94
95 port {
96 hdmi_con: endpoint {
97 remote-endpoint = <&adv7511_out>;
98 };
99 };
100 };
101
102 x3_clk: x3-clock {
103 compatible = "fixed-clock";
104 #clock-cells = <0>;
105 clock-frequency = <148500000>;
106 };
107
108 x16_clk: x16-clock {
109 compatible = "fixed-clock";
110 #clock-cells = <0>;
111 clock-frequency = <74250000>;
112 };
113
114 x14_clk: audio_clock {
115 compatible = "fixed-clock";
116 #clock-cells = <0>;
117 clock-frequency = <11289600>;
118 };
119
120 sound {
121 compatible = "simple-audio-card";
122
123 simple-audio-card,format = "left_j";
124 simple-audio-card,bitclock-master = <&soundcodec>;
125 simple-audio-card,frame-master = <&soundcodec>;
126
127 simple-audio-card,cpu {
128 sound-dai = <&rcar_sound>;
129 };
130
131 soundcodec: simple-audio-card,codec {
132 sound-dai = <&ak4642>;
133 clocks = <&x14_clk>;
134 };
135 };
136};
137
138&extal_clk {
139 clock-frequency = <20000000>;
140};
141
142&pfc {
143 scif0_pins: scif0 {
144 groups = "scif0_data_d";
145 function = "scif0";
146 };
147
148 ether_pins: ether {
149 groups = "eth_link", "eth_mdio", "eth_rmii";
150 function = "eth";
151 };
152
153 phy1_pins: phy1 {
154 groups = "intc_irq0";
155 function = "intc";
156 };
157
158 sdhi0_pins: sd0 {
159 groups = "sdhi0_data4", "sdhi0_ctrl";
160 function = "sdhi0";
161 };
162
163 sdhi2_pins: sd2 {
164 groups = "sdhi2_data4", "sdhi2_ctrl";
165 function = "sdhi2";
166 };
167
168 qspi_pins: qspi {
169 groups = "qspi_ctrl", "qspi_data4";
170 function = "qspi";
171 };
172
173 i2c2_pins: i2c2 {
174 groups = "i2c2";
175 function = "i2c2";
176 };
177
178 usb0_pins: usb0 {
179 groups = "usb0";
180 function = "usb0";
181 };
182
183 usb1_pins: usb1 {
184 groups = "usb1";
185 function = "usb1";
186 };
187
188 vin0_pins: vin0 {
189 groups = "vin0_data8", "vin0_clk";
190 function = "vin0";
191 };
192
193 can0_pins: can0 {
194 groups = "can0_data";
195 function = "can0";
196 };
197
198 du_pins: du {
199 groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
200 function = "du";
201 };
202
203 ssi_pins: sound {
204 groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
205 function = "ssi";
206 };
207
208 audio_clk_pins: audio_clk {
209 groups = "audio_clk_a";
210 function = "audio_clk";
211 };
212};
213
214&scif0 {
215 pinctrl-0 = <&scif0_pins>;
216 pinctrl-names = "default";
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218
219 status = "okay";
220};
221
222&ether {
223 pinctrl-0 = <&ether_pins &phy1_pins>;
224 pinctrl-names = "default";
225
226 phy-handle = <&phy1>;
227 renesas,ether-link-active-low;
228 status = "okay";
229
230 phy1: ethernet-phy@1 {
231 reg = <1>;
232 interrupt-parent = <&irqc0>;
233 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
234 micrel,led-mode = <1>;
235 };
236};
237
238&sdhi0 {
239 pinctrl-0 = <&sdhi0_pins>;
240 pinctrl-names = "default";
241
242 vmmc-supply = <&vcc_sdhi0>;
243 vqmmc-supply = <&vccq_sdhi0>;
244 cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
245 wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
246 status = "okay";
247};
248
249&sdhi2 {
250 pinctrl-0 = <&sdhi2_pins>;
251 pinctrl-names = "default";
252
253 vmmc-supply = <&vcc_sdhi2>;
254 vqmmc-supply = <&vccq_sdhi2>;
255 cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
256 status = "okay";
257};
258
259&qspi {
260 pinctrl-0 = <&qspi_pins>;
261 pinctrl-names = "default";
262
263 status = "okay";
264
265 flash@0 {
266 compatible = "spansion,s25fl512s", "jedec,spi-nor";
267 reg = <0>;
268 spi-max-frequency = <30000000>;
269 spi-tx-bus-width = <4>;
270 spi-rx-bus-width = <4>;
271 m25p,fast-read;
272
273 partitions {
274 compatible = "fixed-partitions";
275 #address-cells = <1>;
276 #size-cells = <1>;
277
278 partition@0 {
279 label = "loader_prg";
280 reg = <0x00000000 0x00040000>;
281 read-only;
282 };
283 partition@40000 {
284 label = "user_prg";
285 reg = <0x00040000 0x00400000>;
286 read-only;
287 };
288 partition@440000 {
289 label = "flash_fs";
290 reg = <0x00440000 0x03bc0000>;
291 };
292 };
293 };
294};
295
296&i2c2 {
297 pinctrl-0 = <&i2c2_pins>;
298 pinctrl-names = "default";
299
300 status = "okay";
301 clock-frequency = <400000>;
302
303 ak4642: codec@12 {
304 compatible = "asahi-kasei,ak4642";
305 #sound-dai-cells = <0>;
306 reg = <0x12>;
307 };
308
309 composite-in@20 {
310 compatible = "adi,adv7180";
311 reg = <0x20>;
312 remote = <&vin0>;
313
314 port {
315 adv7180: endpoint {
316 bus-width = <8>;
317 remote-endpoint = <&vin0ep>;
318 };
319 };
320 };
321
322 hdmi@39 {
323 compatible = "adi,adv7511w";
324 reg = <0x39>;
325 interrupt-parent = <&gpio3>;
326 interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
327
328 adi,input-depth = <8>;
329 adi,input-colorspace = "rgb";
330 adi,input-clock = "1x";
331 adi,input-style = <1>;
332 adi,input-justification = "evenly";
333
334 ports {
335 #address-cells = <1>;
336 #size-cells = <0>;
337
338 port@0 {
339 reg = <0>;
340 adv7511_in: endpoint {
341 remote-endpoint = <&du_out_rgb>;
342 };
343 };
344
345 port@1 {
346 reg = <1>;
347 adv7511_out: endpoint {
348 remote-endpoint = <&hdmi_con>;
349 };
350 };
351 };
352 };
353};
354
355&sata0 {
356 status = "okay";
357};
358
359/* composite video input */
360&vin0 {
361 status = "okay";
362 pinctrl-0 = <&vin0_pins>;
363 pinctrl-names = "default";
364
365 port {
366 #address-cells = <1>;
367 #size-cells = <0>;
368
369 vin0ep: endpoint {
370 remote-endpoint = <&adv7180>;
371 bus-width = <8>;
372 };
373 };
374};
375
376&pci0 {
377 pinctrl-0 = <&usb0_pins>;
378 pinctrl-names = "default";
379
380 status = "okay";
381};
382
383&pci1 {
384 pinctrl-0 = <&usb1_pins>;
385 pinctrl-names = "default";
386
387 status = "okay";
388};
389
390&hsusb {
391 pinctrl-0 = <&usb0_pins>;
392 pinctrl-names = "default";
393
394 status = "okay";
395};
396
397&usbphy {
398 status = "okay";
399};
400
401&pcie_bus_clk {
402 clock-frequency = <100000000>;
403};
404
405&pciec {
406 status = "okay";
407};
408
409&can0 {
410 pinctrl-0 = <&can0_pins>;
411 pinctrl-names = "default";
412
413 status = "okay";
414};
415
416&du {
417 pinctrl-0 = <&du_pins>;
418 pinctrl-names = "default";
419 status = "okay";
420
421 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 726>,
422 <&x3_clk>, <&x16_clk>;
423 clock-names = "du.0", "du.1", "lvds.0",
424 "dclkin.0", "dclkin.1";
425
426 ports {
427 port@1 {
428 endpoint {
429 remote-endpoint = <&adv7511_in>;
430 };
431 };
432 };
433};
434
435&rcar_sound {
436 pinctrl-0 = <&ssi_pins &audio_clk_pins>;
437 pinctrl-names = "default";
438 status = "okay";
439
440 /* Single DAI */
441 #sound-dai-cells = <0>;
442
443 rcar_sound,dai {
444 dai0 {
445 playback = <&ssi0>;
446 capture = <&ssi1>;
447 };
448 };
449};
450
451&ssi1 {
452 shared-pin;
453};