]> git.ipfire.org Git - people/ms/u-boot.git/blame - arch/arm/dts/rk3399-puma.dtsi
rockchip: dts: rk3399-puma: update USB configuration
[people/ms/u-boot.git] / arch / arm / dts / rk3399-puma.dtsi
CommitLineData
3c2bbd58
PT
1/*
2 * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
3 *
faf1afc4 4 * SPDX-License-Identifier: GPL-2.0+ X11
3c2bbd58
PT
5 */
6
3c2bbd58
PT
7#include <dt-bindings/pwm/pwm.h>
8#include "rk3399.dtsi"
3c2bbd58
PT
9
10/ {
11 model = "Theobroma Systems RK3399-Q7 SoM";
f592edd9 12 compatible = "tsd,rk3399-q7", "tsd,puma", "rockchip,rk3399";
3c2bbd58 13
572045b6 14 config {
56f580d3
PT
15 u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */
16 u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */
4436c5db 17 u-boot,efi-partition-entries-offset = <0x200000>; /* 2MB */
f592edd9 18 u-boot,boot-led = "module_led";
572045b6
PT
19 };
20
3c2bbd58
PT
21 chosen {
22 stdout-path = "serial0:115200n8";
775bd78a
PT
23 u-boot,spl-boot-order = \
24 "same-as-spl", &spiflash, &sdhci, &sdmmc;
3c2bbd58
PT
25 };
26
27 aliases {
28 spi0 = &spi1;
29 spi1 = &spi5;
30 };
31
f592edd9
PT
32 leds {
33 compatible = "gpio-leds";
34 pinctrl-names = "default";
35 pinctrl-0 = <&leds_pins_puma>;
36
37 module_led {
38 label = "module_led";
39 gpios = <&gpio2 25 GPIO_ACTIVE_HIGH>;
40 linux,default-trigger = "heartbeat";
41 };
42
43 sd_card_led {
44 label = "sd_card_led";
45 gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
46 linux,default-trigger = "mmc0";
47 };
48 };
49
50 clkin_gmac: external-gmac-clock {
51 compatible = "fixed-clock";
52 clock-frequency = <125000000>;
53 clock-output-names = "clkin_gmac";
54 #clock-cells = <0>;
55 };
56
57 dw_hdmi_audio: dw-hdmi-audio {
58 status = "enabled";
59 compatible = "rockchip,dw-hdmi-audio";
60 #sound-dai-cells = <0>;
61 };
62
63 hdmi_codec: hdmi-codec {
64 compatible = "simple-audio-card";
65 simple-audio-card,format = "i2s";
66 simple-audio-card,mclk-fs = <256>;
67 simple-audio-card,name = "HDMI-CODEC";
68
69 simple-audio-card,cpu {
70 sound-dai = <&i2s2>;
71 };
72
73 simple-audio-card,codec {
74 sound-dai = <&hdmi>;
75 };
76 };
77
78 hdmi_sound: hdmi-sound {
79 status = "disabled";
80 compatible = "simple-audio-card";
81 simple-audio-card,format = "i2s";
82 simple-audio-card,mclk-fs = <256>;
83 simple-audio-card,name = "rockchip,hdmi";
84
85 simple-audio-card,cpu {
86 sound-dai = <&i2s2>;
87 };
88 simple-audio-card,codec {
89 sound-dai = <&hdmi>;
90 };
91 };
92
46c89c8e
PT
93 usbhub_enable: usbhub_enable {
94 compatible = "regulator-fixed";
95 regulator-name = "usbhub_enable";
96 enable-active-low;
f2a95131 97 gpio = <&gpio4 3 GPIO_ACTIVE_LOW>;
46c89c8e
PT
98 regulator-boot-on;
99 regulator-min-microvolt = <3300000>;
100 regulator-max-microvolt = <3300000>;
101 };
102
482cf223
PT
103 /*
104 * The Qseven BIOS_DISABLE signal on the RK3399-Q7 keeps the on-module
105 * eMMC and SPI flash powered-down initially (in fact it keeps the
106 * reset signal asserted). Even though it is an enable signal, we
107 * model this as a regulator.
108 */
109 bios_enable: bios_enable {
110 compatible = "regulator-fixed";
111 u-boot,dm-pre-reloc;
112 regulator-name = "bios_enable";
df1e6212
PT
113 enable-active-high;
114 gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
482cf223
PT
115 regulator-always-on;
116 regulator-boot-on;
117 regulator-min-microvolt = <1800000>;
118 regulator-max-microvolt = <1800000>;
119 };
120
f592edd9
PT
121 vccadc_ref: vccadc-ref {
122 compatible = "regulator-fixed";
123 regulator-name = "vcc1v8_sys";
3c2bbd58
PT
124 regulator-always-on;
125 regulator-boot-on;
f592edd9
PT
126 regulator-min-microvolt = <1800000>;
127 regulator-max-microvolt = <1800000>;
3c2bbd58
PT
128 };
129
130 vcc3v3_sys: vcc3v3-sys {
131 compatible = "regulator-fixed";
132 regulator-name = "vcc3v3_sys";
133 regulator-always-on;
134 regulator-boot-on;
135 regulator-min-microvolt = <3300000>;
136 regulator-max-microvolt = <3300000>;
137 };
138
f592edd9 139 vcc5v0_otg: vcc5v0-otg-regulator {
3c2bbd58 140 compatible = "regulator-fixed";
f592edd9
PT
141 enable-active-high;
142 gpio = <&gpio0 2 GPIO_ACTIVE_HIGH>;
143 pinctrl-names = "default";
144 pinctrl-0 = <&otg_vbus_drv>;
145 regulator-name = "vcc5v0_otg";
3c2bbd58 146 regulator-always-on;
3c2bbd58
PT
147 };
148
f592edd9 149 vcc5v0_host: vcc5v0-host-regulator {
3c2bbd58 150 compatible = "regulator-fixed";
f592edd9
PT
151 enable-active-low;
152 gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>;
153 pinctrl-names = "default";
154 pinctrl-0 = <&host_vbus_drv>;
3c2bbd58 155 regulator-name = "vcc5v0_host";
f592edd9 156 regulator-always-on;
3c2bbd58
PT
157 };
158
f592edd9
PT
159 vcc5v0_sys: vcc5v0-sys {
160 compatible = "regulator-fixed";
161 regulator-name = "vcc5v0_sys";
162 regulator-always-on;
163 regulator-boot-on;
164 regulator-min-microvolt = <5000000>;
165 regulator-max-microvolt = <5000000>;
3c2bbd58
PT
166 };
167
168 vcc_phy: vcc-phy-regulator {
169 compatible = "regulator-fixed";
170 regulator-name = "vcc_phy";
171 regulator-always-on;
172 regulator-boot-on;
173 };
f592edd9
PT
174
175 vdd_log: vdd-log {
176 compatible = "pwm-regulator";
177 pwms = <&pwm2 0 25000 1>;
178 regulator-name = "vdd_log";
179 regulator-min-microvolt = <800000>;
180 regulator-max-microvolt = <1400000>;
181 regulator-always-on;
182 regulator-boot-on;
183
184 /* for rockchip boot on */
185 rockchip,pwm_id= <2>;
186 rockchip,pwm_voltage = <1000000>;
187 };
3c2bbd58
PT
188};
189
190&emmc_phy {
191 status = "okay";
192};
193
f592edd9
PT
194&gmac {
195 phy-supply = <&vcc_phy>;
196 phy-mode = "rgmii";
197 clock_in_out = "input";
198 snps,reset-gpio = <&gpio3 16 GPIO_ACTIVE_LOW>;
199 snps,reset-active-low;
200 snps,reset-delays-us = <2 10000 50000>;
201 assigned-clocks = <&cru SCLK_RMII_SRC>;
202 assigned-clock-parents = <&clkin_gmac>;
203 pinctrl-names = "default";
204 pinctrl-0 = <&rgmii_pins>;
205 tx_delay = <0x10>;
206 rx_delay = <0x10>;
3c2bbd58
PT
207 status = "okay";
208};
209
f592edd9
PT
210&hdmi {
211 #address-cells = <1>;
212 #size-cells = <0>;
213 #sound-dai-cells = <0>;
3c2bbd58
PT
214 status = "okay";
215};
216
f592edd9 217&i2c0 {
3c2bbd58 218 status = "okay";
f592edd9
PT
219 i2c-scl-rising-time-ns = <168>;
220 i2c-scl-falling-time-ns = <4>;
221 clock-frequency = <400000>;
222
223 vdd_gpu: fan535555@60 {
224 compatible = "fcs,fan53555";
225 reg = <0x60>;
226 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
227 vin-supply = <&vcc5v0_sys>;
228 regulator-compatible = "fan53555-reg";
229 regulator-name = "vdd_gpu";
230 regulator-min-microvolt = <600000>;
231 regulator-max-microvolt = <1230000>;
232 regulator-ramp-delay = <1000>;
233 fcs,suspend-voltage-selector = <1>;
234 regulator-always-on;
235 regulator-boot-on;
236 regulator-initial-state = <3>;
237 regulator-state-mem {
238 regulator-off-in-suspend;
239 };
240 };
241
242 rk808: pmic@1b {
243 compatible = "rockchip,rk808";
244 reg = <0x1b>;
245 interrupt-parent = <&gpio1>;
246 interrupts = <22 IRQ_TYPE_LEVEL_LOW>; // TODO check interrupt?
247 pinctrl-names = "default";
248 pinctrl-0 = <&pmic_int_l>;
249 rockchip,system-power-controller;
250 wakeup-source;
251 #clock-cells = <1>;
252 clock-output-names = "xin32k", "rk808-clkout2";
253
254 vcc1-supply = <&vcc5v0_sys>;
255 vcc2-supply = <&vcc5v0_sys>;
256 vcc3-supply = <&vcc5v0_sys>;
257 vcc4-supply = <&vcc5v0_sys>;
258 vcc6-supply = <&vcc5v0_sys>;
259 vcc7-supply = <&vcc5v0_sys>;
260 vcc8-supply = <&vcc3v3_sys>;
261 vcc9-supply = <&vcc5v0_sys>;
262 vcc10-supply = <&vcc5v0_sys>;
263 vcc11-supply = <&vcc5v0_sys>;
264 vcc12-supply = <&vcc3v3_sys>;
265 vddio-supply = <&vcc1v8_pmu>;
266
267 regulators {
268 vdd_center: DCDC_REG1 {
269 regulator-always-on;
270 regulator-boot-on;
271 regulator-min-microvolt = <750000>;
272 regulator-max-microvolt = <1350000>;
273 regulator-ramp-delay = <6001>;
274 regulator-name = "vdd_center";
275 regulator-state-mem {
276 regulator-off-in-suspend;
277 };
278 };
279
280 vdd_cpu_l: DCDC_REG2 {
281 regulator-always-on;
282 regulator-boot-on;
283 regulator-min-microvolt = <750000>;
284 regulator-max-microvolt = <1350000>;
285 regulator-ramp-delay = <6001>;
286 regulator-name = "vdd_cpu_l";
287 regulator-state-mem {
288 regulator-off-in-suspend;
289 };
290 };
291
292 vcc_ddr: DCDC_REG3 {
293 regulator-always-on;
294 regulator-boot-on;
295 regulator-name = "vcc_ddr";
296 regulator-state-mem {
297 regulator-on-in-suspend;
298 };
299 };
300
301 vcc_1v8: DCDC_REG4 {
302 regulator-always-on;
303 regulator-boot-on;
304 regulator-min-microvolt = <1800000>;
305 regulator-max-microvolt = <1800000>;
306 regulator-name = "vcc_1v8";
307 regulator-state-mem {
308 regulator-on-in-suspend;
309 regulator-suspend-microvolt = <1800000>;
310 };
311 };
312
313 vcc_ldo1: LDO_REG1 {
314 regulator-boot-on;
315 regulator-min-microvolt = <1800000>;
316 regulator-max-microvolt = <1800000>;
317 regulator-name = "vcc_ldo1";
318 regulator-state-mem {
319 regulator-off-in-suspend;
320 };
321 };
322
323 vcc1v8_hdmi: LDO_REG2 {
324 regulator-always-on;
325 regulator-boot-on;
326 regulator-min-microvolt = <1800000>;
327 regulator-max-microvolt = <1800000>;
328 regulator-name = "vcc1v8_hdmi";
329 regulator-state-mem {
330 regulator-off-in-suspend;
331 };
332 };
333
334 vcc1v8_pmu: LDO_REG3 {
335 regulator-always-on;
336 regulator-boot-on;
337 regulator-min-microvolt = <1800000>;
338 regulator-max-microvolt = <1800000>;
339 regulator-name = "vcc1v8_pmu";
340 regulator-state-mem {
341 regulator-on-in-suspend;
342 regulator-suspend-microvolt = <1800000>;
343 };
344 };
345
346 vcc_sd: LDO_REG4 {
347 regulator-always-on;
348 regulator-boot-on;
349 regulator-min-microvolt = <1800000>;
350 regulator-max-microvolt = <3300000>;
351 regulator-name = "vcc_sd";
352 regulator-state-mem {
353 regulator-on-in-suspend;
354 regulator-suspend-microvolt = <3300000>;
355 };
356 };
357
358 vcc_ldo5: LDO_REG5 {
359 regulator-boot-on;
360 regulator-min-microvolt = <3000000>;
361 regulator-max-microvolt = <3000000>;
362 regulator-name = "vcc_ldo5";
363 regulator-state-mem {
364 regulator-off-in-suspend;
365 };
366 };
367
368 vcc_ldo6: LDO_REG6 {
369 regulator-boot-on;
370 regulator-min-microvolt = <1500000>;
371 regulator-max-microvolt = <1500000>;
372 regulator-name = "vcc_ldo6";
373 regulator-state-mem {
374 regulator-off-in-suspend;
375 };
376 };
377
378 vcc0v9_hdmi: LDO_REG7 {
379 regulator-always-on;
380 regulator-boot-on;
381 regulator-min-microvolt = <900000>;
382 regulator-max-microvolt = <900000>;
383 regulator-name = "vcc0v9_hdmi";
384 regulator-state-mem {
385 regulator-off-in-suspend;
386 };
387 };
388
389 vcc_efuse: LDO_REG8 {
390 regulator-always-on;
391 regulator-boot-on;
392 regulator-min-microvolt = <1800000>;
393 regulator-max-microvolt = <1800000>;
394 regulator-name = "vcc_efuse";
395 regulator-state-mem {
396 regulator-off-in-suspend;
397 };
398 };
399
400 vcc3v3_s3: SWITCH_REG1 {
401 regulator-always-on;
402 regulator-boot-on;
403 regulator-name = "vcc3v3_s3";
404 regulator-state-mem {
405 regulator-off-in-suspend;
406 };
407 };
408
409 vcc3v3_s0: SWITCH_REG2 {
410 regulator-always-on;
411 regulator-boot-on;
412 regulator-name = "vcc3v3_s0";
413 regulator-state-mem {
414 regulator-off-in-suspend;
415 };
416 };
417 };
418 };
3c2bbd58
PT
419};
420
f592edd9
PT
421&i2c8 {
422 status = "okay";
423 clock-frequency = <400000>;
424
425 vdd_cpu_b: fan53555@60 {
426 compatible = "fcs,fan53555";
427 reg = <0x60>;
428 vsel-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
429 vin-supply = <&vcc5v0_sys>;
430 regulator-compatible = "fan53555-reg";
431 regulator-name = "vdd_cpu_b";
432 regulator-min-microvolt = <600000>;
433 regulator-max-microvolt = <1230000>;
434 regulator-ramp-delay = <1000>;
435 fcs,suspend-voltage-selector = <1>;
436 regulator-always-on;
437 regulator-boot-on;
438 regulator-initial-state = <3>;
439 regulator-state-mem {
440 regulator-off-in-suspend;
441 };
442 };
443};
444
445&i2s0 {
446 status = "okay";
447 rockchip,i2s-broken-burst-len;
448 rockchip,playback-channels = <8>;
449 rockchip,capture-channels = <8>;
450 #sound-dai-cells = <0>;
451};
452
453&i2s2 {
454 #sound-dai-cells = <0>;
455 status = "okay";
456};
457
458&io_domains {
459 status = "okay";
460
461 bt656-supply = <&vcc_1v8>; /* bt656_gpio2ab_ms */
462 audio-supply = <&vcc_1v8>; /* audio_gpio3d4a_ms */
463 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
464 gpio1830-supply = <&vcc_1v8>; /* gpio1833_gpio4cd_ms */
465};
466
467&pcie0 {
468 assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
469 assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
470 assigned-clock-rates = <100000000>;
471 ep-gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
472 num-lanes = <4>;
473 pinctrl-names = "default";
474 pinctrl-0 = <&pcie_clkreqn>;
475 status = "okay";
476};
477
478&pcie_phy {
482cf223 479 status = "okay";
f592edd9
PT
480};
481
482&pmu_io_domains {
483 status = "okay";
484 pmu1830-supply = <&vcc_1v8>;
485};
486
487&pwm0 {
488 status = "okay";
489};
490
491&pwm2 {
3c2bbd58
PT
492 status = "okay";
493};
494
495&sdhci {
496 bus-width = <8>;
497 mmc-hs400-1_8v;
f592edd9 498 supports-emmc;
3c2bbd58 499 non-removable;
f592edd9
PT
500 keep-power-in-suspend;
501 mmc-hs400-enhanced-strobe;
3c2bbd58
PT
502 status = "okay";
503};
504
f592edd9 505&sdmmc {
482cf223 506 u-boot,dm-pre-reloc;
f592edd9
PT
507 clock-frequency = <150000000>;
508 clock-freq-min-max = <100000 150000000>;
509 supports-sd;
510 bus-width = <4>;
511 cap-mmc-highspeed;
512 cap-sd-highspeed;
513 disable-wp;
514 num-slots = <1>;
515 vqmmc-supply = <&vcc_sd>;
516 pinctrl-names = "default";
517 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
3c2bbd58
PT
518 status = "okay";
519};
520
521&uart2 {
522 status = "okay";
523};
524
525&usb_host0_ehci {
b1e1ce2c 526 status = "disabled";
3c2bbd58
PT
527};
528
529&usb_host0_ohci {
b1e1ce2c 530 status = "disabled";
3c2bbd58
PT
531};
532
533&dwc3_typec0 {
b1e1ce2c 534 status = "okay";
3c2bbd58
PT
535};
536
537&usb_host1_ehci {
b1e1ce2c 538 status = "disabled";
3c2bbd58
PT
539};
540
541&usb_host1_ohci {
b1e1ce2c 542 status = "disabled";
3c2bbd58
PT
543};
544
545&dwc3_typec1 {
546 status = "okay";
547};
548
f592edd9
PT
549&vopb {
550 status = "okay";
551};
552
482cf223
PT
553&gpio3 {
554 u-boot,dm-pre-reloc;
555};
556
3c2bbd58 557&pinctrl {
f592edd9
PT
558 /* Pins that are not explicitely used by any devices */
559 pinctrl-names = "default";
560 pinctrl-0 = <&puma_pin_hog>;
482cf223 561
f592edd9
PT
562 hog {
563 puma_pin_hog: puma_pin_hog {
564 rockchip,pins =
565 /* We need pull-ups on Q7 buttons */
566 <0 4 RK_FUNC_GPIO &pcfg_pull_up>, /* LID_BTN# */
567 <0 10 RK_FUNC_GPIO &pcfg_pull_up>, /* BATLOW# */
568 <0 11 RK_FUNC_GPIO &pcfg_pull_up>, /* SLP_BTN# */
569 <0 9 RK_FUNC_GPIO &pcfg_pull_up>; /* BIOS_DISABLE# */
570 };
571 };
572
3c2bbd58
PT
573 pmic {
574 pmic_int_l: pmic-int-l {
575 rockchip,pins =
f592edd9 576 <1 22 RK_FUNC_GPIO &pcfg_pull_up>;
3c2bbd58 577 };
f592edd9
PT
578 };
579
580 leds_pins_puma: led_pins@0 {
581 rockchip,pins =
582 <2 25 RK_FUNC_GPIO &pcfg_pull_none>,
583 <1 2 RK_FUNC_GPIO &pcfg_pull_none>;
584 };
3c2bbd58 585
f592edd9
PT
586 usb2 {
587 otg_vbus_drv: otg-vbus-drv {
3c2bbd58 588 rockchip,pins =
f592edd9
PT
589 <0 2 RK_FUNC_GPIO &pcfg_pull_none>;
590 };
591
592 host_vbus_drv: host-vbus-drv {
593 rockchip,pins =
594 <0 2 RK_FUNC_GPIO &pcfg_pull_none>;
595 };
596 };
597
598 i2c8 {
599 i2c8_xfer_a: i2c8-xfer {
600 rockchip,pins = <1 21 RK_FUNC_1 &pcfg_pull_up>,
482cf223 601 <1 20 RK_FUNC_1 &pcfg_pull_up>;
3c2bbd58
PT
602 };
603 };
604};
605
f592edd9
PT
606&i2c1 {
607 status = "okay";
608 clock-frequency = <400000>;
609};
610&i2c2 {
611 status = "okay";
612 clock-frequency = <400000>;
613};
614&i2c4 {
615 status = "okay";
616 clock-frequency = <400000>;
617};
618&i2c6 {
619 status = "okay";
620 clock-frequency = <400000>;
621};
622
623&i2c6_xfer {
624 /* Enable pull-ups, the pins would float otherwise. */
625 rockchip,pins =
626 <2 10 RK_FUNC_2 &pcfg_pull_up>,
627 <2 9 RK_FUNC_2 &pcfg_pull_up>;
628};
629
630&i2c7 {
631 status = "okay";
632 clock-frequency = <400000>;
633
634 rtc_twi: rtc@6f {
635 compatible = "isil,isl1208";
636 reg = <0x6f>;
637 };
638 fan: fan@18 {
639 compatible = "ti,amc6821";
640 reg = <0x18>;
641 cooling-min-state = <0>;
642 cooling-max-state = <9>;
643 #cooling-cells = <2>;
644 };
645};
646
647&uart0 {
648 u-boot,dm-pre-reloc;
3c2bbd58 649 pinctrl-names = "default";
f592edd9 650 pinctrl-0 = <&uart0_xfer &uart0_cts>;
3c2bbd58
PT
651 status = "okay";
652};
653
f592edd9 654
3c2bbd58
PT
655&spi1 {
656 u-boot,dm-pre-reloc;
657
658 status = "okay";
659
660 #address-cells = <1>;
661 #size-cells = <0>;
662
663 spiflash: w25q32dw@0 {
664 u-boot,dm-pre-reloc;
665
666 compatible = "spi-flash";
667 reg = <0>;
2dd2c011 668 spi-max-frequency = <49500000>;
3c2bbd58
PT
669 spi-cpol;
670 spi-cpha;
671 };
672};
673
674&spi5 {
675 status = "okay";
676};