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Commit | Line | Data |
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b1a8de7e MK |
1 | /* |
2 | * Copyright 2016 - Michael Kurz <michi.kurz@gmail.com> | |
fd198ee1 | 3 | * Copyright 2016 - Vikas MANOCHA <vikas.manocha@st.com> |
b1a8de7e MK |
4 | * |
5 | * Based on: | |
6 | * stm32f429.dtsi from Linux | |
7 | * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com> | |
8 | * | |
9 | * This file is dual-licensed: you can use it either under the terms | |
10 | * of the GPL or the X11 license, at your option. Note that this dual | |
11 | * licensing only applies to this file, and not this project as a | |
12 | * whole. | |
13 | * | |
14 | * a) This file is free software; you can redistribute it and/or | |
15 | * modify it under the terms of the GNU General Public License as | |
16 | * published by the Free Software Foundation; either version 2 of the | |
17 | * License, or (at your option) any later version. | |
18 | * | |
19 | * This file is distributed in the hope that it will be useful, | |
20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
22 | * GNU General Public License for more details. | |
23 | * | |
24 | * Or, alternatively, | |
25 | * | |
26 | * b) Permission is hereby granted, free of charge, to any person | |
27 | * obtaining a copy of this software and associated documentation | |
28 | * files (the "Software"), to deal in the Software without | |
29 | * restriction, including without limitation the rights to use, | |
30 | * copy, modify, merge, publish, distribute, sublicense, and/or | |
31 | * sell copies of the Software, and to permit persons to whom the | |
32 | * Software is furnished to do so, subject to the following | |
33 | * conditions: | |
34 | * | |
35 | * The above copyright notice and this permission notice shall be | |
36 | * included in all copies or substantial portions of the Software. | |
37 | * | |
38 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
39 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
40 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
41 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
42 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
43 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
44 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
45 | * OTHER DEALINGS IN THE SOFTWARE. | |
46 | */ | |
47 | ||
48 | #include "armv7-m.dtsi" | |
49 | #include <dt-bindings/pinctrl/stm32f746-pinfunc.h> | |
fa87abb6 PC |
50 | #include <dt-bindings/clock/stm32fx-clock.h> |
51 | #include <dt-bindings/mfd/stm32f7-rcc.h> | |
b1a8de7e MK |
52 | |
53 | / { | |
84bfdc17 VM |
54 | clocks { |
55 | clk_hse: clk-hse { | |
56 | #clock-cells = <0>; | |
57 | compatible = "fixed-clock"; | |
58 | clock-frequency = <0>; | |
59 | }; | |
60 | }; | |
61 | ||
b1a8de7e | 62 | soc { |
84bfdc17 | 63 | u-boot,dm-pre-reloc; |
b1a8de7e MK |
64 | mac: ethernet@40028000 { |
65 | compatible = "st,stm32-dwmac"; | |
66 | reg = <0x40028000 0x8000>; | |
67 | reg-names = "stmmaceth"; | |
68 | interrupts = <61>, <62>; | |
69 | interrupt-names = "macirq", "eth_wake_irq"; | |
70 | snps,pbl = <8>; | |
71 | snps,mixed-burst; | |
72 | dma-ranges; | |
73 | status = "disabled"; | |
74 | }; | |
75 | ||
fd198ee1 VM |
76 | fmc: fmc@A0000000 { |
77 | compatible = "st,stm32-fmc"; | |
78 | reg = <0xA0000000 0x1000>; | |
fa87abb6 | 79 | clocks = <&rcc 0 STM32F7_AHB3_CLOCK(FMC)>; |
fd198ee1 VM |
80 | u-boot,dm-pre-reloc; |
81 | }; | |
82 | ||
b1a8de7e MK |
83 | qspi: quadspi@A0001000 { |
84 | compatible = "st,stm32-qspi"; | |
85 | #address-cells = <1>; | |
86 | #size-cells = <0>; | |
87 | reg = <0xA0001000 0x1000>, <0x90000000 0x10000000>; | |
88 | reg-names = "QuadSPI", "QuadSPI-memory"; | |
89 | interrupts = <92>; | |
90 | spi-max-frequency = <108000000>; | |
fa87abb6 | 91 | clocks = <&rcc 0 STM32F7_AHB3_CLOCK(QSPI)>; |
b1a8de7e MK |
92 | status = "disabled"; |
93 | }; | |
84bfdc17 | 94 | usart1: serial@40011000 { |
1113ad49 | 95 | compatible = "st,stm32f7-usart", "st,stm32f7-uart"; |
84bfdc17 VM |
96 | reg = <0x40011000 0x400>; |
97 | interrupts = <37>; | |
fa87abb6 | 98 | clocks = <&rcc 0 STM32F7_APB2_CLOCK(USART1)>; |
84bfdc17 VM |
99 | status = "disabled"; |
100 | u-boot,dm-pre-reloc; | |
101 | }; | |
102 | rcc: rcc@40023810 { | |
103 | #reset-cells = <1>; | |
104 | #clock-cells = <2>; | |
105 | compatible = "st,stm32f42xx-rcc", "st,stm32-rcc"; | |
106 | reg = <0x40023800 0x400>; | |
107 | clocks = <&clk_hse>; | |
108 | u-boot,dm-pre-reloc; | |
109 | }; | |
110 | ||
da4e17f2 VM |
111 | pinctrl: pin-controller { |
112 | #address-cells = <1>; | |
113 | #size-cells = <1>; | |
114 | compatible = "st,stm32f746-pinctrl"; | |
115 | ranges = <0 0x40020000 0x3000>; | |
116 | u-boot,dm-pre-reloc; | |
117 | pins-are-numbered; | |
e34e19fe | 118 | |
d33a6a2f VM |
119 | gpioa: gpio@40020000 { |
120 | gpio-controller; | |
121 | #gpio-cells = <2>; | |
122 | compatible = "st,stm32-gpio"; | |
123 | reg = <0x0 0x400>; | |
fa87abb6 | 124 | clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOA)>; |
d33a6a2f VM |
125 | st,bank-name = "GPIOA"; |
126 | u-boot,dm-pre-reloc; | |
127 | }; | |
128 | ||
129 | gpiob: gpio@40020400 { | |
130 | gpio-controller; | |
131 | #gpio-cells = <2>; | |
132 | compatible = "st,stm32-gpio"; | |
133 | reg = <0x400 0x400>; | |
fa87abb6 | 134 | clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOB)>; |
d33a6a2f VM |
135 | st,bank-name = "GPIOB"; |
136 | u-boot,dm-pre-reloc; | |
137 | }; | |
138 | ||
139 | ||
140 | gpioc: gpio@40020800 { | |
141 | gpio-controller; | |
142 | #gpio-cells = <2>; | |
143 | compatible = "st,stm32-gpio"; | |
144 | reg = <0x800 0x400>; | |
fa87abb6 | 145 | clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOC)>; |
d33a6a2f VM |
146 | st,bank-name = "GPIOC"; |
147 | u-boot,dm-pre-reloc; | |
148 | }; | |
149 | ||
150 | gpiod: gpio@40020c00 { | |
151 | gpio-controller; | |
152 | #gpio-cells = <2>; | |
153 | compatible = "st,stm32-gpio"; | |
154 | reg = <0xc00 0x400>; | |
fa87abb6 | 155 | clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOD)>; |
d33a6a2f VM |
156 | st,bank-name = "GPIOD"; |
157 | u-boot,dm-pre-reloc; | |
158 | }; | |
159 | ||
160 | gpioe: gpio@40021000 { | |
161 | gpio-controller; | |
162 | #gpio-cells = <2>; | |
163 | compatible = "st,stm32-gpio"; | |
164 | reg = <0x1000 0x400>; | |
fa87abb6 | 165 | clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOE)>; |
d33a6a2f VM |
166 | st,bank-name = "GPIOE"; |
167 | u-boot,dm-pre-reloc; | |
168 | }; | |
169 | ||
170 | gpiof: gpio@40021400 { | |
171 | gpio-controller; | |
172 | #gpio-cells = <2>; | |
173 | compatible = "st,stm32-gpio"; | |
174 | reg = <0x1400 0x400>; | |
fa87abb6 | 175 | clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOF)>; |
d33a6a2f VM |
176 | st,bank-name = "GPIOF"; |
177 | u-boot,dm-pre-reloc; | |
178 | }; | |
179 | ||
180 | gpiog: gpio@40021800 { | |
181 | gpio-controller; | |
182 | #gpio-cells = <2>; | |
183 | compatible = "st,stm32-gpio"; | |
184 | reg = <0x1800 0x400>; | |
fa87abb6 | 185 | clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOG)>; |
d33a6a2f VM |
186 | st,bank-name = "GPIOG"; |
187 | u-boot,dm-pre-reloc; | |
188 | }; | |
189 | ||
190 | gpioh: gpio@40021c00 { | |
191 | gpio-controller; | |
192 | #gpio-cells = <2>; | |
193 | compatible = "st,stm32-gpio"; | |
194 | reg = <0x1c00 0x400>; | |
fa87abb6 | 195 | clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOH)>; |
d33a6a2f VM |
196 | st,bank-name = "GPIOH"; |
197 | u-boot,dm-pre-reloc; | |
198 | }; | |
199 | ||
200 | gpioi: gpio@40022000 { | |
201 | gpio-controller; | |
202 | #gpio-cells = <2>; | |
203 | compatible = "st,stm32-gpio"; | |
204 | reg = <0x2000 0x400>; | |
fa87abb6 | 205 | clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOI)>; |
d33a6a2f VM |
206 | st,bank-name = "GPIOI"; |
207 | u-boot,dm-pre-reloc; | |
208 | }; | |
209 | ||
210 | gpioj: gpio@40022400 { | |
211 | gpio-controller; | |
212 | #gpio-cells = <2>; | |
213 | compatible = "st,stm32-gpio"; | |
214 | reg = <0x2400 0x400>; | |
fa87abb6 | 215 | clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOJ)>; |
d33a6a2f VM |
216 | st,bank-name = "GPIOJ"; |
217 | u-boot,dm-pre-reloc; | |
218 | }; | |
219 | ||
220 | gpiok: gpio@40022800 { | |
221 | gpio-controller; | |
222 | #gpio-cells = <2>; | |
223 | compatible = "st,stm32-gpio"; | |
224 | reg = <0x2800 0x400>; | |
fa87abb6 | 225 | clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOK)>; |
d33a6a2f VM |
226 | st,bank-name = "GPIOK"; |
227 | u-boot,dm-pre-reloc; | |
228 | }; | |
229 | ||
da4e17f2 | 230 | }; |
b1a8de7e MK |
231 | }; |
232 | }; | |
233 | ||
234 | &systick { | |
235 | status = "okay"; | |
236 | }; |