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37a79081
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1/*
2 * Device Tree Source for the R-Car Gen3 ULCB board
3 *
4 * Copyright (C) 2016 Renesas Electronics Corp.
5 * Copyright (C) 2016 Cogent Embedded, Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/input/input.h>
14
15/ {
16 model = "Renesas R-Car Gen3 ULCB board";
17
18 aliases {
19 serial0 = &scif2;
20 ethernet0 = &avb;
21 };
22
23 chosen {
24 stdout-path = "serial0:115200n8";
25 };
26
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27 cpld {
28 compatible = "renesas,ulcb-cpld";
29 status = "okay";
30 gpio-sck = <&gpio6 8 0>;
31 gpio-mosi = <&gpio6 7 0>;
32 gpio-miso = <&gpio6 10 0>;
33 gpio-sstbz = <&gpio2 3 0>;
34 };
35
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36 audio_clkout: audio-clkout {
37 /*
38 * This is same as <&rcar_sound 0>
39 * but needed to avoid cs2000/rcar_sound probe dead-lock
40 */
41 compatible = "fixed-clock";
42 #clock-cells = <0>;
43 clock-frequency = <11289600>;
44 };
45
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46 hdmi0-out {
47 compatible = "hdmi-connector";
48 type = "a";
49
50 port {
51 hdmi0_con: endpoint {
52 };
53 };
54 };
55
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56 keyboard {
57 compatible = "gpio-keys";
58
59 key-1 {
60 linux,code = <KEY_1>;
61 label = "SW3";
62 wakeup-source;
63 debounce-interval = <20>;
64 gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
65 };
66 };
67
68 leds {
69 compatible = "gpio-leds";
70
71 led5 {
72 gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
73 };
74 led6 {
75 gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
76 };
77 };
78
79 reg_1p8v: regulator0 {
80 compatible = "regulator-fixed";
81 regulator-name = "fixed-1.8V";
82 regulator-min-microvolt = <1800000>;
83 regulator-max-microvolt = <1800000>;
84 regulator-boot-on;
85 regulator-always-on;
86 };
87
88 reg_3p3v: regulator1 {
89 compatible = "regulator-fixed";
90 regulator-name = "fixed-3.3V";
91 regulator-min-microvolt = <3300000>;
92 regulator-max-microvolt = <3300000>;
93 regulator-boot-on;
94 regulator-always-on;
95 };
96
97 rsnd_ak4613: sound {
98 compatible = "simple-audio-card";
99
100 simple-audio-card,format = "left_j";
101 simple-audio-card,bitclock-master = <&sndcpu>;
102 simple-audio-card,frame-master = <&sndcpu>;
103
104 sndcpu: simple-audio-card,cpu {
105 sound-dai = <&rcar_sound>;
106 };
107
108 sndcodec: simple-audio-card,codec {
109 sound-dai = <&ak4613>;
110 };
111 };
112
113 vcc_sdhi0: regulator-vcc-sdhi0 {
114 compatible = "regulator-fixed";
115
116 regulator-name = "SDHI0 Vcc";
117 regulator-min-microvolt = <3300000>;
118 regulator-max-microvolt = <3300000>;
119
120 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
121 enable-active-high;
122 };
123
124 vccq_sdhi0: regulator-vccq-sdhi0 {
125 compatible = "regulator-gpio";
126
127 regulator-name = "SDHI0 VccQ";
128 regulator-min-microvolt = <1800000>;
129 regulator-max-microvolt = <3300000>;
130
131 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
132 gpios-states = <1>;
133 states = <3300000 1
134 1800000 0>;
135 };
136
137 x12_clk: x12 {
138 compatible = "fixed-clock";
139 #clock-cells = <0>;
140 clock-frequency = <24576000>;
141 };
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142
143 x23_clk: x23-clock {
144 compatible = "fixed-clock";
145 #clock-cells = <0>;
146 clock-frequency = <25000000>;
147 };
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148};
149
150&audio_clk_a {
151 clock-frequency = <22579200>;
152};
153
154&avb {
155 pinctrl-0 = <&avb_pins>;
156 pinctrl-names = "default";
157 renesas,no-ether-link;
158 phy-handle = <&phy0>;
159 status = "okay";
160
161 phy0: ethernet-phy@0 {
162 rxc-skew-ps = <1500>;
163 reg = <0>;
164 interrupt-parent = <&gpio2>;
165 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
166 };
167};
168
169&ehci1 {
170 status = "okay";
171};
172
173&extal_clk {
174 clock-frequency = <16666666>;
175};
176
177&extalr_clk {
178 clock-frequency = <32768>;
179};
180
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181&hdmi0 {
182 status = "okay";
183
184 ports {
185 port@1 {
186 reg = <1>;
187 rcar_dw_hdmi0_out: endpoint {
188 remote-endpoint = <&hdmi0_con>;
189 };
190 };
191 };
192};
193
194&hdmi0_con {
195 remote-endpoint = <&rcar_dw_hdmi0_out>;
196};
197
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198&i2c2 {
199 pinctrl-0 = <&i2c2_pins>;
200 pinctrl-names = "default";
201
202 status = "okay";
203
204 clock-frequency = <100000>;
205
206 ak4613: codec@10 {
207 compatible = "asahi-kasei,ak4613";
208 #sound-dai-cells = <0>;
209 reg = <0x10>;
210 clocks = <&rcar_sound 3>;
211
212 asahi-kasei,in1-single-end;
213 asahi-kasei,in2-single-end;
214 asahi-kasei,out1-single-end;
215 asahi-kasei,out2-single-end;
216 asahi-kasei,out3-single-end;
217 asahi-kasei,out4-single-end;
218 asahi-kasei,out5-single-end;
219 asahi-kasei,out6-single-end;
220 };
221
222 cs2000: clk-multiplier@4f {
223 #clock-cells = <0>;
224 compatible = "cirrus,cs2000-cp";
225 reg = <0x4f>;
226 clocks = <&audio_clkout>, <&x12_clk>;
227 clock-names = "clk_in", "ref_clk";
228
229 assigned-clocks = <&cs2000>;
230 assigned-clock-rates = <24576000>; /* 1/1 divide */
231 };
232};
233
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234&i2c4 {
235 status = "okay";
236
237 clock-frequency = <400000>;
238
239 versaclock5: clock-generator@6a {
240 compatible = "idt,5p49v5925";
241 reg = <0x6a>;
242 #clock-cells = <1>;
243 clocks = <&x23_clk>;
244 clock-names = "xin";
245 };
246};
247
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248&i2c_dvfs {
249 status = "okay";
250};
251
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252&ohci1 {
253 status = "okay";
254};
255
256&pfc {
257 pinctrl-0 = <&scif_clk_pins>;
258 pinctrl-names = "default";
259
260 avb_pins: avb {
261 mux {
262 groups = "avb_link", "avb_phy_int", "avb_mdc",
263 "avb_mii";
264 function = "avb";
265 };
266
267 pins_mdc {
268 groups = "avb_mdc";
269 drive-strength = <24>;
270 };
271
272 pins_mii_tx {
273 pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
274 "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
275 drive-strength = <12>;
276 };
277 };
278
279 i2c2_pins: i2c2 {
280 groups = "i2c2_a";
281 function = "i2c2";
282 };
283
284 scif2_pins: scif2 {
285 groups = "scif2_data_a";
286 function = "scif2";
287 };
288
289 scif_clk_pins: scif_clk {
290 groups = "scif_clk_a";
291 function = "scif_clk";
292 };
293
294 sdhi0_pins: sd0 {
295 groups = "sdhi0_data4", "sdhi0_ctrl";
296 function = "sdhi0";
297 power-source = <3300>;
298 };
299
300 sdhi0_pins_uhs: sd0_uhs {
301 groups = "sdhi0_data4", "sdhi0_ctrl";
302 function = "sdhi0";
303 power-source = <1800>;
304 };
305
306 sdhi2_pins: sd2 {
307 groups = "sdhi2_data8", "sdhi2_ctrl";
308 function = "sdhi2";
5d1b875d 309 power-source = <1800>;
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310 };
311
312 sdhi2_pins_uhs: sd2_uhs {
313 groups = "sdhi2_data8", "sdhi2_ctrl";
314 function = "sdhi2";
315 power-source = <1800>;
316 };
317
318 sound_pins: sound {
319 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
320 function = "ssi";
321 };
322
323 sound_clk_pins: sound-clk {
324 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
325 "audio_clkout_a", "audio_clkout3_a";
326 function = "audio_clk";
327 };
328
329 usb1_pins: usb1 {
330 groups = "usb1";
331 function = "usb1";
332 };
333};
334
335&rcar_sound {
336 pinctrl-0 = <&sound_pins &sound_clk_pins>;
337 pinctrl-names = "default";
338
339 /* Single DAI */
340 #sound-dai-cells = <0>;
341
342 /* audio_clkout0/1/2/3 */
343 #clock-cells = <1>;
344 clock-frequency = <12288000 11289600>;
345
346 status = "okay";
347
348 /* update <audio_clk_b> to <cs2000> */
349 clocks = <&cpg CPG_MOD 1005>,
350 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
351 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
352 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
353 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
354 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
355 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
356 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
357 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
358 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
359 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
360 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
361 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
362 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
363 <&audio_clk_a>, <&cs2000>,
364 <&audio_clk_c>,
365 <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
366
367 rcar_sound,dai {
368 dai0 {
369 playback = <&ssi0 &src0 &dvc0>;
370 capture = <&ssi1 &src1 &dvc1>;
371 };
372 };
373};
374
375&scif2 {
376 pinctrl-0 = <&scif2_pins>;
377 pinctrl-names = "default";
378
379 status = "okay";
380};
381
382&scif_clk {
383 clock-frequency = <14745600>;
384};
385
386&sdhi0 {
387 pinctrl-0 = <&sdhi0_pins>;
388 pinctrl-1 = <&sdhi0_pins_uhs>;
389 pinctrl-names = "default", "state_uhs";
390
391 vmmc-supply = <&vcc_sdhi0>;
392 vqmmc-supply = <&vccq_sdhi0>;
393 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
394 bus-width = <4>;
395 sd-uhs-sdr50;
396 status = "okay";
397};
398
399&sdhi2 {
400 /* used for on-board 8bit eMMC */
401 pinctrl-0 = <&sdhi2_pins>;
402 pinctrl-1 = <&sdhi2_pins_uhs>;
403 pinctrl-names = "default", "state_uhs";
404
405 vmmc-supply = <&reg_3p3v>;
406 vqmmc-supply = <&reg_1p8v>;
407 bus-width = <8>;
408 mmc-hs200-1_8v;
409 non-removable;
410 status = "okay";
411};
412
413&ssi1 {
414 shared-pin;
415};
416
417&usb2_phy1 {
418 pinctrl-0 = <&usb1_pins>;
419 pinctrl-names = "default";
420
421 status = "okay";
422};
423
424&wdt0 {
425 timeout-sec = <60>;
426 status = "okay";
427};