[people/ms/u-boot.git] / arch / arm / dts / ulcb.dtsi

/*
 * Device Tree Source for the R-Car Gen3 ULCB board
 *
 * Copyright (C) 2016 Renesas Electronics Corp.
 * Copyright (C) 2016 Cogent Embedded, Inc.
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	model = "Renesas R-Car Gen3 ULCB board";

	aliases {
		serial0 = &scif2;
		ethernet0 = &avb;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	cpld {
		compatible = "renesas,ulcb-cpld";
		status = "okay";
		gpio-sck = <&gpio6 8 0>;
		gpio-mosi = <&gpio6 7 0>;
		gpio-miso = <&gpio6 10 0>;
		gpio-sstbz = <&gpio2 3 0>;
	};

	audio_clkout: audio-clkout {
		/*
		 * This is same as <&rcar_sound 0>
		 * but needed to avoid cs2000/rcar_sound probe dead-lock
		 */
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <11289600>;
	};

	keyboard {
		compatible = "gpio-keys";

		key-1 {
			linux,code = <KEY_1>;
			label = "SW3";
			wakeup-source;
			debounce-interval = <20>;
			gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
		};
	};

	leds {
		compatible = "gpio-leds";

		led5 {
			gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
		};
		led6 {
			gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
		};
	};

	reg_1p8v: regulator0 {
		compatible = "regulator-fixed";
		regulator-name = "fixed-1.8V";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-boot-on;
		regulator-always-on;
	};

	reg_3p3v: regulator1 {
		compatible = "regulator-fixed";
		regulator-name = "fixed-3.3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		regulator-always-on;
	};

	rsnd_ak4613: sound {
		compatible = "simple-audio-card";

		simple-audio-card,format = "left_j";
		simple-audio-card,bitclock-master = <&sndcpu>;
		simple-audio-card,frame-master = <&sndcpu>;

		sndcpu: simple-audio-card,cpu {
			sound-dai = <&rcar_sound>;
		};

		sndcodec: simple-audio-card,codec {
			sound-dai = <&ak4613>;
		};
	};

	vcc_sdhi0: regulator-vcc-sdhi0 {
		compatible = "regulator-fixed";

		regulator-name = "SDHI0 Vcc";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;

		gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	vccq_sdhi0: regulator-vccq-sdhi0 {
		compatible = "regulator-gpio";

		regulator-name = "SDHI0 VccQ";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <3300000>;

		gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
		gpios-states = <1>;
		states = <3300000 1
			  1800000 0>;
	};

	x12_clk: x12 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <24576000>;
	};
};

&audio_clk_a {
	clock-frequency = <22579200>;
};

&avb {
	pinctrl-0 = <&avb_pins>;
	pinctrl-names = "default";
	renesas,no-ether-link;
	phy-handle = <&phy0>;
	reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
	status = "okay";

	phy0: ethernet-phy@0 {
		rxc-skew-ps = <1500>;
		reg = <0>;
		interrupt-parent = <&gpio2>;
		interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
	};
};

&ehci1 {
	status = "okay";
};

&extal_clk {
	clock-frequency = <16666666>;
};

&extalr_clk {
	clock-frequency = <32768>;
};

&i2c2 {
	pinctrl-0 = <&i2c2_pins>;
	pinctrl-names = "default";

	status = "okay";

	clock-frequency = <100000>;

	ak4613: codec@10 {
		compatible = "asahi-kasei,ak4613";
		#sound-dai-cells = <0>;
		reg = <0x10>;
		clocks = <&rcar_sound 3>;

		asahi-kasei,in1-single-end;
		asahi-kasei,in2-single-end;
		asahi-kasei,out1-single-end;
		asahi-kasei,out2-single-end;
		asahi-kasei,out3-single-end;
		asahi-kasei,out4-single-end;
		asahi-kasei,out5-single-end;
		asahi-kasei,out6-single-end;
	};

	cs2000: clk-multiplier@4f {
		#clock-cells = <0>;
		compatible = "cirrus,cs2000-cp";
		reg = <0x4f>;
		clocks = <&audio_clkout>, <&x12_clk>;
		clock-names = "clk_in", "ref_clk";

		assigned-clocks = <&cs2000>;
		assigned-clock-rates = <24576000>; /* 1/1 divide */
	};
};

&i2c_dvfs {
	status = "okay";
};

&ohci1 {
	status = "okay";
};

&pfc {
	pinctrl-0 = <&scif_clk_pins>;
	pinctrl-names = "default";

	avb_pins: avb {
		mux {
			groups = "avb_link", "avb_phy_int", "avb_mdc",
				 "avb_mii";
			function = "avb";
		};

		pins_mdc {
			groups = "avb_mdc";
			drive-strength = <24>;
		};

		pins_mii_tx {
			pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
			       "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
			drive-strength = <12>;
		};
	};

	i2c2_pins: i2c2 {
		groups = "i2c2_a";
		function = "i2c2";
	};

	scif2_pins: scif2 {
		groups = "scif2_data_a";
		function = "scif2";
	};

	scif_clk_pins: scif_clk {
		groups = "scif_clk_a";
		function = "scif_clk";
	};

	sdhi0_pins: sd0 {
		groups = "sdhi0_data4", "sdhi0_ctrl";
		function = "sdhi0";
		power-source = <3300>;
	};

	sdhi0_pins_uhs: sd0_uhs {
		groups = "sdhi0_data4", "sdhi0_ctrl";
		function = "sdhi0";
		power-source = <1800>;
	};

	sdhi2_pins: sd2 {
		groups = "sdhi2_data8", "sdhi2_ctrl";
		function = "sdhi2";
		power-source = <1800>;
	};

	sdhi2_pins_uhs: sd2_uhs {
		groups = "sdhi2_data8", "sdhi2_ctrl";
		function = "sdhi2";
		power-source = <1800>;
	};

	sound_pins: sound {
		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
		function = "ssi";
	};

	sound_clk_pins: sound-clk {
		groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
			 "audio_clkout_a", "audio_clkout3_a";
		function = "audio_clk";
	};

	usb1_pins: usb1 {
		groups = "usb1";
		function = "usb1";
	};
};

&rcar_sound {
	pinctrl-0 = <&sound_pins &sound_clk_pins>;
	pinctrl-names = "default";

	/* Single DAI */
	#sound-dai-cells = <0>;

	/* audio_clkout0/1/2/3 */
	#clock-cells = <1>;
	clock-frequency = <12288000 11289600>;

	status = "okay";

	/* update <audio_clk_b> to <cs2000> */
	clocks = <&cpg CPG_MOD 1005>,
		 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
		 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
		 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
		 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
		 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
		 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
		 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
		 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
		 <&audio_clk_a>, <&cs2000>,
		 <&audio_clk_c>,
		 <&cpg CPG_CORE CPG_AUDIO_CLK_I>;

	rcar_sound,dai {
		dai0 {
			playback = <&ssi0 &src0 &dvc0>;
			capture  = <&ssi1 &src1 &dvc1>;
		};
	};
};

&scif2 {
	pinctrl-0 = <&scif2_pins>;
	pinctrl-names = "default";

	status = "okay";
};

&scif_clk {
	clock-frequency = <14745600>;
};

&sdhi0 {
	pinctrl-0 = <&sdhi0_pins>;
	pinctrl-1 = <&sdhi0_pins_uhs>;
	pinctrl-names = "default", "state_uhs";

	vmmc-supply = <&vcc_sdhi0>;
	vqmmc-supply = <&vccq_sdhi0>;
	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
	bus-width = <4>;
	sd-uhs-sdr50;
	status = "okay";
};

&sdhi2 {
	/* used for on-board 8bit eMMC */
	pinctrl-0 = <&sdhi2_pins>;
	pinctrl-1 = <&sdhi2_pins_uhs>;
	pinctrl-names = "default", "state_uhs";

	vmmc-supply = <&reg_3p3v>;
	vqmmc-supply = <&reg_1p8v>;
	bus-width = <8>;
	mmc-hs200-1_8v;
	non-removable;
	status = "okay";
};

&ssi1 {
	shared-pin;
};

&usb2_phy1 {
	pinctrl-0 = <&usb1_pins>;
	pinctrl-names = "default";

	status = "okay";
};

&wdt0 {
	timeout-sec = <60>;
	status = "okay";
};
Commit	Line	Data
37a79081 MV	1	/*
	2	* Device Tree Source for the R-Car Gen3 ULCB board
	3	*
	4	* Copyright (C) 2016 Renesas Electronics Corp.
	5	* Copyright (C) 2016 Cogent Embedded, Inc.
	6	*
	7	* This file is licensed under the terms of the GNU General Public License
	8	* version 2. This program is licensed "as is" without any warranty of any
	9	* kind, whether express or implied.
	10	*/
	11
	12	#include <dt-bindings/gpio/gpio.h>
	13	#include <dt-bindings/input/input.h>
	14
	15	/ {
	16	model = "Renesas R-Car Gen3 ULCB board";
	17
	18	aliases {
	19	serial0 = &scif2;
	20	ethernet0 = &avb;
	21	};
	22
	23	chosen {
	24	stdout-path = "serial0:115200n8";
	25	};
	26
ab61e175 MV	27	cpld {
	28	compatible = "renesas,ulcb-cpld";
	29	status = "okay";
	30	gpio-sck = <&gpio6 8 0>;
	31	gpio-mosi = <&gpio6 7 0>;
	32	gpio-miso = <&gpio6 10 0>;
	33	gpio-sstbz = <&gpio2 3 0>;
	34	};
	35
37a79081 MV	36	audio_clkout: audio-clkout {
	37	/*
	38	* This is same as <&rcar_sound 0>
	39	* but needed to avoid cs2000/rcar_sound probe dead-lock
	40	*/
	41	compatible = "fixed-clock";
	42	#clock-cells = <0>;
	43	clock-frequency = <11289600>;
	44	};
	45
	46	keyboard {
	47	compatible = "gpio-keys";
	48
	49	key-1 {
	50	linux,code = <KEY_1>;
	51	label = "SW3";
	52	wakeup-source;
	53	debounce-interval = <20>;
	54	gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
	55	};
	56	};
	57
	58	leds {
	59	compatible = "gpio-leds";
	60
	61	led5 {
	62	gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
	63	};
	64	led6 {
	65	gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
	66	};
	67	};
	68
	69	reg_1p8v: regulator0 {
	70	compatible = "regulator-fixed";
	71	regulator-name = "fixed-1.8V";
	72	regulator-min-microvolt = <1800000>;
	73	regulator-max-microvolt = <1800000>;
	74	regulator-boot-on;
	75	regulator-always-on;
	76	};
	77
	78	reg_3p3v: regulator1 {
	79	compatible = "regulator-fixed";
	80	regulator-name = "fixed-3.3V";
	81	regulator-min-microvolt = <3300000>;
	82	regulator-max-microvolt = <3300000>;
	83	regulator-boot-on;
	84	regulator-always-on;
	85	};
	86
	87	rsnd_ak4613: sound {
	88	compatible = "simple-audio-card";
	89
	90	simple-audio-card,format = "left_j";
	91	simple-audio-card,bitclock-master = <&sndcpu>;
	92	simple-audio-card,frame-master = <&sndcpu>;
	93
	94	sndcpu: simple-audio-card,cpu {
	95	sound-dai = <&rcar_sound>;
	96	};
	97
	98	sndcodec: simple-audio-card,codec {
	99	sound-dai = <&ak4613>;
100	};
101	};
102
103	vcc_sdhi0: regulator-vcc-sdhi0 {
104	compatible = "regulator-fixed";
105
106	regulator-name = "SDHI0 Vcc";
107	regulator-min-microvolt = <3300000>;
108	regulator-max-microvolt = <3300000>;
109
110	gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
111	enable-active-high;
112	};
113
114	vccq_sdhi0: regulator-vccq-sdhi0 {
115	compatible = "regulator-gpio";
116
117	regulator-name = "SDHI0 VccQ";
118	regulator-min-microvolt = <1800000>;
119	regulator-max-microvolt = <3300000>;
120
121	gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
122	gpios-states = <1>;
123	states = <3300000 1
124	1800000 0>;
125	};
126
127	x12_clk: x12 {
128	compatible = "fixed-clock";
129	#clock-cells = <0>;
130	clock-frequency = <24576000>;
131	};
132	};
133
134	&audio_clk_a {
135	clock-frequency = <22579200>;
136	};
137
138	&avb {
139	pinctrl-0 = <&avb_pins>;
140	pinctrl-names = "default";
141	renesas,no-ether-link;
142	phy-handle = <&phy0>;
891ac390	143	reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
37a79081 MV	144	status = "okay";
	145
	146	phy0: ethernet-phy@0 {
	147	rxc-skew-ps = <1500>;
	148	reg = <0>;
	149	interrupt-parent = <&gpio2>;
	150	interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
	151	};
	152	};
	153
	154	&ehci1 {
	155	status = "okay";
	156	};
	157
	158	&extal_clk {
	159	clock-frequency = <16666666>;
	160	};
	161
	162	&extalr_clk {
	163	clock-frequency = <32768>;
	164	};
	165
	166	&i2c2 {
	167	pinctrl-0 = <&i2c2_pins>;
	168	pinctrl-names = "default";
	169
	170	status = "okay";
	171
	172	clock-frequency = <100000>;
	173
	174	ak4613: codec@10 {
	175	compatible = "asahi-kasei,ak4613";
	176	#sound-dai-cells = <0>;
	177	reg = <0x10>;
	178	clocks = <&rcar_sound 3>;
	179
	180	asahi-kasei,in1-single-end;
	181	asahi-kasei,in2-single-end;
	182	asahi-kasei,out1-single-end;
	183	asahi-kasei,out2-single-end;
	184	asahi-kasei,out3-single-end;
	185	asahi-kasei,out4-single-end;
	186	asahi-kasei,out5-single-end;
	187	asahi-kasei,out6-single-end;
	188	};
	189
	190	cs2000: clk-multiplier@4f {
	191	#clock-cells = <0>;
	192	compatible = "cirrus,cs2000-cp";
	193	reg = <0x4f>;
	194	clocks = <&audio_clkout>, <&x12_clk>;
	195	clock-names = "clk_in", "ref_clk";
	196
	197	assigned-clocks = <&cs2000>;
	198	assigned-clock-rates = <24576000>; /* 1/1 divide */
	199	};
	200	};
	201
02e80f0c MV	202	&i2c_dvfs {
	203	status = "okay";
	204	};
	205
37a79081 MV	206	&ohci1 {
	207	status = "okay";
	208	};
	209
	210	&pfc {
	211	pinctrl-0 = <&scif_clk_pins>;
	212	pinctrl-names = "default";
	213
	214	avb_pins: avb {
	215	mux {
	216	groups = "avb_link", "avb_phy_int", "avb_mdc",
	217	"avb_mii";
	218	function = "avb";
	219	};
	220
	221	pins_mdc {
	222	groups = "avb_mdc";
	223	drive-strength = <24>;
	224	};
	225
	226	pins_mii_tx {
	227	pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
	228	"PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
	229	drive-strength = <12>;
	230	};
	231	};
	232
	233	i2c2_pins: i2c2 {
	234	groups = "i2c2_a";
	235	function = "i2c2";
	236	};
	237
	238	scif2_pins: scif2 {
	239	groups = "scif2_data_a";
	240	function = "scif2";
	241	};
	242
	243	scif_clk_pins: scif_clk {
	244	groups = "scif_clk_a";
	245	function = "scif_clk";
	246	};
	247
	248	sdhi0_pins: sd0 {
	249	groups = "sdhi0_data4", "sdhi0_ctrl";
	250	function = "sdhi0";
	251	power-source = <3300>;
	252	};
	253
	254	sdhi0_pins_uhs: sd0_uhs {
	255	groups = "sdhi0_data4", "sdhi0_ctrl";
	256	function = "sdhi0";
	257	power-source = <1800>;
	258	};
	259
	260	sdhi2_pins: sd2 {
	261	groups = "sdhi2_data8", "sdhi2_ctrl";
	262	function = "sdhi2";
5d1b875d	263	power-source = <1800>;
37a79081 MV	264	};
	265
	266	sdhi2_pins_uhs: sd2_uhs {
	267	groups = "sdhi2_data8", "sdhi2_ctrl";
	268	function = "sdhi2";
	269	power-source = <1800>;
	270	};
	271
	272	sound_pins: sound {
	273	groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
	274	function = "ssi";
	275	};
	276
	277	sound_clk_pins: sound-clk {
	278	groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
	279	"audio_clkout_a", "audio_clkout3_a";
	280	function = "audio_clk";
	281	};
	282
	283	usb1_pins: usb1 {
	284	groups = "usb1";
	285	function = "usb1";
	286	};
	287	};
	288
	289	&rcar_sound {
	290	pinctrl-0 = <&sound_pins &sound_clk_pins>;
	291	pinctrl-names = "default";
	292
	293	/* Single DAI */
	294	#sound-dai-cells = <0>;
	295
	296	/* audio_clkout0/1/2/3 */
	297	#clock-cells = <1>;
	298	clock-frequency = <12288000 11289600>;
	299
	300	status = "okay";
	301
	302	/* update <audio_clk_b> to <cs2000> */
	303	clocks = <&cpg CPG_MOD 1005>,
	304	<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
	305	<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
	306	<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
	307	<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
	308	<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
	309	<&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
	310	<&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
	311	<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
	312	<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
	313	<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
	314	<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
	315	<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
	316	<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
	317	<&audio_clk_a>, <&cs2000>,
	318	<&audio_clk_c>,
	319	<&cpg CPG_CORE CPG_AUDIO_CLK_I>;
	320
	321	rcar_sound,dai {
	322	dai0 {
	323	playback = <&ssi0 &src0 &dvc0>;
	324	capture = <&ssi1 &src1 &dvc1>;
	325	};
	326	};
	327	};
328
329	&scif2 {
330	pinctrl-0 = <&scif2_pins>;
331	pinctrl-names = "default";
332
333	status = "okay";
334	};
335
336	&scif_clk {
337	clock-frequency = <14745600>;
338	};
339
340	&sdhi0 {
341	pinctrl-0 = <&sdhi0_pins>;
342	pinctrl-1 = <&sdhi0_pins_uhs>;
343	pinctrl-names = "default", "state_uhs";
344
345	vmmc-supply = <&vcc_sdhi0>;
346	vqmmc-supply = <&vccq_sdhi0>;
347	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
348	bus-width = <4>;
349	sd-uhs-sdr50;
350	status = "okay";
351	};
352
353	&sdhi2 {
354	/* used for on-board 8bit eMMC */
355	pinctrl-0 = <&sdhi2_pins>;
356	pinctrl-1 = <&sdhi2_pins_uhs>;
357	pinctrl-names = "default", "state_uhs";
358
359	vmmc-supply = <&reg_3p3v>;
360	vqmmc-supply = <&reg_1p8v>;
361	bus-width = <8>;
362	mmc-hs200-1_8v;
363	non-removable;
364	status = "okay";
365	};
366
367	&ssi1 {
368	shared-pin;
369	};
370
371	&usb2_phy1 {
372	pinctrl-0 = <&usb1_pins>;
373	pinctrl-names = "default";
374
375	status = "okay";
376	};
377
378	&wdt0 {
379	timeout-sec = <60>;
380	status = "okay";
381	};