[people/ms/u-boot.git] / arch / arm / dts / zynq-picozed.dts

/*
 * Avnet PicoZed board DTS
 *
 * Copyright (C) 2015 Xilinx, Inc.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */
/dts-v1/;
#include "zynq-7000.dtsi"

/ {
	model = "Zynq PicoZed Board";
	compatible = "xlnx,zynq-picozed", "xlnx,zynq-7000";

	aliases {
		serial0 = &uart1;
		spi0 = &qspi;
		mmc0 = &sdhci1;
	};

	memory@0 {
		device_type = "memory";
		reg = <0 0x40000000>;
	};
};

&uart1 {
	u-boot,dm-pre-reloc;
	status = "okay";
};

&qspi {
	u-boot,dm-pre-reloc;
	status = "okay";
};

&sdhci1 {
	u-boot,dm-pre-reloc;
	status = "okay";
};
Commit	Line	Data
7a1aec8d NR	1	/*
	2	* Avnet PicoZed board DTS
	3	*
	4	* Copyright (C) 2015 Xilinx, Inc.
	5	*
	6	* SPDX-License-Identifier: GPL-2.0+
	7	*/
	8	/dts-v1/;
	9	#include "zynq-7000.dtsi"
	10
	11	/ {
	12	model = "Zynq PicoZed Board";
	13	compatible = "xlnx,zynq-picozed", "xlnx,zynq-7000";
	14
	15	aliases {
	16	serial0 = &uart1;
20ca6790 SDPP	17	spi0 = &qspi;
20ca6790 SDPP	18	mmc0 = &sdhci1;
7a1aec8d NR	19	};
7a1aec8d NR	20
cc7978be	21	memory@0 {
7a1aec8d NR	22	device_type = "memory";
	23	reg = <0 0x40000000>;
	24	};
	25	};
035c6b27 SG	26
	27	&uart1 {
	28	u-boot,dm-pre-reloc;
	29	status = "okay";
	30	};
20ca6790 SDPP	31
	32	&qspi {
	33	u-boot,dm-pre-reloc;
	34	status = "okay";
	35	};
	36
	37	&sdhci1 {
	38	u-boot,dm-pre-reloc;
	39	status = "okay";
	40	};