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Commit | Line | Data |
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9e0802bf JT |
1 | /* |
2 | * Xilinx ZC770 XM012 board DTS | |
3 | * | |
5c45b166 | 4 | * Copyright (C) 2013 - 2015 Xilinx, Inc. |
9e0802bf JT |
5 | * |
6 | * SPDX-License-Identifier: GPL-2.0+ | |
7 | */ | |
8 | /dts-v1/; | |
9 | #include "zynq-7000.dtsi" | |
10 | ||
11 | / { | |
9e0802bf | 12 | compatible = "xlnx,zynq-zc770-xm012", "xlnx,zynq-7000"; |
5c45b166 | 13 | model = "Xilinx Zynq"; |
7d34c5de | 14 | |
9f9d41ba | 15 | aliases { |
5c45b166 MS |
16 | i2c0 = &i2c0; |
17 | i2c1 = &i2c1; | |
9f9d41ba | 18 | serial0 = &uart1; |
5c45b166 | 19 | spi0 = &spi1; |
9f9d41ba MY |
20 | }; |
21 | ||
5c45b166 | 22 | chosen { |
936bbc5d | 23 | bootargs = ""; |
4691941b | 24 | stdout-path = "serial0:115200n8"; |
5c45b166 MS |
25 | }; |
26 | ||
cc7978be | 27 | memory@0 { |
7d34c5de | 28 | device_type = "memory"; |
5c45b166 MS |
29 | reg = <0x0 0x40000000>; |
30 | }; | |
31 | }; | |
32 | ||
5c45b166 MS |
33 | &can1 { |
34 | status = "okay"; | |
35 | }; | |
36 | ||
37 | &i2c0 { | |
38 | status = "okay"; | |
39 | clock-frequency = <400000>; | |
40 | ||
41 | m24c02_eeprom@52 { | |
42 | compatible = "at,24c02"; | |
43 | reg = <0x52>; | |
44 | }; | |
45 | }; | |
46 | ||
47 | &i2c1 { | |
48 | status = "okay"; | |
49 | clock-frequency = <400000>; | |
50 | ||
51 | m24c02_eeprom@52 { | |
52 | compatible = "at,24c02"; | |
53 | reg = <0x52>; | |
7d34c5de | 54 | }; |
9e0802bf | 55 | }; |
5c45b166 | 56 | |
7ebf67a3 MS |
57 | &spi1 { |
58 | status = "okay"; | |
59 | num-cs = <4>; | |
60 | is-decoded-cs = <0>; | |
61 | }; | |
62 | ||
5c45b166 | 63 | &uart1 { |
035c6b27 | 64 | u-boot,dm-pre-reloc; |
5c45b166 MS |
65 | status = "okay"; |
66 | }; |