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Commit | Line | Data |
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f8f36c5d JT |
1 | /* |
2 | * Xilinx ZED board DTS | |
3 | * | |
999667ca MS |
4 | * Copyright (C) 2011 - 2015 Xilinx |
5 | * Copyright (C) 2012 National Instruments Corp. | |
f8f36c5d JT |
6 | * |
7 | * SPDX-License-Identifier: GPL-2.0+ | |
8 | */ | |
9 | /dts-v1/; | |
10 | #include "zynq-7000.dtsi" | |
11 | ||
12 | / { | |
999667ca | 13 | model = "Zynq Zed Development Board"; |
f8f36c5d | 14 | compatible = "xlnx,zynq-zed", "xlnx,zynq-7000"; |
7d34c5de | 15 | |
9f9d41ba | 16 | aliases { |
999667ca | 17 | ethernet0 = &gem0; |
9f9d41ba | 18 | serial0 = &uart1; |
976dfb0f | 19 | spi0 = &qspi; |
8647219b | 20 | mmc0 = &sdhci0; |
9f9d41ba MY |
21 | }; |
22 | ||
cc7978be | 23 | memory@0 { |
7d34c5de | 24 | device_type = "memory"; |
999667ca | 25 | reg = <0x0 0x20000000>; |
7d34c5de | 26 | }; |
999667ca MS |
27 | |
28 | chosen { | |
936bbc5d | 29 | bootargs = ""; |
999667ca MS |
30 | stdout-path = "serial0:115200n8"; |
31 | }; | |
32 | ||
33 | usb_phy0: phy0 { | |
34 | compatible = "usb-nop-xceiv"; | |
35 | #phy-cells = <0>; | |
36 | }; | |
37 | }; | |
38 | ||
39 | &clkc { | |
40 | ps-clk-frequency = <33333333>; | |
41 | }; | |
42 | ||
43 | &gem0 { | |
44 | status = "okay"; | |
45 | phy-mode = "rgmii-id"; | |
46 | phy-handle = <ðernet_phy>; | |
47 | ||
48 | ethernet_phy: ethernet-phy@0 { | |
49 | reg = <0>; | |
50 | }; | |
51 | }; | |
52 | ||
a95d54b4 | 53 | &qspi { |
8647219b | 54 | u-boot,dm-pre-reloc; |
999667ca MS |
55 | status = "okay"; |
56 | }; | |
57 | ||
a95d54b4 | 58 | &sdhci0 { |
035c6b27 | 59 | u-boot,dm-pre-reloc; |
999667ca MS |
60 | status = "okay"; |
61 | }; | |
62 | ||
a95d54b4 | 63 | &uart1 { |
cb204a69 | 64 | u-boot,dm-pre-reloc; |
976dfb0f JT |
65 | status = "okay"; |
66 | }; | |
67 | ||
999667ca MS |
68 | &usb0 { |
69 | status = "okay"; | |
70 | dr_mode = "host"; | |
71 | usb-phy = <&usb_phy0>; | |
f8f36c5d | 72 | }; |