[people/ms/u-boot.git] / arch / arm / imx-common / hab.c

/*
 * Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
 *
 * SPDX-License-Identifier:    GPL-2.0+
 */

#include <common.h>
#include <config.h>
#include <fuse.h>
#include <asm/io.h>
#include <asm/system.h>
#include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h>
#include <asm/imx-common/hab.h>

/* -------- start of HAB API updates ------------*/

#define hab_rvt_report_event_p					\
(								\
	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?		\
	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) :	\
	(is_mx6sdl() &&	(soc_rev() >= CHIP_REV_1_2)) ?		\
	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) :	\
	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT)	\
)

#define hab_rvt_report_status_p					\
(								\
	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?		\
	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
	(is_mx6sdl() &&	(soc_rev() >= CHIP_REV_1_2)) ?		\
	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS)	\
)

#define hab_rvt_authenticate_image_p				\
(								\
	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?		\
	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
	(is_mx6sdl() &&	(soc_rev() >= CHIP_REV_1_2)) ?		\
	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE)	\
)

#define hab_rvt_entry_p						\
(								\
	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?		\
	((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) :		\
	(is_mx6sdl() &&	(soc_rev() >= CHIP_REV_1_2)) ?		\
	((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) :		\
	((hab_rvt_entry_t *)HAB_RVT_ENTRY)			\
)

#define hab_rvt_exit_p						\
(								\
	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?		\
	((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) :			\
	(is_mx6sdl() &&	(soc_rev() >= CHIP_REV_1_2)) ?		\
	((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) :			\
	((hab_rvt_exit_t *)HAB_RVT_EXIT)			\
)

#define IVT_SIZE		0x20
#define ALIGN_SIZE		0x1000
#define CSF_PAD_SIZE		0x2000
#define MX6DQ_PU_IROM_MMU_EN_VAR	0x009024a8
#define MX6DLS_PU_IROM_MMU_EN_VAR	0x00901dd0
#define MX6SL_PU_IROM_MMU_EN_VAR	0x00900a18
#define IS_HAB_ENABLED_BIT \
	(is_soc_type(MXC_SOC_MX7) ? 0x2000000 : 0x2)

/*
 * +------------+  0x0 (DDR_UIMAGE_START) -
 * |   Header   |                          |
 * +------------+  0x40                    |
 * |            |                          |
 * |            |                          |
 * |            |                          |
 * |            |                          |
 * | Image Data |                          |
 * .            |                          |
 * .            |                           > Stuff to be authenticated ----+
 * .            |                          |                                |
 * |            |                          |                                |
 * |            |                          |                                |
 * +------------+                          |                                |
 * |            |                          |                                |
 * | Fill Data  |                          |                                |
 * |            |                          |                                |
 * +------------+ Align to ALIGN_SIZE      |                                |
 * |    IVT     |                          |                                |
 * +------------+ + IVT_SIZE              -                                 |
 * |            |                                                           |
 * |  CSF DATA  | <---------------------------------------------------------+
 * |            |
 * +------------+
 * |            |
 * | Fill Data  |
 * |            |
 * +------------+ + CSF_PAD_SIZE
 */

#define MAX_RECORD_BYTES     (8*1024) /* 4 kbytes */

struct record {
	uint8_t  tag;						/* Tag */
	uint8_t  len[2];					/* Length */
	uint8_t  par;						/* Version */
	uint8_t  contents[MAX_RECORD_BYTES];/* Record Data */
	bool	 any_rec_flag;
};

char *rsn_str[] = {"RSN = HAB_RSN_ANY (0x00)\n",
				   "RSN = HAB_ENG_FAIL (0x30)\n",
				   "RSN = HAB_INV_ADDRESS (0x22)\n",
				   "RSN = HAB_INV_ASSERTION (0x0C)\n",
				   "RSN = HAB_INV_CALL (0x28)\n",
				   "RSN = HAB_INV_CERTIFICATE (0x21)\n",
				   "RSN = HAB_INV_COMMAND (0x06)\n",
				   "RSN = HAB_INV_CSF (0x11)\n",
				   "RSN = HAB_INV_DCD (0x27)\n",
				   "RSN = HAB_INV_INDEX (0x0F)\n",
				   "RSN = HAB_INV_IVT (0x05)\n",
				   "RSN = HAB_INV_KEY (0x1D)\n",
				   "RSN = HAB_INV_RETURN (0x1E)\n",
				   "RSN = HAB_INV_SIGNATURE (0x18)\n",
				   "RSN = HAB_INV_SIZE (0x17)\n",
				   "RSN = HAB_MEM_FAIL (0x2E)\n",
				   "RSN = HAB_OVR_COUNT (0x2B)\n",
				   "RSN = HAB_OVR_STORAGE (0x2D)\n",
				   "RSN = HAB_UNS_ALGORITHM (0x12)\n",
				   "RSN = HAB_UNS_COMMAND (0x03)\n",
				   "RSN = HAB_UNS_ENGINE (0x0A)\n",
				   "RSN = HAB_UNS_ITEM (0x24)\n",
				   "RSN = HAB_UNS_KEY (0x1B)\n",
				   "RSN = HAB_UNS_PROTOCOL (0x14)\n",
				   "RSN = HAB_UNS_STATE (0x09)\n",
				   "RSN = INVALID\n",
				   NULL};

char *sts_str[] = {"STS = HAB_SUCCESS (0xF0)\n",
				   "STS = HAB_FAILURE (0x33)\n",
				   "STS = HAB_WARNING (0x69)\n",
				   "STS = INVALID\n",
				   NULL};

char *eng_str[] = {"ENG = HAB_ENG_ANY (0x00)\n",
				   "ENG = HAB_ENG_SCC (0x03)\n",
				   "ENG = HAB_ENG_RTIC (0x05)\n",
				   "ENG = HAB_ENG_SAHARA (0x06)\n",
				   "ENG = HAB_ENG_CSU (0x0A)\n",
				   "ENG = HAB_ENG_SRTC (0x0C)\n",
				   "ENG = HAB_ENG_DCP (0x1B)\n",
				   "ENG = HAB_ENG_CAAM (0x1D)\n",
				   "ENG = HAB_ENG_SNVS (0x1E)\n",
				   "ENG = HAB_ENG_OCOTP (0x21)\n",
				   "ENG = HAB_ENG_DTCP (0x22)\n",
				   "ENG = HAB_ENG_ROM (0x36)\n",
				   "ENG = HAB_ENG_HDCP (0x24)\n",
				   "ENG = HAB_ENG_RTL (0x77)\n",
				   "ENG = HAB_ENG_SW (0xFF)\n",
				   "ENG = INVALID\n",
				   NULL};

char *ctx_str[] = {"CTX = HAB_CTX_ANY(0x00)\n",
				   "CTX = HAB_CTX_FAB (0xFF)\n",
				   "CTX = HAB_CTX_ENTRY (0xE1)\n",
				   "CTX = HAB_CTX_TARGET (0x33)\n",
				   "CTX = HAB_CTX_AUTHENTICATE (0x0A)\n",
				   "CTX = HAB_CTX_DCD (0xDD)\n",
				   "CTX = HAB_CTX_CSF (0xCF)\n",
				   "CTX = HAB_CTX_COMMAND (0xC0)\n",
				   "CTX = HAB_CTX_AUT_DAT (0xDB)\n",
				   "CTX = HAB_CTX_ASSERT (0xA0)\n",
				   "CTX = HAB_CTX_EXIT (0xEE)\n",
				   "CTX = INVALID\n",
				   NULL};

uint8_t hab_statuses[5] = {
	HAB_STS_ANY,
	HAB_FAILURE,
	HAB_WARNING,
	HAB_SUCCESS,
	-1
};

uint8_t hab_reasons[26] = {
	HAB_RSN_ANY,
	HAB_ENG_FAIL,
	HAB_INV_ADDRESS,
	HAB_INV_ASSERTION,
	HAB_INV_CALL,
	HAB_INV_CERTIFICATE,
	HAB_INV_COMMAND,
	HAB_INV_CSF,
	HAB_INV_DCD,
	HAB_INV_INDEX,
	HAB_INV_IVT,
	HAB_INV_KEY,
	HAB_INV_RETURN,
	HAB_INV_SIGNATURE,
	HAB_INV_SIZE,
	HAB_MEM_FAIL,
	HAB_OVR_COUNT,
	HAB_OVR_STORAGE,
	HAB_UNS_ALGORITHM,
	HAB_UNS_COMMAND,
	HAB_UNS_ENGINE,
	HAB_UNS_ITEM,
	HAB_UNS_KEY,
	HAB_UNS_PROTOCOL,
	HAB_UNS_STATE,
	-1
};

uint8_t hab_contexts[12] = {
	HAB_CTX_ANY,
	HAB_CTX_FAB,
	HAB_CTX_ENTRY,
	HAB_CTX_TARGET,
	HAB_CTX_AUTHENTICATE,
	HAB_CTX_DCD,
	HAB_CTX_CSF,
	HAB_CTX_COMMAND,
	HAB_CTX_AUT_DAT,
	HAB_CTX_ASSERT,
	HAB_CTX_EXIT,
	-1
};

uint8_t hab_engines[16] = {
	HAB_ENG_ANY,
	HAB_ENG_SCC,
	HAB_ENG_RTIC,
	HAB_ENG_SAHARA,
	HAB_ENG_CSU,
	HAB_ENG_SRTC,
	HAB_ENG_DCP,
	HAB_ENG_CAAM,
	HAB_ENG_SNVS,
	HAB_ENG_OCOTP,
	HAB_ENG_DTCP,
	HAB_ENG_ROM,
	HAB_ENG_HDCP,
	HAB_ENG_RTL,
	HAB_ENG_SW,
	-1
};

bool is_hab_enabled(void)
{
	struct imx_sec_config_fuse_t *fuse =
		(struct imx_sec_config_fuse_t *)&imx_sec_config_fuse;
	uint32_t reg;
	int ret;

	ret = fuse_read(fuse->bank, fuse->word, &reg);
	if (ret) {
		puts("\nSecure boot fuse read error\n");
		return ret;
	}

	return (reg & IS_HAB_ENABLED_BIT) == IS_HAB_ENABLED_BIT;
}

static inline uint8_t get_idx(uint8_t *list, uint8_t tgt)
{
	uint8_t idx = 0;
	uint8_t element = list[idx];
	while (element != -1) {
		if (element == tgt)
			return idx;
		element = list[++idx];
	}
	return -1;
}

void process_event_record(uint8_t *event_data, size_t bytes)
{
	struct record *rec = (struct record *)event_data;

	printf("\n\n%s", sts_str[get_idx(hab_statuses, rec->contents[0])]);
	printf("%s", rsn_str[get_idx(hab_reasons, rec->contents[1])]);
	printf("%s", ctx_str[get_idx(hab_contexts, rec->contents[2])]);
	printf("%s", eng_str[get_idx(hab_engines, rec->contents[3])]);
}

void display_event(uint8_t *event_data, size_t bytes)
{
	uint32_t i;

	if (!(event_data && bytes > 0))
		return;

	for (i = 0; i < bytes; i++) {
		if (i == 0)
			printf("\t0x%02x", event_data[i]);
		else if ((i % 8) == 0)
			printf("\n\t0x%02x", event_data[i]);
		else
			printf(" 0x%02x", event_data[i]);
	}

	process_event_record(event_data, bytes);
}

int get_hab_status(void)
{
	uint32_t index = 0; /* Loop index */
	uint8_t event_data[128]; /* Event data buffer */
	size_t bytes = sizeof(event_data); /* Event size in bytes */
	enum hab_config config = 0;
	enum hab_state state = 0;
	hab_rvt_report_event_t *hab_rvt_report_event;
	hab_rvt_report_status_t *hab_rvt_report_status;

	hab_rvt_report_event = hab_rvt_report_event_p;
	hab_rvt_report_status = hab_rvt_report_status_p;

	if (is_hab_enabled())
		puts("\nSecure boot enabled\n");
	else
		puts("\nSecure boot disabled\n");

	/* Check HAB status */
	if (hab_rvt_report_status(&config, &state) != HAB_SUCCESS) {
		printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
		       config, state);

		/* Display HAB Error events */
		while (hab_rvt_report_event(HAB_FAILURE, index, event_data,
					&bytes) == HAB_SUCCESS) {
			puts("\n");
			printf("--------- HAB Event %d -----------------\n",
			       index + 1);
			puts("event data:\n");
			display_event(event_data, bytes);
			puts("\n");
			bytes = sizeof(event_data);
			index++;
		}
	}
	/* Display message if no HAB events are found */
	else {
		printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
		       config, state);
		puts("No HAB Events Found!\n\n");
	}
	return 0;
}

uint32_t authenticate_image(uint32_t ddr_start, uint32_t image_size)
{
	uint32_t load_addr = 0;
	size_t bytes;
	ptrdiff_t ivt_offset = 0;
	int result = 0;
	ulong start;
	hab_rvt_authenticate_image_t *hab_rvt_authenticate_image;
	hab_rvt_entry_t *hab_rvt_entry;
	hab_rvt_exit_t *hab_rvt_exit;

	hab_rvt_authenticate_image = hab_rvt_authenticate_image_p;
	hab_rvt_entry = hab_rvt_entry_p;
	hab_rvt_exit = hab_rvt_exit_p;

	if (is_hab_enabled()) {
		printf("\nAuthenticate image from DDR location 0x%x...\n",
		       ddr_start);

		hab_caam_clock_enable(1);

		if (hab_rvt_entry() == HAB_SUCCESS) {
			/* If not already aligned, Align to ALIGN_SIZE */
			ivt_offset = (image_size + ALIGN_SIZE - 1) &
					~(ALIGN_SIZE - 1);

			start = ddr_start;
			bytes = ivt_offset + IVT_SIZE + CSF_PAD_SIZE;
#ifdef DEBUG
			printf("\nivt_offset = 0x%x, ivt addr = 0x%x\n",
			       ivt_offset, ddr_start + ivt_offset);
			puts("Dumping IVT\n");
			print_buffer(ddr_start + ivt_offset,
				     (void *)(ddr_start + ivt_offset),
				     4, 0x8, 0);

			puts("Dumping CSF Header\n");
			print_buffer(ddr_start + ivt_offset+IVT_SIZE,
				     (void *)(ddr_start + ivt_offset+IVT_SIZE),
				     4, 0x10, 0);

			get_hab_status();

			puts("\nCalling authenticate_image in ROM\n");
			printf("\tivt_offset = 0x%x\n", ivt_offset);
			printf("\tstart = 0x%08lx\n", start);
			printf("\tbytes = 0x%x\n", bytes);
#endif
			/*
			 * If the MMU is enabled, we have to notify the ROM
			 * code, or it won't flush the caches when needed.
			 * This is done, by setting the "pu_irom_mmu_enabled"
			 * word to 1. You can find its address by looking in
			 * the ROM map. This is critical for
			 * authenticate_image(). If MMU is enabled, without
			 * setting this bit, authentication will fail and may
			 * crash.
			 */
			/* Check MMU enabled */
			if (is_soc_type(MXC_SOC_MX6) && get_cr() & CR_M) {
				if (is_mx6dq()) {
					/*
					 * This won't work on Rev 1.0.0 of
					 * i.MX6Q/D, since their ROM doesn't
					 * do cache flushes. don't think any
					 * exist, so we ignore them.
					 */
					if (!is_mx6dqp())
						writel(1, MX6DQ_PU_IROM_MMU_EN_VAR);
				} else if (is_mx6sdl()) {
					writel(1, MX6DLS_PU_IROM_MMU_EN_VAR);
				} else if (is_mx6sl()) {
					writel(1, MX6SL_PU_IROM_MMU_EN_VAR);
				}
			}

			load_addr = (uint32_t)hab_rvt_authenticate_image(
					HAB_CID_UBOOT,
					ivt_offset, (void **)&start,
					(size_t *)&bytes, NULL);
			if (hab_rvt_exit() != HAB_SUCCESS) {
				puts("hab exit function fail\n");
				load_addr = 0;
			}
		} else {
			puts("hab entry function fail\n");
		}

		hab_caam_clock_enable(0);

		get_hab_status();
	} else {
		puts("hab fuse not enabled\n");
	}

	if ((!is_hab_enabled()) || (load_addr != 0))
		result = 1;

	return result;
}

int do_hab_status(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	if ((argc != 1)) {
		cmd_usage(cmdtp);
		return 1;
	}

	get_hab_status();

	return 0;
}

static int do_authenticate_image(cmd_tbl_t *cmdtp, int flag, int argc,
				char * const argv[])
{
	ulong	addr, ivt_offset;
	int	rcode = 0;

	if (argc < 3)
		return CMD_RET_USAGE;

	addr = simple_strtoul(argv[1], NULL, 16);
	ivt_offset = simple_strtoul(argv[2], NULL, 16);

	rcode = authenticate_image(addr, ivt_offset);

	return rcode;
}

U_BOOT_CMD(
		hab_status, CONFIG_SYS_MAXARGS, 1, do_hab_status,
		"display HAB status",
		""
	  );

U_BOOT_CMD(
		hab_auth_img, 3, 0, do_authenticate_image,
		"authenticate image via HAB",
		"addr ivt_offset\n"
		"addr - image hex address\n"
		"ivt_offset - hex offset of IVT in the image"
	  );
Commit	Line	Data
b83c709e	1	/*
29067abf	2	* Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
b83c709e SB	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*/
	6
	7	#include <common.h>
fba6f9ef AA	8	#include <config.h>
fba6f9ef AA	9	#include <fuse.h>
b83c709e	10	#include <asm/io.h>
36c1ca4d	11	#include <asm/system.h>
36c1ca4d	12	#include <asm/arch/clock.h>
f2f07e85	13	#include <asm/arch/sys_proto.h>
7a7281a9	14	#include <asm/imx-common/hab.h>
b83c709e SB	15
b83c709e SB	16	/* -------- start of HAB API updates ------------*/
f2f07e85 SB	17
	18	#define hab_rvt_report_event_p \
	19	( \
27cd0da4	20	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
f2f07e85	21	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
27cd0da4	22	(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
f2f07e85 SB	23	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
	24	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT) \
	25	)
	26
	27	#define hab_rvt_report_status_p \
	28	( \
27cd0da4	29	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
f2f07e85	30	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
27cd0da4	31	(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
f2f07e85 SB	32	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
	33	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS) \
	34	)
	35
	36	#define hab_rvt_authenticate_image_p \
	37	( \
27cd0da4	38	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
f2f07e85	39	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
27cd0da4	40	(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
f2f07e85 SB	41	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
	42	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE) \
	43	)
	44
	45	#define hab_rvt_entry_p \
	46	( \
27cd0da4	47	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
f2f07e85	48	((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
27cd0da4	49	(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
f2f07e85 SB	50	((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
	51	((hab_rvt_entry_t *)HAB_RVT_ENTRY) \
	52	)
	53
	54	#define hab_rvt_exit_p \
	55	( \
27cd0da4	56	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
f2f07e85	57	((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
27cd0da4	58	(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
f2f07e85 SB	59	((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
	60	((hab_rvt_exit_t *)HAB_RVT_EXIT) \
	61	)
b83c709e	62
36c1ca4d NG	63	#define IVT_SIZE 0x20
	64	#define ALIGN_SIZE 0x1000
	65	#define CSF_PAD_SIZE 0x2000
	66	#define MX6DQ_PU_IROM_MMU_EN_VAR 0x009024a8
	67	#define MX6DLS_PU_IROM_MMU_EN_VAR 0x00901dd0
	68	#define MX6SL_PU_IROM_MMU_EN_VAR 0x00900a18
ee3899aa AA	69	#define IS_HAB_ENABLED_BIT \
ee3899aa AA	70	(is_soc_type(MXC_SOC_MX7) ? 0x2000000 : 0x2)
36c1ca4d NG	71
	72	/*
	73	* +------------+ 0x0 (DDR_UIMAGE_START) -
	74	* \| Header \| \|
	75	* +------------+ 0x40 \|
	76	* \| \| \|
	77	* \| \| \|
	78	* \| \| \|
	79	* \| \| \|
	80	* \| Image Data \| \|
	81	* . \| \|
	82	* . \| > Stuff to be authenticated ----+
	83	* . \| \| \|
	84	* \| \| \| \|
	85	* \| \| \| \|
	86	* +------------+ \| \|
	87	* \| \| \| \|
	88	* \| Fill Data \| \| \|
	89	* \| \| \| \|
	90	* +------------+ Align to ALIGN_SIZE \| \|
	91	* \| IVT \| \| \|
	92	* +------------+ + IVT_SIZE - \|
	93	* \| \| \|
	94	* \| CSF DATA \| <---------------------------------------------------------+
	95	* \| \|
	96	* +------------+
	97	* \| \|
	98	* \| Fill Data \|
	99	* \| \|
	100	* +------------+ + CSF_PAD_SIZE
	101	*/
	102
29067abf UC	103	#define MAX_RECORD_BYTES (81024) / 4 kbytes */
	104
	105	struct record {
	106	uint8_t tag; /* Tag */
	107	uint8_t len[2]; /* Length */
	108	uint8_t par; /* Version */
	109	uint8_t contents[MAX_RECORD_BYTES];/* Record Data */
	110	bool any_rec_flag;
	111	};
	112
	113	char *rsn_str[] = {"RSN = HAB_RSN_ANY (0x00)\n",
	114	"RSN = HAB_ENG_FAIL (0x30)\n",
	115	"RSN = HAB_INV_ADDRESS (0x22)\n",
	116	"RSN = HAB_INV_ASSERTION (0x0C)\n",
	117	"RSN = HAB_INV_CALL (0x28)\n",
	118	"RSN = HAB_INV_CERTIFICATE (0x21)\n",
	119	"RSN = HAB_INV_COMMAND (0x06)\n",
	120	"RSN = HAB_INV_CSF (0x11)\n",
	121	"RSN = HAB_INV_DCD (0x27)\n",
	122	"RSN = HAB_INV_INDEX (0x0F)\n",
	123	"RSN = HAB_INV_IVT (0x05)\n",
	124	"RSN = HAB_INV_KEY (0x1D)\n",
	125	"RSN = HAB_INV_RETURN (0x1E)\n",
	126	"RSN = HAB_INV_SIGNATURE (0x18)\n",
	127	"RSN = HAB_INV_SIZE (0x17)\n",
	128	"RSN = HAB_MEM_FAIL (0x2E)\n",
	129	"RSN = HAB_OVR_COUNT (0x2B)\n",
	130	"RSN = HAB_OVR_STORAGE (0x2D)\n",
	131	"RSN = HAB_UNS_ALGORITHM (0x12)\n",
	132	"RSN = HAB_UNS_COMMAND (0x03)\n",
	133	"RSN = HAB_UNS_ENGINE (0x0A)\n",
	134	"RSN = HAB_UNS_ITEM (0x24)\n",
	135	"RSN = HAB_UNS_KEY (0x1B)\n",
	136	"RSN = HAB_UNS_PROTOCOL (0x14)\n",
	137	"RSN = HAB_UNS_STATE (0x09)\n",
	138	"RSN = INVALID\n",
	139	NULL};
	140
	141	char *sts_str[] = {"STS = HAB_SUCCESS (0xF0)\n",
	142	"STS = HAB_FAILURE (0x33)\n",
	143	"STS = HAB_WARNING (0x69)\n",
	144	"STS = INVALID\n",
	145	NULL};
	146
	147	char *eng_str[] = {"ENG = HAB_ENG_ANY (0x00)\n",
	148	"ENG = HAB_ENG_SCC (0x03)\n",
	149	"ENG = HAB_ENG_RTIC (0x05)\n",
	150	"ENG = HAB_ENG_SAHARA (0x06)\n",
	151	"ENG = HAB_ENG_CSU (0x0A)\n",
	152	"ENG = HAB_ENG_SRTC (0x0C)\n",
	153	"ENG = HAB_ENG_DCP (0x1B)\n",
	154	"ENG = HAB_ENG_CAAM (0x1D)\n",
	155	"ENG = HAB_ENG_SNVS (0x1E)\n",
	156	"ENG = HAB_ENG_OCOTP (0x21)\n",
	157	"ENG = HAB_ENG_DTCP (0x22)\n",
	158	"ENG = HAB_ENG_ROM (0x36)\n",
	159	"ENG = HAB_ENG_HDCP (0x24)\n",
	160	"ENG = HAB_ENG_RTL (0x77)\n",
	161	"ENG = HAB_ENG_SW (0xFF)\n",
	162	"ENG = INVALID\n",
	163	NULL};
	164
	165	char *ctx_str[] = {"CTX = HAB_CTX_ANY(0x00)\n",
	166	"CTX = HAB_CTX_FAB (0xFF)\n",
167	"CTX = HAB_CTX_ENTRY (0xE1)\n",
168	"CTX = HAB_CTX_TARGET (0x33)\n",
169	"CTX = HAB_CTX_AUTHENTICATE (0x0A)\n",
170	"CTX = HAB_CTX_DCD (0xDD)\n",
171	"CTX = HAB_CTX_CSF (0xCF)\n",
172	"CTX = HAB_CTX_COMMAND (0xC0)\n",
173	"CTX = HAB_CTX_AUT_DAT (0xDB)\n",
174	"CTX = HAB_CTX_ASSERT (0xA0)\n",
175	"CTX = HAB_CTX_EXIT (0xEE)\n",
176	"CTX = INVALID\n",
177	NULL};
178
179	uint8_t hab_statuses[5] = {
180	HAB_STS_ANY,
181	HAB_FAILURE,
182	HAB_WARNING,
183	HAB_SUCCESS,
184	-1
185	};
186
187	uint8_t hab_reasons[26] = {
188	HAB_RSN_ANY,
189	HAB_ENG_FAIL,
190	HAB_INV_ADDRESS,
191	HAB_INV_ASSERTION,
192	HAB_INV_CALL,
193	HAB_INV_CERTIFICATE,
194	HAB_INV_COMMAND,
195	HAB_INV_CSF,
196	HAB_INV_DCD,
197	HAB_INV_INDEX,
198	HAB_INV_IVT,
199	HAB_INV_KEY,
200	HAB_INV_RETURN,
201	HAB_INV_SIGNATURE,
202	HAB_INV_SIZE,
203	HAB_MEM_FAIL,
204	HAB_OVR_COUNT,
205	HAB_OVR_STORAGE,
206	HAB_UNS_ALGORITHM,
207	HAB_UNS_COMMAND,
208	HAB_UNS_ENGINE,
209	HAB_UNS_ITEM,
210	HAB_UNS_KEY,
211	HAB_UNS_PROTOCOL,
212	HAB_UNS_STATE,
213	-1
214	};
215
216	uint8_t hab_contexts[12] = {
217	HAB_CTX_ANY,
218	HAB_CTX_FAB,
219	HAB_CTX_ENTRY,
220	HAB_CTX_TARGET,
221	HAB_CTX_AUTHENTICATE,
222	HAB_CTX_DCD,
223	HAB_CTX_CSF,
224	HAB_CTX_COMMAND,
225	HAB_CTX_AUT_DAT,
226	HAB_CTX_ASSERT,
227	HAB_CTX_EXIT,
228	-1
229	};
230
231	uint8_t hab_engines[16] = {
232	HAB_ENG_ANY,
233	HAB_ENG_SCC,
234	HAB_ENG_RTIC,
235	HAB_ENG_SAHARA,
236	HAB_ENG_CSU,
237	HAB_ENG_SRTC,
238	HAB_ENG_DCP,
239	HAB_ENG_CAAM,
240	HAB_ENG_SNVS,
241	HAB_ENG_OCOTP,
242	HAB_ENG_DTCP,
243	HAB_ENG_ROM,
244	HAB_ENG_HDCP,
245	HAB_ENG_RTL,
246	HAB_ENG_SW,
247	-1
248	};
249
b83c709e SB	250	bool is_hab_enabled(void)
b83c709e SB	251	{
fba6f9ef AA	252	struct imx_sec_config_fuse_t *fuse =
	253	(struct imx_sec_config_fuse_t *)&imx_sec_config_fuse;
	254	uint32_t reg;
	255	int ret;
	256
	257	ret = fuse_read(fuse->bank, fuse->word, &reg);
	258	if (ret) {
	259	puts("\nSecure boot fuse read error\n");
	260	return ret;
	261	}
b83c709e	262
ee3899aa	263	return (reg & IS_HAB_ENABLED_BIT) == IS_HAB_ENABLED_BIT;
b83c709e SB	264	}
b83c709e SB	265
29067abf UC	266	static inline uint8_t get_idx(uint8_t *list, uint8_t tgt)
	267	{
	268	uint8_t idx = 0;
	269	uint8_t element = list[idx];
	270	while (element != -1) {
	271	if (element == tgt)
	272	return idx;
	273	element = list[++idx];
	274	}
	275	return -1;
	276	}
	277
	278	void process_event_record(uint8_t *event_data, size_t bytes)
	279	{
	280	struct record rec = (struct record )event_data;
	281
	282	printf("\n\n%s", sts_str[get_idx(hab_statuses, rec->contents[0])]);
	283	printf("%s", rsn_str[get_idx(hab_reasons, rec->contents[1])]);
	284	printf("%s", ctx_str[get_idx(hab_contexts, rec->contents[2])]);
	285	printf("%s", eng_str[get_idx(hab_engines, rec->contents[3])]);
	286	}
	287
b83c709e SB	288	void display_event(uint8_t *event_data, size_t bytes)
	289	{
	290	uint32_t i;
	291
	292	if (!(event_data && bytes > 0))
	293	return;
	294
	295	for (i = 0; i < bytes; i++) {
	296	if (i == 0)
	297	printf("\t0x%02x", event_data[i]);
	298	else if ((i % 8) == 0)
	299	printf("\n\t0x%02x", event_data[i]);
	300	else
	301	printf(" 0x%02x", event_data[i]);
	302	}
29067abf UC	303
29067abf UC	304	process_event_record(event_data, bytes);
b83c709e SB	305	}
	306
	307	int get_hab_status(void)
	308	{
	309	uint32_t index = 0; /* Loop index */
	310	uint8_t event_data[128]; /* Event data buffer */
	311	size_t bytes = sizeof(event_data); /* Event size in bytes */
	312	enum hab_config config = 0;
	313	enum hab_state state = 0;
f2f07e85 SB	314	hab_rvt_report_event_t *hab_rvt_report_event;
	315	hab_rvt_report_status_t *hab_rvt_report_status;
	316
	317	hab_rvt_report_event = hab_rvt_report_event_p;
	318	hab_rvt_report_status = hab_rvt_report_status_p;
b83c709e SB	319
	320	if (is_hab_enabled())
	321	puts("\nSecure boot enabled\n");
	322	else
	323	puts("\nSecure boot disabled\n");
	324
	325	/* Check HAB status */
	326	if (hab_rvt_report_status(&config, &state) != HAB_SUCCESS) {
	327	printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
	328	config, state);
	329
	330	/* Display HAB Error events */
	331	while (hab_rvt_report_event(HAB_FAILURE, index, event_data,
	332	&bytes) == HAB_SUCCESS) {
	333	puts("\n");
	334	printf("--------- HAB Event %d -----------------\n",
	335	index + 1);
	336	puts("event data:\n");
	337	display_event(event_data, bytes);
	338	puts("\n");
	339	bytes = sizeof(event_data);
	340	index++;
	341	}
	342	}
	343	/* Display message if no HAB events are found */
	344	else {
	345	printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
	346	config, state);
	347	puts("No HAB Events Found!\n\n");
	348	}
	349	return 0;
	350	}
	351
36c1ca4d NG	352	uint32_t authenticate_image(uint32_t ddr_start, uint32_t image_size)
	353	{
	354	uint32_t load_addr = 0;
	355	size_t bytes;
	356	ptrdiff_t ivt_offset = 0;
	357	int result = 0;
	358	ulong start;
	359	hab_rvt_authenticate_image_t *hab_rvt_authenticate_image;
	360	hab_rvt_entry_t *hab_rvt_entry;
	361	hab_rvt_exit_t *hab_rvt_exit;
	362
	363	hab_rvt_authenticate_image = hab_rvt_authenticate_image_p;
	364	hab_rvt_entry = hab_rvt_entry_p;
	365	hab_rvt_exit = hab_rvt_exit_p;
	366
	367	if (is_hab_enabled()) {
	368	printf("\nAuthenticate image from DDR location 0x%x...\n",
	369	ddr_start);
	370
	371	hab_caam_clock_enable(1);
	372
	373	if (hab_rvt_entry() == HAB_SUCCESS) {
	374	/* If not already aligned, Align to ALIGN_SIZE */
	375	ivt_offset = (image_size + ALIGN_SIZE - 1) &
	376	~(ALIGN_SIZE - 1);
	377
	378	start = ddr_start;
	379	bytes = ivt_offset + IVT_SIZE + CSF_PAD_SIZE;
	380	#ifdef DEBUG
	381	printf("\nivt_offset = 0x%x, ivt addr = 0x%x\n",
	382	ivt_offset, ddr_start + ivt_offset);
	383	puts("Dumping IVT\n");
	384	print_buffer(ddr_start + ivt_offset,
	385	(void *)(ddr_start + ivt_offset),
	386	4, 0x8, 0);
	387
	388	puts("Dumping CSF Header\n");
	389	print_buffer(ddr_start + ivt_offset+IVT_SIZE,
	390	(void *)(ddr_start + ivt_offset+IVT_SIZE),
	391	4, 0x10, 0);
	392
	393	get_hab_status();
	394
	395	puts("\nCalling authenticate_image in ROM\n");
	396	printf("\tivt_offset = 0x%x\n", ivt_offset);
	397	printf("\tstart = 0x%08lx\n", start);
	398	printf("\tbytes = 0x%x\n", bytes);
	399	#endif
	400	/*
	401	* If the MMU is enabled, we have to notify the ROM
	402	* code, or it won't flush the caches when needed.
	403	* This is done, by setting the "pu_irom_mmu_enabled"
	404	* word to 1. You can find its address by looking in
	405	* the ROM map. This is critical for
	406	* authenticate_image(). If MMU is enabled, without
	407	* setting this bit, authentication will fail and may
	408	* crash.
	409	*/
	410	/* Check MMU enabled */
ee3899aa	411	if (is_soc_type(MXC_SOC_MX6) && get_cr() & CR_M) {
27cd0da4	412	if (is_mx6dq()) {
36c1ca4d NG	413	/*
	414	* This won't work on Rev 1.0.0 of
	415	* i.MX6Q/D, since their ROM doesn't
	416	* do cache flushes. don't think any
	417	* exist, so we ignore them.
	418	*/
ec0f9530 YL	419	if (!is_mx6dqp())
ec0f9530 YL	420	writel(1, MX6DQ_PU_IROM_MMU_EN_VAR);
27cd0da4	421	} else if (is_mx6sdl()) {
36c1ca4d	422	writel(1, MX6DLS_PU_IROM_MMU_EN_VAR);
27cd0da4	423	} else if (is_mx6sl()) {
36c1ca4d NG	424	writel(1, MX6SL_PU_IROM_MMU_EN_VAR);
	425	}
	426	}
	427
	428	load_addr = (uint32_t)hab_rvt_authenticate_image(
	429	HAB_CID_UBOOT,
	430	ivt_offset, (void **)&start,
	431	(size_t *)&bytes, NULL);
	432	if (hab_rvt_exit() != HAB_SUCCESS) {
	433	puts("hab exit function fail\n");
	434	load_addr = 0;
	435	}
	436	} else {
	437	puts("hab entry function fail\n");
	438	}
	439
	440	hab_caam_clock_enable(0);
	441
	442	get_hab_status();
	443	} else {
	444	puts("hab fuse not enabled\n");
	445	}
	446
	447	if ((!is_hab_enabled()) \|\| (load_addr != 0))
	448	result = 1;
	449
	450	return result;
	451	}
	452
b83c709e SB	453	int do_hab_status(cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
	454	{
	455	if ((argc != 1)) {
	456	cmd_usage(cmdtp);
	457	return 1;
	458	}
	459
	460	get_hab_status();
	461
	462	return 0;
	463	}
	464
36c1ca4d NG	465	static int do_authenticate_image(cmd_tbl_t *cmdtp, int flag, int argc,
	466	char * const argv[])
	467	{
	468	ulong addr, ivt_offset;
	469	int rcode = 0;
	470
	471	if (argc < 3)
	472	return CMD_RET_USAGE;
	473
	474	addr = simple_strtoul(argv[1], NULL, 16);
	475	ivt_offset = simple_strtoul(argv[2], NULL, 16);
	476
	477	rcode = authenticate_image(addr, ivt_offset);
	478
	479	return rcode;
	480	}
	481
b83c709e SB	482	U_BOOT_CMD(
	483	hab_status, CONFIG_SYS_MAXARGS, 1, do_hab_status,
	484	"display HAB status",
	485	""
	486	);
36c1ca4d NG	487
	488	U_BOOT_CMD(
	489	hab_auth_img, 3, 0, do_authenticate_image,
	490	"authenticate image via HAB",
	491	"addr ivt_offset\n"
	492	"addr - image hex address\n"
	493	"ivt_offset - hex offset of IVT in the image"
	494	);