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1 | /* |
2 | * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9261_matrix.h] | |
3 | * | |
4 | * Copyright (C) 2007 Atmel Corporation. | |
5 | * | |
6 | * Memory Controllers (MATRIX, EBI) - System peripherals registers. | |
7 | * Based on AT91SAM9261 datasheet revision D. | |
8 | * | |
1a459660 | 9 | * SPDX-License-Identifier: GPL-2.0+ |
d99a8ff6 SP |
10 | */ |
11 | ||
12 | #ifndef AT91SAM9261_MATRIX_H | |
13 | #define AT91SAM9261_MATRIX_H | |
14 | ||
673d39f6 | 15 | #ifndef __ASSEMBLY__ |
d99a8ff6 | 16 | |
673d39f6 XH |
17 | struct at91_matrix { |
18 | u32 mcfg; /* Master Configuration Registers */ | |
19 | u32 scfg[5]; /* Slave Configuration Registers */ | |
20 | u32 filler[6]; | |
21 | u32 ebicsa; /* EBI Chip Select Assignment Register */ | |
22 | }; | |
23 | #endif /* __ASSEMBLY__ */ | |
d99a8ff6 | 24 | |
673d39f6 XH |
25 | #define AT91_MATRIX_ULBT_INFINITE (0 << 0) |
26 | #define AT91_MATRIX_ULBT_SINGLE (1 << 0) | |
27 | #define AT91_MATRIX_ULBT_FOUR (2 << 0) | |
28 | #define AT91_MATRIX_ULBT_EIGHT (3 << 0) | |
29 | #define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) | |
d99a8ff6 | 30 | |
673d39f6 XH |
31 | #define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) |
32 | #define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) | |
33 | #define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) | |
34 | #define AT91_MATRIX_FIXED_DEFMSTR_SHIFT 18 | |
35 | #define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) | |
36 | #define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) | |
d99a8ff6 | 37 | |
673d39f6 XH |
38 | #define AT91_MATRIX_M0PR_SHIFT 0 |
39 | #define AT91_MATRIX_M1PR_SHIFT 4 | |
40 | #define AT91_MATRIX_M2PR_SHIFT 8 | |
41 | #define AT91_MATRIX_M3PR_SHIFT 12 | |
42 | #define AT91_MATRIX_M4PR_SHIFT 16 | |
43 | #define AT91_MATRIX_M5PR_SHIFT 20 | |
44 | ||
45 | #define AT91_MATRIX_RCB0 (1 << 0) | |
46 | #define AT91_MATRIX_RCB1 (1 << 1) | |
47 | ||
48 | #define AT91_MATRIX_CS1A_SDRAMC (1 << 1) | |
49 | #define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) | |
50 | #define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) | |
51 | #define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) | |
52 | #define AT91_MATRIX_DBPUC (1 << 8) | |
53 | #define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16) | |
54 | #define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16) | |
d99a8ff6 SP |
55 | |
56 | #endif |